| cpuidle34xx.c (582c77d783e0cb1e6c30a330e42582173bcadfd2) | cpuidle34xx.c (4814ced5116e3b73dc4f63eec84999739fc8ed11) |
|---|---|
| 1/* 2 * linux/arch/arm/mach-omap2/cpuidle34xx.c 3 * 4 * OMAP3 CPU IDLE Routines 5 * 6 * Copyright (C) 2008 Texas Instruments, Inc. 7 * Rajendra Nayak <rnayak@ti.com> 8 * --- 15 unchanged lines hidden (view full) --- 24 25#include <linux/sched.h> 26#include <linux/cpuidle.h> 27 28#include <plat/prcm.h> 29#include <plat/irqs.h> 30#include <plat/powerdomain.h> 31#include <plat/clockdomain.h> | 1/* 2 * linux/arch/arm/mach-omap2/cpuidle34xx.c 3 * 4 * OMAP3 CPU IDLE Routines 5 * 6 * Copyright (C) 2008 Texas Instruments, Inc. 7 * Rajendra Nayak <rnayak@ti.com> 8 * --- 15 unchanged lines hidden (view full) --- 24 25#include <linux/sched.h> 26#include <linux/cpuidle.h> 27 28#include <plat/prcm.h> 29#include <plat/irqs.h> 30#include <plat/powerdomain.h> 31#include <plat/clockdomain.h> |
| 32#include <plat/control.h> | |
| 33#include <plat/serial.h> 34 35#include "pm.h" | 32#include <plat/serial.h> 33 34#include "pm.h" |
| 35#include "control.h" |
|
| 36 37#ifdef CONFIG_CPU_IDLE 38 39#define OMAP3_MAX_STATES 7 40#define OMAP3_STATE_C1 0 /* C1 - MPU WFI + Core active */ 41#define OMAP3_STATE_C2 1 /* C2 - MPU WFI + Core inactive */ 42#define OMAP3_STATE_C3 2 /* C3 - MPU CSWR + Core inactive */ 43#define OMAP3_STATE_C4 3 /* C4 - MPU OFF + Core iactive */ --- 479 unchanged lines hidden --- | 36 37#ifdef CONFIG_CPU_IDLE 38 39#define OMAP3_MAX_STATES 7 40#define OMAP3_STATE_C1 0 /* C1 - MPU WFI + Core active */ 41#define OMAP3_STATE_C2 1 /* C2 - MPU WFI + Core inactive */ 42#define OMAP3_STATE_C3 2 /* C3 - MPU CSWR + Core inactive */ 43#define OMAP3_STATE_C4 3 /* C4 - MPU OFF + Core iactive */ --- 479 unchanged lines hidden --- |