| control.h (d4bbf7e7759afc172e2bfbc5c416324590049cdd) | control.h (a920360f038e976e7a86b002e209402da20e9147) |
|---|---|
| 1/* 2 * arch/arm/mach-omap2/control.h 3 * 4 * OMAP2/3/4 System Control Module definitions 5 * 6 * Copyright (C) 2007-2010 Texas Instruments, Inc. 7 * Copyright (C) 2007-2008, 2010 Nokia Corporation 8 * --- 38 unchanged lines hidden (view full) --- 47 48#define OMAP2_CONTROL_INTERFACE 0x000 49#define OMAP2_CONTROL_PADCONFS 0x030 50#define OMAP2_CONTROL_GENERAL 0x270 51#define OMAP343X_CONTROL_MEM_WKUP 0x600 52#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 53#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 54 | 1/* 2 * arch/arm/mach-omap2/control.h 3 * 4 * OMAP2/3/4 System Control Module definitions 5 * 6 * Copyright (C) 2007-2010 Texas Instruments, Inc. 7 * Copyright (C) 2007-2008, 2010 Nokia Corporation 8 * --- 38 unchanged lines hidden (view full) --- 47 48#define OMAP2_CONTROL_INTERFACE 0x000 49#define OMAP2_CONTROL_PADCONFS 0x030 50#define OMAP2_CONTROL_GENERAL 0x270 51#define OMAP343X_CONTROL_MEM_WKUP 0x600 52#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 53#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 54 |
| 55/* TI816X spefic control submodules */ 56#define TI816X_CONTROL_DEVCONF 0x600 | 55/* TI81XX spefic control submodules */ 56#define TI81XX_CONTROL_DEVCONF 0x600 |
| 57 58/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ 59 60#define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10) 61 62/* CONTROL_GENERAL register offsets common to OMAP2 & 3 */ 63#define OMAP2_CONTROL_DEVCONF0 (OMAP2_CONTROL_GENERAL + 0x0004) 64#define OMAP2_CONTROL_MSUSPENDMUX_0 (OMAP2_CONTROL_GENERAL + 0x0020) --- 174 unchanged lines hidden (view full) --- 239/* 36xx-only RTA - Retention till Access control registers and bits */ 240#define OMAP36XX_CONTROL_MEM_RTA_CTRL 0x40C 241#define OMAP36XX_RTA_DISABLE 0x0 242 243/* 34xx D2D idle-related pins, handled by PM core */ 244#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 245#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 246 | 57 58/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ 59 60#define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10) 61 62/* CONTROL_GENERAL register offsets common to OMAP2 & 3 */ 63#define OMAP2_CONTROL_DEVCONF0 (OMAP2_CONTROL_GENERAL + 0x0004) 64#define OMAP2_CONTROL_MSUSPENDMUX_0 (OMAP2_CONTROL_GENERAL + 0x0020) --- 174 unchanged lines hidden (view full) --- 239/* 36xx-only RTA - Retention till Access control registers and bits */ 240#define OMAP36XX_CONTROL_MEM_RTA_CTRL 0x40C 241#define OMAP36XX_RTA_DISABLE 0x0 242 243/* 34xx D2D idle-related pins, handled by PM core */ 244#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 245#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 246 |
| 247/* TI816X CONTROL_DEVCONF register offsets */ 248#define TI816X_CONTROL_DEVICE_ID (TI816X_CONTROL_DEVCONF + 0x000) | 247/* TI81XX CONTROL_DEVCONF register offsets */ 248#define TI81XX_CONTROL_DEVICE_ID (TI81XX_CONTROL_DEVCONF + 0x000) |
| 249 250/* 251 * REVISIT: This list of registers is not comprehensive - there are more 252 * that should be added. 253 */ 254 255/* 256 * Control module register bit defines - these should eventually go into --- 156 unchanged lines hidden --- | 249 250/* 251 * REVISIT: This list of registers is not comprehensive - there are more 252 * that should be added. 253 */ 254 255/* 256 * Control module register bit defines - these should eventually go into --- 156 unchanged lines hidden --- |