control.h (8990c1bc4be46473ad19bf2fa612ca57286f3df4) control.h (458e999eb14a301d4176783c8fcb277f5d009b4e)
1/*
2 * arch/arm/mach-omap2/control.h
3 *
4 * OMAP2/3/4 System Control Module definitions
5 *
6 * Copyright (C) 2007-2010 Texas Instruments, Inc.
7 * Copyright (C) 2007-2008, 2010 Nokia Corporation
8 *

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199#define OMAP343X_CONTROL_WKUP_DEBOBSMUX(i) (OMAP343X_CONTROL_GENERAL_WKUP + \
200 0x008 + (i))
201#define OMAP343X_CONTROL_WKUP_DEBOBS0 (OMAP343X_CONTROL_GENERAL_WKUP + 0x008)
202#define OMAP343X_CONTROL_WKUP_DEBOBS1 (OMAP343X_CONTROL_GENERAL_WKUP + 0x00C)
203#define OMAP343X_CONTROL_WKUP_DEBOBS2 (OMAP343X_CONTROL_GENERAL_WKUP + 0x010)
204#define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014)
205#define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018)
206
1/*
2 * arch/arm/mach-omap2/control.h
3 *
4 * OMAP2/3/4 System Control Module definitions
5 *
6 * Copyright (C) 2007-2010 Texas Instruments, Inc.
7 * Copyright (C) 2007-2008, 2010 Nokia Corporation
8 *

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199#define OMAP343X_CONTROL_WKUP_DEBOBSMUX(i) (OMAP343X_CONTROL_GENERAL_WKUP + \
200 0x008 + (i))
201#define OMAP343X_CONTROL_WKUP_DEBOBS0 (OMAP343X_CONTROL_GENERAL_WKUP + 0x008)
202#define OMAP343X_CONTROL_WKUP_DEBOBS1 (OMAP343X_CONTROL_GENERAL_WKUP + 0x00C)
203#define OMAP343X_CONTROL_WKUP_DEBOBS2 (OMAP343X_CONTROL_GENERAL_WKUP + 0x010)
204#define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014)
205#define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018)
206
207/* 36xx-only RTA - Retention till Accesss control registers and bits */
208#define OMAP36XX_CONTROL_MEM_RTA_CTRL 0x40C
209#define OMAP36XX_RTA_DISABLE 0x0
210
207/* 34xx D2D idle-related pins, handled by PM core */
208#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
209#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
210
211/*
212 * REVISIT: This list of registers is not comprehensive - there are more
213 * that should be added.
214 */

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342extern void omap_ctrl_writew(u16 val, u16 offset);
343extern void omap_ctrl_writel(u32 val, u16 offset);
344extern void omap4_ctrl_pad_writel(u32 val, u16 offset);
345
346extern void omap3_save_scratchpad_contents(void);
347extern void omap3_clear_scratchpad_contents(void);
348extern u32 *get_restore_pointer(void);
349extern u32 *get_es3_restore_pointer(void);
211/* 34xx D2D idle-related pins, handled by PM core */
212#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
213#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
214
215/*
216 * REVISIT: This list of registers is not comprehensive - there are more
217 * that should be added.
218 */

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346extern void omap_ctrl_writew(u16 val, u16 offset);
347extern void omap_ctrl_writel(u32 val, u16 offset);
348extern void omap4_ctrl_pad_writel(u32 val, u16 offset);
349
350extern void omap3_save_scratchpad_contents(void);
351extern void omap3_clear_scratchpad_contents(void);
352extern u32 *get_restore_pointer(void);
353extern u32 *get_es3_restore_pointer(void);
354extern u32 *get_omap3630_restore_pointer(void);
350extern u32 omap3_arm_context[128];
351extern void omap3_control_save_context(void);
352extern void omap3_control_restore_context(void);
355extern u32 omap3_arm_context[128];
356extern void omap3_control_save_context(void);
357extern void omap3_control_restore_context(void);
353
358extern void omap3630_ctrl_disable_rta(void);
354#else
355#define omap_ctrl_base_get() 0
356#define omap_ctrl_readb(x) 0
357#define omap_ctrl_readw(x) 0
358#define omap_ctrl_readl(x) 0
359#define omap4_ctrl_pad_readl(x) 0
360#define omap_ctrl_writeb(x, y) WARN_ON(1)
361#define omap_ctrl_writew(x, y) WARN_ON(1)
362#define omap_ctrl_writel(x, y) WARN_ON(1)
363#define omap4_ctrl_pad_writel(x, y) WARN_ON(1)
364#endif
365#endif /* __ASSEMBLY__ */
366
367#endif /* __ARCH_ARM_MACH_OMAP2_CONTROL_H */
368
359#else
360#define omap_ctrl_base_get() 0
361#define omap_ctrl_readb(x) 0
362#define omap_ctrl_readw(x) 0
363#define omap_ctrl_readl(x) 0
364#define omap4_ctrl_pad_readl(x) 0
365#define omap_ctrl_writeb(x, y) WARN_ON(1)
366#define omap_ctrl_writew(x, y) WARN_ON(1)
367#define omap_ctrl_writel(x, y) WARN_ON(1)
368#define omap4_ctrl_pad_writel(x, y) WARN_ON(1)
369#endif
370#endif /* __ASSEMBLY__ */
371
372#endif /* __ARCH_ARM_MACH_OMAP2_CONTROL_H */
373