| Kconfig (f83d9396d1f63048c423efa00e4e244da10a35fd) | Kconfig (ab0bbef3ae0f6b5a3b60671cd0124d0fc4fc2567) |
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| 1# SPDX-License-Identifier: GPL-2.0-only 2menu "TI OMAP/AM/DM/DRA Family" 3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 4 5config OMAP_HWMOD 6 bool 7 8config ARCH_OMAP2 --- 91 unchanged lines hidden (view full) --- 100 select ARCH_HAS_RESET_CONTROLLER 101 select ARCH_OMAP 102 select CLKSRC_MMIO 103 select GENERIC_IRQ_CHIP 104 select GPIOLIB 105 select MACH_OMAP_GENERIC 106 select MEMORY 107 select MFD_SYSCON | 1# SPDX-License-Identifier: GPL-2.0-only 2menu "TI OMAP/AM/DM/DRA Family" 3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 4 5config OMAP_HWMOD 6 bool 7 8config ARCH_OMAP2 --- 91 unchanged lines hidden (view full) --- 100 select ARCH_HAS_RESET_CONTROLLER 101 select ARCH_OMAP 102 select CLKSRC_MMIO 103 select GENERIC_IRQ_CHIP 104 select GPIOLIB 105 select MACH_OMAP_GENERIC 106 select MEMORY 107 select MFD_SYSCON |
| 108 select OMAP_DM_SYSTIMER |
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| 108 select OMAP_DM_TIMER 109 select OMAP_GPMC 110 select PINCTRL 111 select PM 112 select PM_GENERIC_DOMAINS 113 select PM_GENERIC_DOMAINS_OF 114 select RESET_CONTROLLER 115 select SOC_BUS 116 select TI_SYSC 117 select OMAP_IRQCHIP 118 select CLKSRC_TI_32K 119 help 120 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 121 122config OMAP_INTERCONNECT_BARRIER 123 bool 124 select ARM_HEAVY_MB 125 | 109 select OMAP_DM_TIMER 110 select OMAP_GPMC 111 select PINCTRL 112 select PM 113 select PM_GENERIC_DOMAINS 114 select PM_GENERIC_DOMAINS_OF 115 select RESET_CONTROLLER 116 select SOC_BUS 117 select TI_SYSC 118 select OMAP_IRQCHIP 119 select CLKSRC_TI_32K 120 help 121 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 122 123config OMAP_INTERCONNECT_BARRIER 124 bool 125 select ARM_HEAVY_MB 126 |
| 126config ARCH_OMAP 127 bool | |
| 128 129if ARCH_OMAP2PLUS 130 131menu "TI OMAP2/3/4 Specific Features" 132 133config ARCH_OMAP2PLUS_TYPICAL 134 bool "Typical OMAP configuration" 135 default y --- 14 unchanged lines hidden (view full) --- 150config SOC_HAS_OMAP2_SDRC 151 bool "OMAP2 SDRAM Controller support" 152 153config SOC_HAS_REALTIME_COUNTER 154 bool "Real time free running counter" 155 depends on SOC_OMAP5 || SOC_DRA7XX 156 default y 157 | 127 128if ARCH_OMAP2PLUS 129 130menu "TI OMAP2/3/4 Specific Features" 131 132config ARCH_OMAP2PLUS_TYPICAL 133 bool "Typical OMAP configuration" 134 default y --- 14 unchanged lines hidden (view full) --- 149config SOC_HAS_OMAP2_SDRC 150 bool "OMAP2 SDRAM Controller support" 151 152config SOC_HAS_REALTIME_COUNTER 153 bool "Real time free running counter" 154 depends on SOC_OMAP5 || SOC_DRA7XX 155 default y 156 |
| 158config POWER_AVS_OMAP 159 bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2" 160 depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM 161 select POWER_SUPPLY 162 help 163 Say Y to enable AVS(Adaptive Voltage Scaling) 164 support on OMAP containing the version 1 or 165 version 2 of the SmartReflex IP. 166 V1 is the 65nm version used in OMAP3430. 167 V2 is the update for the 45nm version of the IP used in OMAP3630 168 and OMAP4430 169 170 Please note, that by default SmartReflex is only 171 initialized and not enabled. To enable the automatic voltage 172 compensation for vdd mpu and vdd core from user space, 173 user must write 1 to 174 /debug/smartreflex/sr_<X>/autocomp, 175 where X is mpu_iva or core for OMAP3. 176 Optionally autocompensation can be enabled in the kernel 177 by default during system init via the enable_on_init flag 178 which an be passed as platform data to the smartreflex driver. 179 180config POWER_AVS_OMAP_CLASS3 181 bool "Class 3 mode of Smartreflex Implementation" 182 depends on POWER_AVS_OMAP && TWL4030_CORE 183 help 184 Say Y to enable Class 3 implementation of Smartreflex 185 186 Class 3 implementation of Smartreflex employs continuous hardware 187 voltage calibration. 188 189config OMAP3_L2_AUX_SECURE_SAVE_RESTORE 190 bool "OMAP3 HS/EMU save and restore for L2 AUX control register" 191 depends on ARCH_OMAP3 && PM 192 help 193 Without this option, L2 Auxiliary control register contents are 194 lost during off-mode entry on HS/EMU devices. This feature 195 requires support from PPA / boot-loader in HS/EMU devices, which 196 currently does not exist by default. 197 198config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID 199 int "Service ID for the support routine to set L2 AUX control" 200 depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE 201 default 43 202 help 203 PPA routine service ID for setting L2 auxiliary control register. 204 | |
| 205comment "OMAP Core Type" 206 depends on ARCH_OMAP2 207 208config SOC_OMAP2420 209 bool "OMAP2420 support" 210 depends on ARCH_OMAP2 211 default y | 157comment "OMAP Core Type" 158 depends on ARCH_OMAP2 159 160config SOC_OMAP2420 161 bool "OMAP2420 support" 162 depends on ARCH_OMAP2 163 default y |
| 164 select OMAP_DM_SYSTIMER |
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| 212 select OMAP_DM_TIMER 213 select SOC_HAS_OMAP2_SDRC 214 215config SOC_OMAP2430 216 bool "OMAP2430 support" 217 depends on ARCH_OMAP2 218 default y 219 select SOC_HAS_OMAP2_SDRC --- 60 unchanged lines hidden --- | 165 select OMAP_DM_TIMER 166 select SOC_HAS_OMAP2_SDRC 167 168config SOC_OMAP2430 169 bool "OMAP2430 support" 170 depends on ARCH_OMAP2 171 default y 172 select SOC_HAS_OMAP2_SDRC --- 60 unchanged lines hidden --- |