| Kconfig (4de3a8e101150feaefa1139611a50ff37467f33e) | Kconfig (716a3dc20084da9b3ab17bd125005a5345e23e3b) |
|---|---|
| 1if ARCH_OMAP2PLUS 2 3menu "TI OMAP2/3/4 Specific Features" 4 5config ARCH_OMAP2PLUS_TYPICAL 6 bool "Typical OMAP configuration" 7 default y 8 select AEABI --- 352 unchanged lines hidden (view full) --- 361 If you know that none of your system initiators will attempt to 362 access SDRAM during CORE DVFS, select Y here. This should boost 363 SDRAM performance at lower CORE OPPs. There are relatively few 364 users who will wish to say yes at this point - almost everyone will 365 wish to say no. Selecting yes without understanding what is 366 going on could result in system crashes; 367 368config OMAP4_ERRATA_I688 | 1if ARCH_OMAP2PLUS 2 3menu "TI OMAP2/3/4 Specific Features" 4 5config ARCH_OMAP2PLUS_TYPICAL 6 bool "Typical OMAP configuration" 7 default y 8 select AEABI --- 352 unchanged lines hidden (view full) --- 361 If you know that none of your system initiators will attempt to 362 access SDRAM during CORE DVFS, select Y here. This should boost 363 SDRAM performance at lower CORE OPPs. There are relatively few 364 users who will wish to say yes at this point - almost everyone will 365 wish to say no. Selecting yes without understanding what is 366 going on could result in system crashes; 367 368config OMAP4_ERRATA_I688 |
| 369 bool "OMAP4 errata: Async Bridge Corruption" 370 depends on ARCH_OMAP4 | 369 bool "OMAP4 errata: Async Bridge Corruption (BROKEN)" 370 depends on ARCH_OMAP4 && BROKEN |
| 371 select ARCH_HAS_BARRIERS 372 help 373 If a data is stalled inside asynchronous bridge because of back 374 pressure, it may be accepted multiple times, creating pointer 375 misalignment that will corrupt next transfers on that data path 376 until next reset of the system (No recovery procedure once the 377 issue is hit, the path remains consistently broken). Async bridge 378 can be found on path between MPU to EMIF and MPU to L3 interconnect. --- 13 unchanged lines hidden --- | 371 select ARCH_HAS_BARRIERS 372 help 373 If a data is stalled inside asynchronous bridge because of back 374 pressure, it may be accepted multiple times, creating pointer 375 misalignment that will corrupt next transfers on that data path 376 until next reset of the system (No recovery procedure once the 377 issue is hit, the path remains consistently broken). Async bridge 378 can be found on path between MPU to EMIF and MPU to L3 interconnect. --- 13 unchanged lines hidden --- |