clock.h (ecf0aa5317b0ad6bb015128a5b763c954fd58708) clock.h (c73b9099da4fb5703abaa804a0377850eea66cb5)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * linux/arch/arm/mach-omap1/clock.h
4 *
5 * Copyright (C) 2004 - 2005, 2009 Nokia corporation
6 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
7 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
8 */
9
10#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
11#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
12
13#include <linux/clk.h>
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * linux/arch/arm/mach-omap1/clock.h
4 *
5 * Copyright (C) 2004 - 2005, 2009 Nokia corporation
6 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
7 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
8 */
9
10#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
11#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
12
13#include <linux/clk.h>
14#include <linux/list.h>
15
16#include <linux/clkdev.h>
14#include <linux/clkdev.h>
15#include <linux/clk-provider.h>
17
18struct module;
16
17struct module;
19struct clk;
18struct omap1_clk;
20
21struct omap_clk {
22 u16 cpu;
23 struct clk_lookup lk;
24};
25
26#define CLK(dev, con, ck, cp) \
27 { \
28 .cpu = cp, \
29 .lk = { \
30 .dev_id = dev, \
31 .con_id = con, \
19
20struct omap_clk {
21 u16 cpu;
22 struct clk_lookup lk;
23};
24
25#define CLK(dev, con, ck, cp) \
26 { \
27 .cpu = cp, \
28 .lk = { \
29 .dev_id = dev, \
30 .con_id = con, \
32 .clk = ck, \
31 .clk_hw = ck, \
33 }, \
34 }
35
36/* Platform flags for the clkdev-OMAP integration code */
37#define CK_310 (1 << 0)
38#define CK_7XX (1 << 1) /* 7xx, 850 */
39#define CK_1510 (1 << 2)
40#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */
41#define CK_1710 (1 << 4) /* 1710 extra for rate selection */
42
32 }, \
33 }
34
35/* Platform flags for the clkdev-OMAP integration code */
36#define CK_310 (1 << 0)
37#define CK_7XX (1 << 1) /* 7xx, 850 */
38#define CK_1510 (1 << 2)
39#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */
40#define CK_1710 (1 << 4) /* 1710 extra for rate selection */
41
43
44/* Temporary, needed during the common clock framework conversion */
45#define __clk_get_name(clk) (clk->name)
46
47/**
48 * struct clkops - some clock function pointers
49 * @enable: fn ptr that enables the current clock in hardware
50 * @disable: fn ptr that enables the current clock in hardware
51 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
52 */
53struct clkops {
42/**
43 * struct clkops - some clock function pointers
44 * @enable: fn ptr that enables the current clock in hardware
45 * @disable: fn ptr that enables the current clock in hardware
46 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
47 */
48struct clkops {
54 int (*enable)(struct clk *);
55 void (*disable)(struct clk *);
49 int (*enable)(struct omap1_clk *clk);
50 void (*disable)(struct omap1_clk *clk);
56};
57
58/*
59 * struct clk.flags possibilities
60 *
61 * XXX document the rest of the clock flags here
62 */
63#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
64#define CLOCK_IDLE_CONTROL (1 << 1)
65#define CLOCK_NO_IDLE_PARENT (1 << 2)
66
67/**
51};
52
53/*
54 * struct clk.flags possibilities
55 *
56 * XXX document the rest of the clock flags here
57 */
58#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
59#define CLOCK_IDLE_CONTROL (1 << 1)
60#define CLOCK_NO_IDLE_PARENT (1 << 2)
61
62/**
68 * struct clk - OMAP struct clk
69 * @node: list_head connecting this clock into the full clock list
63 * struct omap1_clk - OMAP1 struct clk
64 * @hw: struct clk_hw for common clock framework integration
70 * @ops: struct clkops * for this clock
65 * @ops: struct clkops * for this clock
71 * @name: the name of the clock in the hardware (used in hwmod data and debug)
72 * @parent: pointer to this clock's parent struct clk
73 * @children: list_head connecting to the child clks' @sibling list_heads
74 * @sibling: list_head connecting this clk to its parent clk's @children
75 * @rate: current clock rate
76 * @enable_reg: register to write to enable the clock (see @enable_bit)
77 * @recalc: fn ptr that returns the clock's current rate
78 * @set_rate: fn ptr that can change the clock's current rate
79 * @round_rate: fn ptr that can round the clock's current rate
80 * @init: fn ptr to do clock-specific initialization
81 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
66 * @rate: current clock rate
67 * @enable_reg: register to write to enable the clock (see @enable_bit)
68 * @recalc: fn ptr that returns the clock's current rate
69 * @set_rate: fn ptr that can change the clock's current rate
70 * @round_rate: fn ptr that can round the clock's current rate
71 * @init: fn ptr to do clock-specific initialization
72 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
82 * @usecount: number of users that have requested this clock to be enabled
83 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
84 * @flags: see "struct clk.flags possibilities" above
85 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
73 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
74 * @flags: see "struct clk.flags possibilities" above
75 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
86 *
87 * XXX @rate_offset should probably be removed and OMAP1
88 * clock code converted to use clksel.
89 *
90 * XXX @usecount is poorly named. It should be "enable_count" or
91 * something similar. "users" in the description refers to kernel
92 * code (core code or drivers) that have called clk_enable() and not
93 * yet called clk_disable(); the usecount of parent clocks is also
94 * incremented by the clock code when clk_enable() is called on child
95 * clocks and decremented by the clock code when clk_disable() is
96 * called on child clocks.
97 *
98 * XXX @usecount, @children, @sibling should be marked for
99 * internal use only.
100 *
101 * @children and @sibling are used to optimize parent-to-child clock
102 * tree traversals. (child-to-parent traversals use @parent.)
103 *
104 * XXX The notion of the clock's current rate probably needs to be
105 * separated from the clock's target rate.
106 */
76 */
107struct clk {
108 struct list_head node;
77struct omap1_clk {
78 struct clk_hw hw;
109 const struct clkops *ops;
79 const struct clkops *ops;
110 const char *name;
111 struct clk *parent;
112 struct list_head children;
113 struct list_head sibling; /* node for children */
114 unsigned long rate;
115 void __iomem *enable_reg;
80 unsigned long rate;
81 void __iomem *enable_reg;
116 unsigned long (*recalc)(struct clk *);
117 int (*set_rate)(struct clk *, unsigned long);
118 long (*round_rate)(struct clk *, unsigned long);
119 void (*init)(struct clk *);
82 unsigned long (*recalc)(struct omap1_clk *clk, unsigned long rate);
83 int (*set_rate)(struct omap1_clk *clk, unsigned long rate,
84 unsigned long p_rate);
85 long (*round_rate)(struct omap1_clk *clk, unsigned long rate,
86 unsigned long *p_rate);
87 int (*init)(struct omap1_clk *clk);
120 u8 enable_bit;
88 u8 enable_bit;
121 s8 usecount;
122 u8 fixed_div;
123 u8 flags;
124 u8 rate_offset;
89 u8 fixed_div;
90 u8 flags;
91 u8 rate_offset;
125#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
126 struct dentry *dent; /* For visible tree hierarchy */
127#endif
128};
92};
93#define to_omap1_clk(_hw) container_of(_hw, struct omap1_clk, hw)
129
94
130extern void clk_preinit(struct clk *clk);
131extern int clk_register(struct clk *clk);
132extern void clk_unregister(struct clk *clk);
133extern void propagate_rate(struct clk *clk);
134extern unsigned long followparent_recalc(struct clk *clk);
135unsigned long omap_fixed_divisor_recalc(struct clk *clk);
95void propagate_rate(struct omap1_clk *clk);
96unsigned long followparent_recalc(struct omap1_clk *clk, unsigned long p_rate);
97unsigned long omap_fixed_divisor_recalc(struct omap1_clk *clk, unsigned long p_rate);
136
98
137extern const struct clkops clkops_null;
99extern struct omap1_clk dummy_ck;
138
100
139extern struct clk dummy_ck;
140
141int omap1_clk_init(void);
142void omap1_clk_late_init(void);
101int omap1_clk_init(void);
102void omap1_clk_late_init(void);
143extern int omap1_clk_enable(struct clk *clk);
144extern void omap1_clk_disable(struct clk *clk);
145extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
146extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate);
147extern unsigned long omap1_ckctl_recalc(struct clk *clk);
148extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
149extern unsigned long omap1_sossi_recalc(struct clk *clk);
150extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);
151extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate);
152extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate);
153extern unsigned long omap1_uart_recalc(struct clk *clk);
154extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate);
155extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate);
156extern void omap1_init_ext_clk(struct clk *clk);
157extern int omap1_select_table_rate(struct clk *clk, unsigned long rate);
158extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate);
159extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);
160extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);
103unsigned long omap1_ckctl_recalc(struct omap1_clk *clk, unsigned long p_rate);
104long omap1_round_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);
105int omap1_set_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);
106unsigned long omap1_sossi_recalc(struct omap1_clk *clk, unsigned long p_rate);
107unsigned long omap1_ckctl_recalc_dsp_domain(struct omap1_clk *clk, unsigned long p_rate);
108int omap1_clk_set_rate_dsp_domain(struct omap1_clk *clk, unsigned long rate,
109 unsigned long p_rate);
110long omap1_round_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);
111int omap1_set_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);
112unsigned long omap1_uart_recalc(struct omap1_clk *clk, unsigned long p_rate);
113int omap1_set_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);
114long omap1_round_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);
115int omap1_init_ext_clk(struct omap1_clk *clk);
116int omap1_select_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);
117long omap1_round_to_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);
118int omap1_clk_set_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);
119long omap1_clk_round_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate,
120 unsigned long *p_rate);
161
121
162#ifdef CONFIG_OMAP_RESET_CLOCKS
163extern void omap1_clk_disable_unused(struct clk *clk);
164#else
165#define omap1_clk_disable_unused NULL
166#endif
167
168struct uart_clk {
122struct uart_clk {
169 struct clk clk;
170 unsigned long sysc_addr;
123 struct omap1_clk clk;
124 unsigned long sysc_addr;
171};
172
173/* Provide a method for preventing idling some ARM IDLECT clocks */
174struct arm_idlect1_clk {
125};
126
127/* Provide a method for preventing idling some ARM IDLECT clocks */
128struct arm_idlect1_clk {
175 struct clk clk;
176 unsigned long no_idle_count;
177 __u8 idlect_shift;
129 struct omap1_clk clk;
130 unsigned long no_idle_count;
131 __u8 idlect_shift;
178};
179
180/* ARM_CKCTL bit shifts */
181#define CKCTL_PERDIV_OFFSET 0
182#define CKCTL_LCDDIV_OFFSET 2
183#define CKCTL_ARMDIV_OFFSET 4
184#define CKCTL_DSPDIV_OFFSET 6
185#define CKCTL_TCDIV_OFFSET 8

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219#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */
220#define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */
221#define SWD_CLK_DIV_CTRL_SEL 0xfffe0874
222#define COM_CLK_DIV_CTRL_SEL 0xfffe0878
223#define SOFT_REQ_REG 0xfffe0834
224#define SOFT_REQ_REG2 0xfffe0880
225
226extern __u32 arm_idlect1_mask;
132};
133
134/* ARM_CKCTL bit shifts */
135#define CKCTL_PERDIV_OFFSET 0
136#define CKCTL_LCDDIV_OFFSET 2
137#define CKCTL_ARMDIV_OFFSET 4
138#define CKCTL_DSPDIV_OFFSET 6
139#define CKCTL_TCDIV_OFFSET 8

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173#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */
174#define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */
175#define SWD_CLK_DIV_CTRL_SEL 0xfffe0874
176#define COM_CLK_DIV_CTRL_SEL 0xfffe0878
177#define SOFT_REQ_REG 0xfffe0834
178#define SOFT_REQ_REG2 0xfffe0880
179
180extern __u32 arm_idlect1_mask;
227extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
181extern struct omap1_clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
228
229extern const struct clkops clkops_dspck;
230extern const struct clkops clkops_uart_16xx;
231extern const struct clkops clkops_generic;
232
233/* used for passing SoC type to omap1_{select,round_to}_table_rate() */
234extern u32 cpu_mask;
235
182
183extern const struct clkops clkops_dspck;
184extern const struct clkops clkops_uart_16xx;
185extern const struct clkops clkops_generic;
186
187/* used for passing SoC type to omap1_{select,round_to}_table_rate() */
188extern u32 cpu_mask;
189
190extern const struct clk_ops omap1_clk_null_ops;
191extern const struct clk_ops omap1_clk_gate_ops;
192extern const struct clk_ops omap1_clk_rate_ops;
193extern const struct clk_ops omap1_clk_full_ops;
194
236#endif
195#endif