clock.c (2457552d1e6f3183cd93f81c49a8da5fe8bb0e42) clock.c (0dfc242ff05fcc4bbef1e1bf4eed6f7d01e0cb44)
1/*
2 * linux/arch/arm/mach-omap1/clock.c
3 *
4 * Copyright (C) 2004 - 2005, 2009 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 *
7 * Modified to use omap shared clock framework by
8 * Tony Lindgren <tony@atomide.com>

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47{
48}
49
50const struct clkops clkops_dummy = {
51 .enable = clk_omap1_dummy_enable,
52 .disable = clk_omap1_dummy_disable,
53};
54
1/*
2 * linux/arch/arm/mach-omap1/clock.c
3 *
4 * Copyright (C) 2004 - 2005, 2009 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 *
7 * Modified to use omap shared clock framework by
8 * Tony Lindgren <tony@atomide.com>

--- 38 unchanged lines hidden (view full) ---

47{
48}
49
50const struct clkops clkops_dummy = {
51 .enable = clk_omap1_dummy_enable,
52 .disable = clk_omap1_dummy_disable,
53};
54
55/* XXX can be replaced with a fixed_divisor_recalc */
56unsigned long omap1_watchdog_recalc(struct clk *clk)
57{
58 return clk->parent->rate / 14;
59}
60
61unsigned long omap1_uart_recalc(struct clk *clk)
62{
63 unsigned int val = __raw_readl(clk->enable_reg);
64 return val & clk->enable_bit ? 48000000 : 12000000;
65}
66
67unsigned long omap1_sossi_recalc(struct clk *clk)
68{

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209
210/* MPU virtual clock functions */
211int omap1_select_table_rate(struct clk *clk, unsigned long rate)
212{
213 /* Find the highest supported frequency <= rate and switch to it */
214 struct mpu_rate * ptr;
215 unsigned long dpll1_rate, ref_rate;
216
55unsigned long omap1_uart_recalc(struct clk *clk)
56{
57 unsigned int val = __raw_readl(clk->enable_reg);
58 return val & clk->enable_bit ? 48000000 : 12000000;
59}
60
61unsigned long omap1_sossi_recalc(struct clk *clk)
62{

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203
204/* MPU virtual clock functions */
205int omap1_select_table_rate(struct clk *clk, unsigned long rate)
206{
207 /* Find the highest supported frequency <= rate and switch to it */
208 struct mpu_rate * ptr;
209 unsigned long dpll1_rate, ref_rate;
210
217 dpll1_rate = clk_get_rate(ck_dpll1_p);
218 ref_rate = clk_get_rate(ck_ref_p);
211 dpll1_rate = ck_dpll1_p->rate;
212 ref_rate = ck_ref_p->rate;
219
220 for (ptr = omap1_rate_table; ptr->rate; ptr++) {
221 if (ptr->xtal != ref_rate)
222 continue;
223
224 /* DPLL1 cannot be reprogrammed without risking system crash */
225 if (likely(dpll1_rate != 0) && ptr->pll_rate != dpll1_rate)
226 continue;

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301
302long omap1_round_to_table_rate(struct clk *clk, unsigned long rate)
303{
304 /* Find the highest supported frequency <= rate */
305 struct mpu_rate * ptr;
306 long highest_rate;
307 unsigned long ref_rate;
308
213
214 for (ptr = omap1_rate_table; ptr->rate; ptr++) {
215 if (ptr->xtal != ref_rate)
216 continue;
217
218 /* DPLL1 cannot be reprogrammed without risking system crash */
219 if (likely(dpll1_rate != 0) && ptr->pll_rate != dpll1_rate)
220 continue;

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295
296long omap1_round_to_table_rate(struct clk *clk, unsigned long rate)
297{
298 /* Find the highest supported frequency <= rate */
299 struct mpu_rate * ptr;
300 long highest_rate;
301 unsigned long ref_rate;
302
309 ref_rate = clk_get_rate(ck_ref_p);
303 ref_rate = ck_ref_p->rate;
310
311 highest_rate = -EINVAL;
312
313 for (ptr = omap1_rate_table; ptr->rate; ptr++) {
314 if (ptr->xtal != ref_rate)
315 continue;
316
317 highest_rate = ptr->rate;

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305 highest_rate = -EINVAL;
306
307 for (ptr = omap1_rate_table; ptr->rate; ptr++) {
308 if (ptr->xtal != ref_rate)
309 continue;
310
311 highest_rate = ptr->rate;

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