pmsu.c (3e328428d4d0abe257ee9342d3e370c6487e9601) pmsu.c (3076cc58c958090ad50acf50fc855845e3462523)
1/*
2 * Power Management Service Unit(PMSU) support for Armada 370/XP platforms.
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Yehuda Yitschak <yehuday@marvell.com>
7 * Gregory Clement <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

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17 */
18
19#define pr_fmt(fmt) "mvebu-pmsu: " fmt
20
21#include <linux/cpu_pm.h>
22#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/kernel.h>
1/*
2 * Power Management Service Unit(PMSU) support for Armada 370/XP platforms.
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Yehuda Yitschak <yehuday@marvell.com>
7 * Gregory Clement <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

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17 */
18
19#define pr_fmt(fmt) "mvebu-pmsu: " fmt
20
21#include <linux/cpu_pm.h>
22#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/kernel.h>
25#include <linux/mbus.h>
25#include <linux/of_address.h>
26#include <linux/platform_device.h>
27#include <linux/resource.h>
28#include <linux/smp.h>
29#include <asm/cacheflush.h>
30#include <asm/cp15.h>
31#include <asm/smp_plat.h>
32#include <asm/suspend.h>

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58#define PMSU_STATUS_AND_MASK_FIQ_MASK BIT(25)
59
60#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)
61
62/* PMSU fabric registers */
63#define L2C_NFABRIC_PM_CTL 0x4
64#define L2C_NFABRIC_PM_CTL_PWR_DOWN BIT(20)
65
26#include <linux/of_address.h>
27#include <linux/platform_device.h>
28#include <linux/resource.h>
29#include <linux/smp.h>
30#include <asm/cacheflush.h>
31#include <asm/cp15.h>
32#include <asm/smp_plat.h>
33#include <asm/suspend.h>

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59#define PMSU_STATUS_AND_MASK_FIQ_MASK BIT(25)
60
61#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)
62
63/* PMSU fabric registers */
64#define L2C_NFABRIC_PM_CTL 0x4
65#define L2C_NFABRIC_PM_CTL_PWR_DOWN BIT(20)
66
67#define SRAM_PHYS_BASE 0xFFFF0000
68#define BOOTROM_BASE 0xFFF00000
69#define BOOTROM_SIZE 0x100000
70
66extern void ll_disable_coherency(void);
67extern void ll_enable_coherency(void);
68
69extern void armada_370_xp_cpu_resume(void);
70
71static struct platform_device armada_xp_cpuidle_device = {
72 .name = "cpuidle-armada-370-xp",
73};

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80};
81
82void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
83{
84 writel(virt_to_phys(boot_addr), pmsu_mp_base +
85 PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
86}
87
71extern void ll_disable_coherency(void);
72extern void ll_enable_coherency(void);
73
74extern void armada_370_xp_cpu_resume(void);
75
76static struct platform_device armada_xp_cpuidle_device = {
77 .name = "cpuidle-armada-370-xp",
78};

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85};
86
87void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
88{
89 writel(virt_to_phys(boot_addr), pmsu_mp_base +
90 PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
91}
92
93extern unsigned char mvebu_boot_wa_start;
94extern unsigned char mvebu_boot_wa_end;
95
96/*
97 * This function sets up the boot address workaround needed for SMP
98 * boot on Armada 375 Z1 and cpuidle on Armada 370. It unmaps the
99 * BootROM Mbus window, and instead remaps a crypto SRAM into which a
100 * custom piece of code is copied to replace the problematic BootROM.
101 */
102int mvebu_setup_boot_addr_wa(unsigned int crypto_eng_target,
103 unsigned int crypto_eng_attribute,
104 phys_addr_t resume_addr_reg)
105{
106 void __iomem *sram_virt_base;
107 u32 code_len = &mvebu_boot_wa_end - &mvebu_boot_wa_start;
108
109 mvebu_mbus_del_window(BOOTROM_BASE, BOOTROM_SIZE);
110 mvebu_mbus_add_window_by_id(crypto_eng_target, crypto_eng_attribute,
111 SRAM_PHYS_BASE, SZ_64K);
112
113 sram_virt_base = ioremap(SRAM_PHYS_BASE, SZ_64K);
114 if (!sram_virt_base) {
115 pr_err("Unable to map SRAM to setup the boot address WA\n");
116 return -ENOMEM;
117 }
118
119 memcpy(sram_virt_base, &mvebu_boot_wa_start, code_len);
120
121 /*
122 * The last word of the code copied in SRAM must contain the
123 * physical base address of the PMSU register. We
124 * intentionally store this address in the native endianness
125 * of the system.
126 */
127 __raw_writel((unsigned long)resume_addr_reg,
128 sram_virt_base + code_len - 4);
129
130 iounmap(sram_virt_base);
131
132 return 0;
133}
134
88static int __init armada_370_xp_pmsu_init(void)
89{
90 struct device_node *np;
91 struct resource res;
92 int ret = 0;
93
94 np = of_find_matching_node(NULL, of_pmsu_table);
95 if (!np)

--- 204 unchanged lines hidden --- 		135static int __init armada_370_xp_pmsu_init(void)
136{
137 struct device_node *np;
138 struct resource res;
139 int ret = 0;
140
141 np = of_find_matching_node(NULL, of_pmsu_table);
142 if (!np)

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