| mxc.h (dca3a783400a18e2bf4503b1d4a85c4d0ca1a7e4) | mxc.h (3c03a2fed63881abf5ecb5596625157ecfc9e4eb) |
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| 1/* 2 * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved. 3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. --- 20 unchanged lines hidden (view full) --- 29#define MXC_CPU_MX1 1 30#define MXC_CPU_MX21 21 31#define MXC_CPU_MX25 25 32#define MXC_CPU_MX27 27 33#define MXC_CPU_MX31 31 34#define MXC_CPU_MX35 35 35#define MXC_CPU_MX51 51 36#define MXC_CPU_MX53 53 | 1/* 2 * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved. 3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. --- 20 unchanged lines hidden (view full) --- 29#define MXC_CPU_MX1 1 30#define MXC_CPU_MX21 21 31#define MXC_CPU_MX25 25 32#define MXC_CPU_MX27 27 33#define MXC_CPU_MX31 31 34#define MXC_CPU_MX35 35 35#define MXC_CPU_MX51 51 36#define MXC_CPU_MX53 53 |
| 37#define MXC_CPU_IMX6DL 0x61 38#define MXC_CPU_IMX6Q 0x63 |
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| 37 38#define IMX_CHIP_REVISION_1_0 0x10 39#define IMX_CHIP_REVISION_1_1 0x11 40#define IMX_CHIP_REVISION_1_2 0x12 41#define IMX_CHIP_REVISION_1_3 0x13 42#define IMX_CHIP_REVISION_2_0 0x20 43#define IMX_CHIP_REVISION_2_1 0x21 44#define IMX_CHIP_REVISION_2_2 0x22 --- 100 unchanged lines hidden (view full) --- 145# define mxc_cpu_type MXC_CPU_MX53 146# endif 147# define cpu_is_mx53() (mxc_cpu_type == MXC_CPU_MX53) 148#else 149# define cpu_is_mx53() (0) 150#endif 151 152#ifndef __ASSEMBLY__ | 39 40#define IMX_CHIP_REVISION_1_0 0x10 41#define IMX_CHIP_REVISION_1_1 0x11 42#define IMX_CHIP_REVISION_1_2 0x12 43#define IMX_CHIP_REVISION_1_3 0x13 44#define IMX_CHIP_REVISION_2_0 0x20 45#define IMX_CHIP_REVISION_2_1 0x21 46#define IMX_CHIP_REVISION_2_2 0x22 --- 100 unchanged lines hidden (view full) --- 147# define mxc_cpu_type MXC_CPU_MX53 148# endif 149# define cpu_is_mx53() (mxc_cpu_type == MXC_CPU_MX53) 150#else 151# define cpu_is_mx53() (0) 152#endif 153 154#ifndef __ASSEMBLY__ |
| 155static inline bool cpu_is_imx6dl(void) 156{ 157 return __mxc_cpu_type == MXC_CPU_IMX6DL; 158} |
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| 153 | 159 |
| 160static inline bool cpu_is_imx6q(void) 161{ 162 return __mxc_cpu_type == MXC_CPU_IMX6Q; 163} 164 |
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| 154struct cpu_op { 155 u32 cpu_rate; 156}; 157 158int tzic_enable_wake(void); 159 160extern struct cpu_op *(*get_cpu_op)(int *op); 161#endif 162 163#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) 164#define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) 165 166#endif /* __ASM_ARCH_MXC_H__ */ | 165struct cpu_op { 166 u32 cpu_rate; 167}; 168 169int tzic_enable_wake(void); 170 171extern struct cpu_op *(*get_cpu_op)(int *op); 172#endif 173 174#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) 175#define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) 176 177#endif /* __ASM_ARCH_MXC_H__ */ |