cpu.c (84a73014d86fd660822a20c032625e3afe99ca58) cpu.c (c553138fbd1ee193a19101a36fb0814607ab4e7b)
1#include <linux/err.h>
2#include <linux/module.h>
3#include <linux/io.h>
4#include <linux/of.h>
5#include <linux/of_address.h>
6#include <linux/slab.h>
7#include <linux/sys_soc.h>
8

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40
41void __init imx_set_aips(void __iomem *base)
42{
43 unsigned int reg;
44/*
45 * Set all MPROTx to be non-bufferable, trusted for R/W,
46 * not forced to user-mode.
47 */
1#include <linux/err.h>
2#include <linux/module.h>
3#include <linux/io.h>
4#include <linux/of.h>
5#include <linux/of_address.h>
6#include <linux/slab.h>
7#include <linux/sys_soc.h>
8

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40
41void __init imx_set_aips(void __iomem *base)
42{
43 unsigned int reg;
44/*
45 * Set all MPROTx to be non-bufferable, trusted for R/W,
46 * not forced to user-mode.
47 */
48 __raw_writel(0x77777777, base + 0x0);
49 __raw_writel(0x77777777, base + 0x4);
48 imx_writel(0x77777777, base + 0x0);
49 imx_writel(0x77777777, base + 0x4);
50
51/*
52 * Set all OPACRx to be non-bufferable, to not require
53 * supervisor privilege level for access, allow for
54 * write access and untrusted master access.
55 */
50
51/*
52 * Set all OPACRx to be non-bufferable, to not require
53 * supervisor privilege level for access, allow for
54 * write access and untrusted master access.
55 */
56 __raw_writel(0x0, base + 0x40);
57 __raw_writel(0x0, base + 0x44);
58 __raw_writel(0x0, base + 0x48);
59 __raw_writel(0x0, base + 0x4C);
60 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
61 __raw_writel(reg, base + 0x50);
56 imx_writel(0x0, base + 0x40);
57 imx_writel(0x0, base + 0x44);
58 imx_writel(0x0, base + 0x48);
59 imx_writel(0x0, base + 0x4C);
60 reg = imx_readl(base + 0x50) & 0x00FFFFFF;
61 imx_writel(reg, base + 0x50);
62}
63
64void __init imx_aips_allow_unprivileged_access(
65 const char *compat)
66{
67 void __iomem *aips_base_addr;
68 struct device_node *np;
69

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63
64void __init imx_aips_allow_unprivileged_access(
65 const char *compat)
66{
67 void __iomem *aips_base_addr;
68 struct device_node *np;
69

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