common.h (e9db15e3221f2efef205dc1df584a3ca21b58dfa) common.h (e57e4ab5fc2e4e58447d13493c3e567b61359523)
1/*
2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

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14#include <linux/reboot.h>
15
16struct irq_data;
17struct platform_device;
18struct pt_regs;
19struct clk;
20struct device_node;
21enum mxc_cpu_pwr_mode;
1/*
2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

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14#include <linux/reboot.h>
15
16struct irq_data;
17struct platform_device;
18struct pt_regs;
19struct clk;
20struct device_node;
21enum mxc_cpu_pwr_mode;
22struct of_device_id;
22
23void mx1_map_io(void);
24void mx21_map_io(void);
25void mx25_map_io(void);
26void mx27_map_io(void);
27void mx31_map_io(void);
28void mx35_map_io(void);
29void imx1_init_early(void);

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60 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
61void mxc_set_cpu_type(unsigned int type);
62void mxc_restart(enum reboot_mode, const char *);
63void mxc_arch_reset_init(void __iomem *);
64void mxc_arch_reset_init_dt(void);
65int mx51_revision(void);
66int mx53_revision(void);
67void imx_set_aips(void __iomem *);
23
24void mx1_map_io(void);
25void mx21_map_io(void);
26void mx25_map_io(void);
27void mx27_map_io(void);
28void mx31_map_io(void);
29void mx35_map_io(void);
30void imx1_init_early(void);

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61 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
62void mxc_set_cpu_type(unsigned int type);
63void mxc_restart(enum reboot_mode, const char *);
64void mxc_arch_reset_init(void __iomem *);
65void mxc_arch_reset_init_dt(void);
66int mx51_revision(void);
67int mx53_revision(void);
68void imx_set_aips(void __iomem *);
69void imx_aips_allow_unprivileged_access(const char *compat);
68int mxc_device_init(void);
69void imx_set_soc_revision(unsigned int rev);
70unsigned int imx_get_soc_revision(void);
71void imx_init_revision_from_anatop(void);
72struct device *imx_soc_device_init(void);
73
74enum mxc_cpu_pwr_mode {
75 WAIT_CLOCKED, /* wfi only */

--- 87 unchanged lines hidden --- 		70int mxc_device_init(void);
71void imx_set_soc_revision(unsigned int rev);
72unsigned int imx_get_soc_revision(void);
73void imx_init_revision_from_anatop(void);
74struct device *imx_soc_device_init(void);
75
76enum mxc_cpu_pwr_mode {
77 WAIT_CLOCKED, /* wfi only */

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