highbank.c (deb9b4ce97cbbf61a150f317badbeb7531aab276) | highbank.c (fdfa64a4b7e6253583fa49f26e676d119bc22e76) |
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1/* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT --- 11 unchanged lines hidden (view full) --- 20#include <linux/irqdomain.h> 21#include <linux/of.h> 22#include <linux/of_irq.h> 23#include <linux/of_platform.h> 24#include <linux/of_address.h> 25#include <linux/smp.h> 26 27#include <asm/cacheflush.h> | 1/* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT --- 11 unchanged lines hidden (view full) --- 20#include <linux/irqdomain.h> 21#include <linux/of.h> 22#include <linux/of_irq.h> 23#include <linux/of_platform.h> 24#include <linux/of_address.h> 25#include <linux/smp.h> 26 27#include <asm/cacheflush.h> |
28#include <asm/smp_plat.h> | |
29#include <asm/smp_scu.h> 30#include <asm/hardware/arm_timer.h> 31#include <asm/hardware/timer-sp.h> 32#include <asm/hardware/gic.h> 33#include <asm/hardware/cache-l2x0.h> 34#include <asm/mach/arch.h> 35#include <asm/mach/map.h> 36#include <asm/mach/time.h> | 28#include <asm/smp_scu.h> 29#include <asm/hardware/arm_timer.h> 30#include <asm/hardware/timer-sp.h> 31#include <asm/hardware/gic.h> 32#include <asm/hardware/cache-l2x0.h> 33#include <asm/mach/arch.h> 34#include <asm/mach/map.h> 35#include <asm/mach/time.h> |
37#include <mach/irqs.h> | |
38 39#include "core.h" 40#include "sysregs.h" 41 42void __iomem *sregs_base; 43 44#define HB_SCU_VIRT_BASE 0xfee00000 45void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE)); --- 22 unchanged lines hidden (view full) --- 68 highbank_lluart_map_io(); 69} 70 71#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) 72#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) 73 74void highbank_set_cpu_jump(int cpu, void *jump_addr) 75{ | 36 37#include "core.h" 38#include "sysregs.h" 39 40void __iomem *sregs_base; 41 42#define HB_SCU_VIRT_BASE 0xfee00000 43void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE)); --- 22 unchanged lines hidden (view full) --- 66 highbank_lluart_map_io(); 67} 68 69#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) 70#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) 71 72void highbank_set_cpu_jump(int cpu, void *jump_addr) 73{ |
74#ifdef CONFIG_SMP |
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76 cpu = cpu_logical_map(cpu); | 75 cpu = cpu_logical_map(cpu); |
76#endif |
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77 writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu)); 78 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); 79 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), 80 HB_JUMP_TABLE_PHYS(cpu) + 15); 81} 82 83const static struct of_device_id irq_match[] = { 84 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, --- 65 unchanged lines hidden --- | 77 writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu)); 78 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); 79 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), 80 HB_JUMP_TABLE_PHYS(cpu) + 15); 81} 82 83const static struct of_device_id irq_match[] = { 84 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, --- 65 unchanged lines hidden --- |