highbank.c (53279f36dccffc26ff536003fd6bb97cc21c3b82) highbank.c (7a2848d369b2b9281400e6c9f08e21ec71cd1dcb)
1/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT

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23#include <linux/of_irq.h>
24#include <linux/of_platform.h>
25#include <linux/of_address.h>
26#include <linux/smp.h>
27#include <linux/amba/bus.h>
28
29#include <asm/cacheflush.h>
30#include <asm/smp_plat.h>
1/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT

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23#include <linux/of_irq.h>
24#include <linux/of_platform.h>
25#include <linux/of_address.h>
26#include <linux/smp.h>
27#include <linux/amba/bus.h>
28
29#include <asm/cacheflush.h>
30#include <asm/smp_plat.h>
31#include <asm/smp_scu.h>
32#include <asm/smp_twd.h>
33#include <asm/hardware/arm_timer.h>
34#include <asm/hardware/timer-sp.h>
35#include <asm/hardware/gic.h>
36#include <asm/hardware/cache-l2x0.h>
37#include <asm/mach/arch.h>
31#include <asm/smp_twd.h>
32#include <asm/hardware/arm_timer.h>
33#include <asm/hardware/timer-sp.h>
34#include <asm/hardware/gic.h>
35#include <asm/hardware/cache-l2x0.h>
36#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39#include <asm/mach/time.h>
40
41#include "core.h"
42#include "sysregs.h"
43
44void __iomem *sregs_base;
37#include <asm/mach/time.h>
38
39#include "core.h"
40#include "sysregs.h"
41
42void __iomem *sregs_base;
43void __iomem *scu_base_addr;
45
44
46#define HB_SCU_VIRT_BASE 0xfee00000
47void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
48
49static struct map_desc scu_io_desc __initdata = {
50 .virtual = HB_SCU_VIRT_BASE,
51 .pfn = 0, /* run-time */
52 .length = SZ_4K,
53 .type = MT_DEVICE,
54};
55
56static void __init highbank_scu_map_io(void)
57{
58 unsigned long base;
59
60 /* Get SCU base */
61 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
62
45static void __init highbank_scu_map_io(void)
46{
47 unsigned long base;
48
49 /* Get SCU base */
50 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
51
63 scu_io_desc.pfn = __phys_to_pfn(base);
64 iotable_init(&scu_io_desc, 1);
52 scu_base_addr = ioremap(base, SZ_4K);
65}
66
67static void __init highbank_map_io(void)
68{
53}
54
55static void __init highbank_map_io(void)
56{
69 highbank_scu_map_io();
70 highbank_lluart_map_io();
71}
72
73#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
74#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
75
76void highbank_set_cpu_jump(int cpu, void *jump_addr)
77{

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94 highbank_smc1(0x102, 0x0);
95}
96#endif
97
98static void __init highbank_init_irq(void)
99{
100 of_irq_init(irq_match);
101
57 highbank_lluart_map_io();
58}
59
60#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
61#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
62
63void highbank_set_cpu_jump(int cpu, void *jump_addr)
64{

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81 highbank_smc1(0x102, 0x0);
82}
83#endif
84
85static void __init highbank_init_irq(void)
86{
87 of_irq_init(irq_match);
88
89 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
90 highbank_scu_map_io();
91
102#ifdef CONFIG_CACHE_L2X0
103 /* Enable PL310 L2 Cache controller */
104 highbank_smc1(0x102, 0x1);
105 l2x0_of_init(0, ~0UL);
106 outer_cache.disable = highbank_l2x0_disable;
107#endif
108}
109

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140
141static struct sys_timer highbank_timer = {
142 .init = highbank_timer_init,
143};
144
145static void highbank_power_off(void)
146{
147 hignbank_set_pwr_shutdown();
92#ifdef CONFIG_CACHE_L2X0
93 /* Enable PL310 L2 Cache controller */
94 highbank_smc1(0x102, 0x1);
95 l2x0_of_init(0, ~0UL);
96 outer_cache.disable = highbank_l2x0_disable;
97#endif
98}
99

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130
131static struct sys_timer highbank_timer = {
132 .init = highbank_timer_init,
133};
134
135static void highbank_power_off(void)
136{
137 hignbank_set_pwr_shutdown();
148 scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
149
150 while (1)
151 cpu_do_idle();
152}
153
154static int highbank_platform_notifier(struct notifier_block *nb,
155 unsigned long event, void *__dev)
156{

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139 while (1)
140 cpu_do_idle();
141}
142
143static int highbank_platform_notifier(struct notifier_block *nb,
144 unsigned long event, void *__dev)
145{

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