| firmware.c (1225ad72866b440574a22372b9edceb035632f2b) | firmware.c (af9971144dde808338919cb4f3849ea2ac60739f) |
|---|---|
| 1/* 2 * Copyright (C) 2012 Samsung Electronics. 3 * Kyungmin Park <kyungmin.park@samsung.com> 4 * Tomasz Figa <t.figa@samsung.com> 5 * 6 * This program is free software,you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 35 unchanged lines hidden (view full) --- 44 switch (mode) { 45 case FW_DO_IDLE_AFTR: 46 if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) 47 exynos_save_cp15(); 48 __raw_writel(virt_to_phys(exynos_cpu_resume_ns), 49 sysram_ns_base_addr + 0x24); 50 __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); 51 if (soc_is_exynos3250()) { | 1/* 2 * Copyright (C) 2012 Samsung Electronics. 3 * Kyungmin Park <kyungmin.park@samsung.com> 4 * Tomasz Figa <t.figa@samsung.com> 5 * 6 * This program is free software,you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 35 unchanged lines hidden (view full) --- 44 switch (mode) { 45 case FW_DO_IDLE_AFTR: 46 if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) 47 exynos_save_cp15(); 48 __raw_writel(virt_to_phys(exynos_cpu_resume_ns), 49 sysram_ns_base_addr + 0x24); 50 __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); 51 if (soc_is_exynos3250()) { |
| 52 flush_cache_all(); |
|
| 52 exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE, 53 SMC_POWERSTATE_IDLE, 0); 54 exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER, 55 SMC_POWERSTATE_IDLE, 0); 56 } else 57 exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0); 58 break; 59 case FW_DO_IDLE_SLEEP: --- 197 unchanged lines hidden --- | 53 exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE, 54 SMC_POWERSTATE_IDLE, 0); 55 exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER, 56 SMC_POWERSTATE_IDLE, 0); 57 } else 58 exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0); 59 break; 60 case FW_DO_IDLE_SLEEP: --- 197 unchanged lines hidden --- |