da850.c (1474f44ec832c80f62e22019a6aee19bec6439a8) da850.c (aa9aa1ec2df6ffb270cf98b848570ed58e11a1f9)
1/*
2 * TI DA850/OMAP-L138 chip specific setup
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/da830.c
7 * Original Copyrights follow:
8 *

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498 CLK("davinci-mcasp.0", NULL, &mcasp_clk),
499 CLK("davinci-mcbsp.0", NULL, &mcbsp0_clk),
500 CLK("davinci-mcbsp.1", NULL, &mcbsp1_clk),
501 CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
502 CLK("da830-mmc.0", NULL, &mmcsd0_clk),
503 CLK("da830-mmc.1", NULL, &mmcsd1_clk),
504 CLK("ti-aemif", NULL, &aemif_clk),
505 CLK(NULL, "aemif", &aemif_clk),
1/*
2 * TI DA850/OMAP-L138 chip specific setup
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/da830.c
7 * Original Copyrights follow:
8 *

--- 489 unchanged lines hidden (view full) ---

498 CLK("davinci-mcasp.0", NULL, &mcasp_clk),
499 CLK("davinci-mcbsp.0", NULL, &mcbsp0_clk),
500 CLK("davinci-mcbsp.1", NULL, &mcbsp1_clk),
501 CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
502 CLK("da830-mmc.0", NULL, &mmcsd0_clk),
503 CLK("da830-mmc.1", NULL, &mmcsd1_clk),
504 CLK("ti-aemif", NULL, &aemif_clk),
505 CLK(NULL, "aemif", &aemif_clk),
506 CLK("ohci", "usb11", &usb11_clk),
507 CLK("musb-da8xx", "usb20", &usb20_clk),
506 CLK(NULL, "usb11", &usb11_clk),
507 CLK(NULL, "usb20", &usb20_clk),
508 CLK("spi_davinci.0", NULL, &spi0_clk),
509 CLK("spi_davinci.1", NULL, &spi1_clk),
510 CLK("vpif", NULL, &vpif_clk),
511 CLK("ahci_da850", NULL, &sata_clk),
512 CLK("davinci-rproc.0", NULL, &dsp_clk),
513 CLK("ehrpwm", "fck", &ehrpwm_clk),
514 CLK("ehrpwm", "tbclk", &ehrpwm_tbclk),
515 CLK("ecap", "fck", &ecap_clk),

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1167}
1168
1169static int da850_round_armrate(struct clk *clk, unsigned long rate)
1170{
1171 return clk->rate;
1172}
1173#endif
1174
508 CLK("spi_davinci.0", NULL, &spi0_clk),
509 CLK("spi_davinci.1", NULL, &spi1_clk),
510 CLK("vpif", NULL, &vpif_clk),
511 CLK("ahci_da850", NULL, &sata_clk),
512 CLK("davinci-rproc.0", NULL, &dsp_clk),
513 CLK("ehrpwm", "fck", &ehrpwm_clk),
514 CLK("ehrpwm", "tbclk", &ehrpwm_tbclk),
515 CLK("ecap", "fck", &ecap_clk),

--- 651 unchanged lines hidden (view full) ---

1167}
1168
1169static int da850_round_armrate(struct clk *clk, unsigned long rate)
1170{
1171 return clk->rate;
1172}
1173#endif
1174
1175int __init da850_register_pm(struct platform_device *pdev)
1176{
1177 int ret;
1178 struct davinci_pm_config *pdata = pdev->dev.platform_data;
1179
1180 ret = davinci_cfg_reg(DA850_RTC_ALARM);
1181 if (ret)
1182 return ret;
1183
1184 pdata->ddr2_ctlr_base = da8xx_get_mem_ctlr();
1185 pdata->deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG);
1186 pdata->ddrpsc_num = DA8XX_LPSC1_EMIF3C;
1187
1188 pdata->cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K);
1189 if (!pdata->cpupll_reg_base)
1190 return -ENOMEM;
1191
1192 pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
1193 if (!pdata->ddrpll_reg_base) {
1194 ret = -ENOMEM;
1195 goto no_ddrpll_mem;
1196 }
1197
1198 pdata->ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K);
1199 if (!pdata->ddrpsc_reg_base) {
1200 ret = -ENOMEM;
1201 goto no_ddrpsc_mem;
1202 }
1203
1204 return platform_device_register(pdev);
1205
1206no_ddrpsc_mem:
1207 iounmap(pdata->ddrpll_reg_base);
1208no_ddrpll_mem:
1209 iounmap(pdata->cpupll_reg_base);
1210 return ret;
1211}
1212
1213/* VPIF resource, platform data */
1214static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32);
1215
1216static struct resource da850_vpif_resource[] = {
1217 {
1218 .start = DA8XX_VPIF_BASE,
1219 .end = DA8XX_VPIF_BASE + 0xfff,
1220 .flags = IORESOURCE_MEM,

--- 133 unchanged lines hidden ---
1175/* VPIF resource, platform data */
1176static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32);
1177
1178static struct resource da850_vpif_resource[] = {
1179 {
1180 .start = DA8XX_VPIF_BASE,
1181 .end = DA8XX_VPIF_BASE + 0xfff,
1182 .flags = IORESOURCE_MEM,

--- 133 unchanged lines hidden ---