| tls.h (87a0b2fafc09766d8c55461a18345a1cfb10a7fe) | tls.h (75fa4adc4f50ee52d8cdfa3e84798176ccb4a354) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef __ASMARM_TLS_H 3#define __ASMARM_TLS_H 4 5#include <linux/compiler.h> 6#include <asm/thread_info.h> 7 8#ifdef __ASSEMBLY__ --- 4 unchanged lines hidden (view full) --- 13 .macro switch_tls_v6k, base, tp, tpuser, tmp1, tmp2 14 mrc p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register 15 @ TLS register update is deferred until return to user space 16 mcr p15, 0, \tpuser, c13, c0, 2 @ set the user r/w register 17 str \tmp2, [\base, #TI_TP_VALUE + 4] @ save it 18 .endm 19 20 .macro switch_tls_v6, base, tp, tpuser, tmp1, tmp2 | 1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef __ASMARM_TLS_H 3#define __ASMARM_TLS_H 4 5#include <linux/compiler.h> 6#include <asm/thread_info.h> 7 8#ifdef __ASSEMBLY__ --- 4 unchanged lines hidden (view full) --- 13 .macro switch_tls_v6k, base, tp, tpuser, tmp1, tmp2 14 mrc p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register 15 @ TLS register update is deferred until return to user space 16 mcr p15, 0, \tpuser, c13, c0, 2 @ set the user r/w register 17 str \tmp2, [\base, #TI_TP_VALUE + 4] @ save it 18 .endm 19 20 .macro switch_tls_v6, base, tp, tpuser, tmp1, tmp2 |
| 21 ldr \tmp1, =elf_hwcap 22 ldr \tmp1, [\tmp1, #0] | 21#ifdef CONFIG_SMP 22ALT_SMP(nop) 23ALT_UP_B(.L0_\@) 24 .subsection 1 25#endif 26.L0_\@: 27 ldr_va \tmp1, elf_hwcap |
| 23 mov \tmp2, #0xffff0fff 24 tst \tmp1, #HWCAP_TLS @ hardware TLS available? 25 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0 | 28 mov \tmp2, #0xffff0fff 29 tst \tmp1, #HWCAP_TLS @ hardware TLS available? 30 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0 |
| 26 mrcne p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register 27 mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register 28 mcrne p15, 0, \tpuser, c13, c0, 2 @ set user r/w register 29 strne \tmp2, [\base, #TI_TP_VALUE + 4] @ save it | 31 beq .L2_\@ 32 mcr p15, 0, \tp, c13, c0, 3 @ yes, set TLS register 33#ifdef CONFIG_SMP 34 b .L1_\@ 35 .previous 36#endif 37.L1_\@: switch_tls_v6k \base, \tp, \tpuser, \tmp1, \tmp2 38.L2_\@: |
| 30 .endm 31 32 .macro switch_tls_software, base, tp, tpuser, tmp1, tmp2 33 mov \tmp1, #0xffff0fff 34 str \tp, [\tmp1, #-15] @ set TLS value at 0xffff0ff0 35 .endm | 39 .endm 40 41 .macro switch_tls_software, base, tp, tpuser, tmp1, tmp2 42 mov \tmp1, #0xffff0fff 43 str \tp, [\tmp1, #-15] @ set TLS value at 0xffff0ff0 44 .endm |
| 45#else 46#include <asm/smp_plat.h> |
|
| 36#endif 37 38#ifdef CONFIG_TLS_REG_EMUL 39#define tls_emu 1 40#define has_tls_reg 1 41#define defer_tls_reg_update 0 42#define switch_tls switch_tls_none 43#elif defined(CONFIG_CPU_V6) 44#define tls_emu 0 45#define has_tls_reg (elf_hwcap & HWCAP_TLS) | 47#endif 48 49#ifdef CONFIG_TLS_REG_EMUL 50#define tls_emu 1 51#define has_tls_reg 1 52#define defer_tls_reg_update 0 53#define switch_tls switch_tls_none 54#elif defined(CONFIG_CPU_V6) 55#define tls_emu 0 56#define has_tls_reg (elf_hwcap & HWCAP_TLS) |
| 46#define defer_tls_reg_update 0 | 57#define defer_tls_reg_update is_smp() |
| 47#define switch_tls switch_tls_v6 48#elif defined(CONFIG_CPU_32v6K) 49#define tls_emu 0 50#define has_tls_reg 1 51#define defer_tls_reg_update 1 52#define switch_tls switch_tls_v6k 53#else 54#define tls_emu 0 --- 21 unchanged lines hidden (view full) --- 76 * with a stale shadow state during context switch. 77 * 78 * If we're preempted here, switch_tls will load TPIDRURO from 79 * thread_info upon resuming execution and the following mcr 80 * is merely redundant. 81 */ 82 barrier(); 83 | 58#define switch_tls switch_tls_v6 59#elif defined(CONFIG_CPU_32v6K) 60#define tls_emu 0 61#define has_tls_reg 1 62#define defer_tls_reg_update 1 63#define switch_tls switch_tls_v6k 64#else 65#define tls_emu 0 --- 21 unchanged lines hidden (view full) --- 87 * with a stale shadow state during context switch. 88 * 89 * If we're preempted here, switch_tls will load TPIDRURO from 90 * thread_info upon resuming execution and the following mcr 91 * is merely redundant. 92 */ 93 barrier(); 94 |
| 84 if (!tls_emu && !defer_tls_reg_update) { 85 if (has_tls_reg) { | 95 if (!tls_emu) { 96 if (has_tls_reg && !defer_tls_reg_update) { |
| 86 asm("mcr p15, 0, %0, c13, c0, 3" 87 : : "r" (val)); | 97 asm("mcr p15, 0, %0, c13, c0, 3" 98 : : "r" (val)); |
| 88 } else { | 99 } else if (!has_tls_reg) { |
| 89#ifdef CONFIG_KUSER_HELPERS 90 /* 91 * User space must never try to access this 92 * directly. Expect your app to break 93 * eventually if you do so. The user helper 94 * at 0xffff0fe0 must be used instead. (see 95 * entry-armv.S for details) 96 */ --- 36 unchanged lines hidden --- | 100#ifdef CONFIG_KUSER_HELPERS 101 /* 102 * User space must never try to access this 103 * directly. Expect your app to break 104 * eventually if you do so. The user helper 105 * at 0xffff0fe0 must be used instead. (see 106 * entry-armv.S for details) 107 */ --- 36 unchanged lines hidden --- |