ptrace.h (d71e1352e240dea32d481ad8d662e8de4406ac7e) ptrace.h (26584853a44c58f3d6ac7360d697a2ddcd1a3efa)
1/*
2 * arch/arm/include/asm/ptrace.h
3 *
4 * Copyright (C) 1996-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

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45#define UND_MODE 0x0000001b
46#define SYSTEM_MODE 0x0000001f
47#define MODE32_BIT 0x00000010
48#define MODE_MASK 0x0000001f
49#define PSR_T_BIT 0x00000020
50#define PSR_F_BIT 0x00000040
51#define PSR_I_BIT 0x00000080
52#define PSR_A_BIT 0x00000100
1/*
2 * arch/arm/include/asm/ptrace.h
3 *
4 * Copyright (C) 1996-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

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45#define UND_MODE 0x0000001b
46#define SYSTEM_MODE 0x0000001f
47#define MODE32_BIT 0x00000010
48#define MODE_MASK 0x0000001f
49#define PSR_T_BIT 0x00000020
50#define PSR_F_BIT 0x00000040
51#define PSR_I_BIT 0x00000080
52#define PSR_A_BIT 0x00000100
53#define PSR_E_BIT 0x00000200
53#define PSR_J_BIT 0x01000000
54#define PSR_Q_BIT 0x08000000
55#define PSR_V_BIT 0x10000000
56#define PSR_C_BIT 0x20000000
57#define PSR_Z_BIT 0x40000000
58#define PSR_N_BIT 0x80000000
59
60/*

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67
68/*
69 * ARMv7 groups of APSR bits
70 */
71#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
72#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
73#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
74
54#define PSR_J_BIT 0x01000000
55#define PSR_Q_BIT 0x08000000
56#define PSR_V_BIT 0x10000000
57#define PSR_C_BIT 0x20000000
58#define PSR_Z_BIT 0x40000000
59#define PSR_N_BIT 0x80000000
60
61/*

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68
69/*
70 * ARMv7 groups of APSR bits
71 */
72#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
73#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
74#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
75
76/*
77 * Default endianness state
78 */
79#ifdef CONFIG_CPU_ENDIAN_BE8
80#define PSR_ENDSTATE PSR_E_BIT
81#else
82#define PSR_ENDSTATE 0
83#endif
84
75#ifndef __ASSEMBLY__
76
77/*
78 * This struct defines the way the registers are stored on the
79 * stack during a system call. Note that sizeof(struct pt_regs)
80 * has to be a multiple of 8.
81 */
82struct pt_regs {

--- 84 unchanged lines hidden --- 		85#ifndef __ASSEMBLY__
86
87/*
88 * This struct defines the way the registers are stored on the
89 * stack during a system call. Note that sizeof(struct pt_regs)
90 * has to be a multiple of 8.
91 */
92struct pt_regs {

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