ptrace.h (a2e6177c931793b4ffb30e722fce6fc7aaff9fa5) | ptrace.h (c7edc9e326d53ca5ef9bed82de0740c6b107d55b) |
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1/* 2 * arch/arm/include/asm/ptrace.h 3 * 4 * Copyright (C) 1996-2003 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 13 unchanged lines hidden (view full) --- 22 23#ifdef CONFIG_ARM_THUMB 24#define thumb_mode(regs) \ 25 (((regs)->ARM_cpsr & PSR_T_BIT)) 26#else 27#define thumb_mode(regs) (0) 28#endif 29 | 1/* 2 * arch/arm/include/asm/ptrace.h 3 * 4 * Copyright (C) 1996-2003 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 13 unchanged lines hidden (view full) --- 22 23#ifdef CONFIG_ARM_THUMB 24#define thumb_mode(regs) \ 25 (((regs)->ARM_cpsr & PSR_T_BIT)) 26#else 27#define thumb_mode(regs) (0) 28#endif 29 |
30#ifndef CONFIG_CPU_V7M | |
31#define isa_mode(regs) \ | 30#define isa_mode(regs) \ |
32 ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \ 33 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT)))) 34#else 35#define isa_mode(regs) 1 /* Thumb */ 36#endif | 31 ((((regs)->ARM_cpsr & PSR_J_BIT) >> 23) | \ 32 (((regs)->ARM_cpsr & PSR_T_BIT) >> 5)) |
37 38#define processor_mode(regs) \ 39 ((regs)->ARM_cpsr & MODE_MASK) 40 41#define interrupts_enabled(regs) \ 42 (!((regs)->ARM_cpsr & PSR_I_BIT)) 43 44#define fast_interrupts_enabled(regs) \ --- 34 unchanged lines hidden (view full) --- 79 80static inline long regs_return_value(struct pt_regs *regs) 81{ 82 return regs->ARM_r0; 83} 84 85#define instruction_pointer(regs) (regs)->ARM_pc 86 | 33 34#define processor_mode(regs) \ 35 ((regs)->ARM_cpsr & MODE_MASK) 36 37#define interrupts_enabled(regs) \ 38 (!((regs)->ARM_cpsr & PSR_I_BIT)) 39 40#define fast_interrupts_enabled(regs) \ --- 34 unchanged lines hidden (view full) --- 75 76static inline long regs_return_value(struct pt_regs *regs) 77{ 78 return regs->ARM_r0; 79} 80 81#define instruction_pointer(regs) (regs)->ARM_pc 82 |
83static inline void instruction_pointer_set(struct pt_regs *regs, 84 unsigned long val) 85{ 86 instruction_pointer(regs) = val; 87} 88 |
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87#ifdef CONFIG_SMP 88extern unsigned long profile_pc(struct pt_regs *regs); 89#else 90#define profile_pc(regs) instruction_pointer(regs) 91#endif 92 93#define predicate(x) ((x) & 0xf0000000) 94#define PREDICATE_ALWAYS 0xe0000000 --- 57 unchanged lines hidden --- | 89#ifdef CONFIG_SMP 90extern unsigned long profile_pc(struct pt_regs *regs); 91#else 92#define profile_pc(regs) instruction_pointer(regs) 93#endif 94 95#define predicate(x) ((x) & 0xf0000000) 96#define PREDICATE_ALWAYS 0xe0000000 --- 57 unchanged lines hidden --- |