mpu.h (a0995c0805b63c930b99970f2c9d5e4f167ca65b) mpu.h (5c9d9a1b3a540779ba3f2d5e81150b2d92dcb74a)
1#ifndef __ARM_MPU_H
2#define __ARM_MPU_H
3
4/* MPUIR layout */
5#define MPUIR_nU 1
6#define MPUIR_DREGION 8
7#define MPUIR_IREGION 16
8#define MPUIR_DREGION_SZMASK (0xFF << MPUIR_DREGION)
9#define MPUIR_IREGION_SZMASK (0xFF << MPUIR_IREGION)
10
11/* ID_MMFR0 data relevant to MPU */
12#define MMFR0_PMSA (0xF << 4)
13#define MMFR0_PMSAv7 (3 << 4)
14
15/* MPU D/I Size Register fields */
16#define MPU_RSR_SZ 1
17#define MPU_RSR_EN 0
1#ifndef __ARM_MPU_H
2#define __ARM_MPU_H
3
4/* MPUIR layout */
5#define MPUIR_nU 1
6#define MPUIR_DREGION 8
7#define MPUIR_IREGION 16
8#define MPUIR_DREGION_SZMASK (0xFF << MPUIR_DREGION)
9#define MPUIR_IREGION_SZMASK (0xFF << MPUIR_IREGION)
10
11/* ID_MMFR0 data relevant to MPU */
12#define MMFR0_PMSA (0xF << 4)
13#define MMFR0_PMSAv7 (3 << 4)
14
15/* MPU D/I Size Register fields */
16#define MPU_RSR_SZ 1
17#define MPU_RSR_EN 0
18#define MPU_RSR_SD 8
18
19
20/* Number of subregions (SD) */
21#define MPU_NR_SUBREGS 8
22#define MPU_MIN_SUBREG_SIZE 256
23
19/* The D/I RSR value for an enabled region spanning the whole of memory */
20#define MPU_RSR_ALL_MEM 63
21
22/* Individual bits in the DR/IR ACR */
23#define MPU_ACR_XN (1 << 12)
24#define MPU_ACR_SHARED (1 << 2)
25
26/* C, B and TEX[2:0] bits only have semantic meanings when grouped */

--- 58 unchanged lines hidden --- 		24/* The D/I RSR value for an enabled region spanning the whole of memory */
25#define MPU_RSR_ALL_MEM 63
26
27/* Individual bits in the DR/IR ACR */
28#define MPU_ACR_XN (1 << 12)
29#define MPU_ACR_SHARED (1 << 2)
30
31/* C, B and TEX[2:0] bits only have semantic meanings when grouped */

--- 58 unchanged lines hidden ---