exynos5250.dtsi (cdd5b5a9761fd66d17586e4f4ba6588c70e640ea) exynos5250.dtsi (a0f87a269f660cb41c2b38041183e3e31c69818d)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung Exynos5250 SoC device tree source
4 *
5 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 *
8 * Samsung Exynos5250 SoC device nodes are listed in this file.

--- 497 unchanged lines hidden (view full) ---

506 dmas = <&pdma0 5>, <&pdma0 4>;
507 dma-names = "tx", "rx";
508 #address-cells = <1>;
509 #size-cells = <0>;
510 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
511 clock-names = "spi", "spi_busclk0";
512 pinctrl-names = "default";
513 pinctrl-0 = <&spi0_bus>;
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung Exynos5250 SoC device tree source
4 *
5 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 *
8 * Samsung Exynos5250 SoC device nodes are listed in this file.

--- 497 unchanged lines hidden (view full) ---

506 dmas = <&pdma0 5>, <&pdma0 4>;
507 dma-names = "tx", "rx";
508 #address-cells = <1>;
509 #size-cells = <0>;
510 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
511 clock-names = "spi", "spi_busclk0";
512 pinctrl-names = "default";
513 pinctrl-0 = <&spi0_bus>;
514 fifo-depth = <256>;
514 };
515
516 spi_1: spi@12d30000 {
517 compatible = "samsung,exynos4210-spi";
518 status = "disabled";
519 reg = <0x12d30000 0x100>;
520 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
521 dmas = <&pdma1 5>, <&pdma1 4>;
522 dma-names = "tx", "rx";
523 #address-cells = <1>;
524 #size-cells = <0>;
525 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
526 clock-names = "spi", "spi_busclk0";
527 pinctrl-names = "default";
528 pinctrl-0 = <&spi1_bus>;
515 };
516
517 spi_1: spi@12d30000 {
518 compatible = "samsung,exynos4210-spi";
519 status = "disabled";
520 reg = <0x12d30000 0x100>;
521 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
522 dmas = <&pdma1 5>, <&pdma1 4>;
523 dma-names = "tx", "rx";
524 #address-cells = <1>;
525 #size-cells = <0>;
526 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
527 clock-names = "spi", "spi_busclk0";
528 pinctrl-names = "default";
529 pinctrl-0 = <&spi1_bus>;
530 fifo-depth = <64>;
529 };
530
531 spi_2: spi@12d40000 {
532 compatible = "samsung,exynos4210-spi";
533 status = "disabled";
534 reg = <0x12d40000 0x100>;
535 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
536 dmas = <&pdma0 7>, <&pdma0 6>;
537 dma-names = "tx", "rx";
538 #address-cells = <1>;
539 #size-cells = <0>;
540 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
541 clock-names = "spi", "spi_busclk0";
542 pinctrl-names = "default";
543 pinctrl-0 = <&spi2_bus>;
531 };
532
533 spi_2: spi@12d40000 {
534 compatible = "samsung,exynos4210-spi";
535 status = "disabled";
536 reg = <0x12d40000 0x100>;
537 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
538 dmas = <&pdma0 7>, <&pdma0 6>;
539 dma-names = "tx", "rx";
540 #address-cells = <1>;
541 #size-cells = <0>;
542 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
543 clock-names = "spi", "spi_busclk0";
544 pinctrl-names = "default";
545 pinctrl-0 = <&spi2_bus>;
546 fifo-depth = <64>;
544 };
545
546 mmc_0: mmc@12200000 {
547 compatible = "samsung,exynos5250-dw-mshc";
548 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
549 #address-cells = <1>;
550 #size-cells = <0>;
551 reg = <0x12200000 0x1000>;

--- 674 unchanged lines hidden --- 		547 };
548
549 mmc_0: mmc@12200000 {
550 compatible = "samsung,exynos5250-dw-mshc";
551 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
552 #address-cells = <1>;
553 #size-cells = <0>;
554 reg = <0x12200000 0x1000>;

--- 674 unchanged lines hidden ---