rv1126.dtsi (a23e1966932464e1c5226cb9ac4ce1d5fc10ba22) rv1126.dtsi (15db79e0bdcb883f0d7a678fe8701a270467a339)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6#include <dt-bindings/clock/rockchip,rv1126-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

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17
18 compatible = "rockchip,rv1126";
19
20 interrupt-parent = <&gic>;
21
22 aliases {
23 i2c0 = &i2c0;
24 i2c2 = &i2c2;
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6#include <dt-bindings/clock/rockchip,rv1126-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

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17
18 compatible = "rockchip,rv1126";
19
20 interrupt-parent = <&gic>;
21
22 aliases {
23 i2c0 = &i2c0;
24 i2c2 = &i2c2;
25 i2c3 = &i2c3;
25 serial0 = &uart0;
26 serial1 = &uart1;
27 serial2 = &uart2;
28 serial3 = &uart3;
29 serial4 = &uart4;
30 serial5 = &uart5;
31 };
32

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303 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
304 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
305 #dma-cells = <1>;
306 arm,pl330-periph-burst;
307 clocks = <&cru ACLK_DMAC>;
308 clock-names = "apb_pclk";
309 };
310
26 serial0 = &uart0;
27 serial1 = &uart1;
28 serial2 = &uart2;
29 serial3 = &uart3;
30 serial4 = &uart4;
31 serial5 = &uart5;
32 };
33

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304 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
305 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
306 #dma-cells = <1>;
307 arm,pl330-periph-burst;
308 clocks = <&cru ACLK_DMAC>;
309 clock-names = "apb_pclk";
310 };
311
312 i2c3: i2c@ff520000 {
313 compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
314 reg = <0xff520000 0x1000>;
315 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
316 clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
317 clock-names = "i2c", "pclk";
318 pinctrl-names = "default";
319 pinctrl-0 = <&i2c3m0_xfer>;
320 rockchip,grf = <&pmugrf>;
321 #address-cells = <1>;
322 #size-cells = <0>;
323 status = "disabled";
324 };
325
311 pwm11: pwm@ff550030 {
312 compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
313 reg = <0xff550030 0x10>;
314 clock-names = "pwm", "pclk";
315 clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
316 pinctrl-0 = <&pwm11m0_pins>;
317 pinctrl-names = "default";
318 #pwm-cells = <3>;

--- 305 unchanged lines hidden --- 		326 pwm11: pwm@ff550030 {
327 compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
328 reg = <0xff550030 0x10>;
329 clock-names = "pwm", "pclk";
330 clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
331 pinctrl-0 = <&pwm11m0_pins>;
332 pinctrl-names = "default";
333 #pwm-cells = <3>;

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