rv1126.dtsi (5d2d4a9f603a47403395408f64b1261ca61f6d50) rv1126.dtsi (9f35b08ab08b913abf65cc4ff8d2655ad7912d77)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6#include <dt-bindings/clock/rockchip,rv1126-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

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16 #size-cells = <1>;
17
18 compatible = "rockchip,rv1126";
19
20 interrupt-parent = <&gic>;
21
22 aliases {
23 i2c0 = &i2c0;
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6#include <dt-bindings/clock/rockchip,rv1126-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

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16 #size-cells = <1>;
17
18 compatible = "rockchip,rv1126";
19
20 interrupt-parent = <&gic>;
21
22 aliases {
23 i2c0 = &i2c0;
24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 cpu0: cpu@f00 {
31 device_type = "cpu";

--- 571 unchanged lines hidden --- 		30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 cpu0: cpu@f00 {
37 device_type = "cpu";

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