rv1126.dtsi (28b2ae4ab0d139b5e1d64e4cbb245f2661a83036) rv1126.dtsi (c5cb195053aebf9eafece6f54ac25fdf3e694df7)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6#include <dt-bindings/clock/rockchip,rv1126-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

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282 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
284 #dma-cells = <1>;
285 arm,pl330-periph-burst;
286 clocks = <&cru ACLK_DMAC>;
287 clock-names = "apb_pclk";
288 };
289
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6#include <dt-bindings/clock/rockchip,rv1126-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

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282 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
284 #dma-cells = <1>;
285 arm,pl330-periph-burst;
286 clocks = <&cru ACLK_DMAC>;
287 clock-names = "apb_pclk";
288 };
289
290 pwm11: pwm@ff550030 {
291 compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
292 reg = <0xff550030 0x10>;
293 clock-names = "pwm", "pclk";
294 clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
295 pinctrl-0 = <&pwm11m0_pins>;
296 pinctrl-names = "default";
297 #pwm-cells = <3>;
298 status = "disabled";
299 };
300
290 uart0: serial@ff560000 {
291 compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
292 reg = <0xff560000 0x100>;
293 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
294 clock-frequency = <24000000>;
295 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
296 clock-names = "baudclk", "apb_pclk";
297 dmas = <&dmac 5>, <&dmac 4>;

--- 294 unchanged lines hidden --- 		301 uart0: serial@ff560000 {
302 compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
303 reg = <0xff560000 0x100>;
304 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
305 clock-frequency = <24000000>;
306 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
307 clock-names = "baudclk", "apb_pclk";
308 dmas = <&dmac 5>, <&dmac 4>;

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