rk3128.dtsi (f87427158d268fe4747cc223de7a2523617b7475) rk3128.dtsi (d244d6cc718a048672bfb148a6bc9c593a0e1207)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4 */
5
6#include <dt-bindings/clock/rk3128-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

--- 397 unchanged lines hidden (view full) ---

406 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S_8CH>;
407 clock-names = "i2s_clk", "i2s_hclk";
408 dmas = <&pdma 14>, <&pdma 15>;
409 dma-names = "tx", "rx";
410 #sound-dai-cells = <0>;
411 status = "disabled";
412 };
413
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4 */
5
6#include <dt-bindings/clock/rk3128-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

--- 397 unchanged lines hidden (view full) ---

406 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S_8CH>;
407 clock-names = "i2s_clk", "i2s_hclk";
408 dmas = <&pdma 14>, <&pdma 15>;
409 dma-names = "tx", "rx";
410 #sound-dai-cells = <0>;
411 status = "disabled";
412 };
413
414 spdif: spdif@10204000 {
415 compatible = "rockchip,rk3128-spdif", "rockchip,rk3066-spdif";
416 reg = <0x10204000 0x1000>;
417 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
418 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
419 clock-names = "mclk", "hclk";
420 dmas = <&pdma 13>;
421 dma-names = "tx";
422 pinctrl-names = "default";
423 pinctrl-0 = <&spdif_tx>;
424 #sound-dai-cells = <0>;
425 status = "disabled";
426 };
427
414 sdmmc: mmc@10214000 {
415 compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
416 reg = <0x10214000 0x4000>;
417 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
418 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
419 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
420 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
421 dmas = <&pdma 10>;

--- 873 unchanged lines hidden --- 		428 sdmmc: mmc@10214000 {
429 compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
430 reg = <0x10214000 0x4000>;
431 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
432 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
433 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
434 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
435 dmas = <&pdma 10>;

--- 873 unchanged lines hidden ---