rk3128.dtsi (34069d12e239ae8f36dd96c378e4622fb1c42a76) rk3128.dtsi (2e9cbc4167da3134412ce47e4cdadbfdea30bbff)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4 */
5
6#include <dt-bindings/clock/rk3128-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

--- 412 unchanged lines hidden (view full) ---

421 resets = <&cru SRST_SARADC>;
422 reset-names = "saradc-apb";
423 #io-channel-cells = <1>;
424 status = "disabled";
425 };
426
427 i2c0: i2c@20072000 {
428 compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4 */
5
6#include <dt-bindings/clock/rk3128-cru.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h>

--- 412 unchanged lines hidden (view full) ---

421 resets = <&cru SRST_SARADC>;
422 reset-names = "saradc-apb";
423 #io-channel-cells = <1>;
424 status = "disabled";
425 };
426
427 i2c0: i2c@20072000 {
428 compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
429 reg = <20072000 0x1000>;
429 reg = <0x20072000 0x1000>;
430 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
431 clock-names = "i2c";
432 clocks = <&cru PCLK_I2C0>;
433 pinctrl-names = "default";
434 pinctrl-0 = <&i2c0_xfer>;
435 #address-cells = <1>;
436 #size-cells = <0>;
437 status = "disabled";

--- 479 unchanged lines hidden --- 		430 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
431 clock-names = "i2c";
432 clocks = <&cru PCLK_I2C0>;
433 pinctrl-names = "default";
434 pinctrl-0 = <&i2c0_xfer>;
435 #address-cells = <1>;
436 #size-cells = <0>;
437 status = "disabled";

--- 479 unchanged lines hidden ---