rk3036.dtsi (1580ccb6ed9dc76b8ff3e2d8912e8215c8b0fa6d) rk3036.dtsi (8bade1ad1f0821aef31f6a8fb1027ae292566d85)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3#include <dt-bindings/gpio/gpio.h>
4#include <dt-bindings/interrupt-controller/irq.h>
5#include <dt-bindings/interrupt-controller/arm-gic.h>
6#include <dt-bindings/pinctrl/rockchip.h>
7#include <dt-bindings/clock/rk3036-cru.h>
8#include <dt-bindings/soc/rockchip,boot-mode.h>

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548 clock-names = "i2c";
549 clocks = <&cru PCLK_I2C0>;
550 pinctrl-names = "default";
551 pinctrl-0 = <&i2c0_xfer>;
552 status = "disabled";
553 };
554
555 spi: spi@20074000 {
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3#include <dt-bindings/gpio/gpio.h>
4#include <dt-bindings/interrupt-controller/irq.h>
5#include <dt-bindings/interrupt-controller/arm-gic.h>
6#include <dt-bindings/pinctrl/rockchip.h>
7#include <dt-bindings/clock/rk3036-cru.h>
8#include <dt-bindings/soc/rockchip,boot-mode.h>

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548 clock-names = "i2c";
549 clocks = <&cru PCLK_I2C0>;
550 pinctrl-names = "default";
551 pinctrl-0 = <&i2c0_xfer>;
552 status = "disabled";
553 };
554
555 spi: spi@20074000 {
556 compatible = "rockchip,rockchip-spi";
556 compatible = "rockchip,rk3036-spi";
557 reg = <0x20074000 0x1000>;
558 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
557 reg = <0x20074000 0x1000>;
558 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cru PCLK_SPI>, <&cru SCLK_SPI>;
560 clock-names = "apb-pclk","spi_pclk";
559 clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
560 clock-names = "spiclk", "apb_pclk";
561 dmas = <&pdma 8>, <&pdma 9>;
562 dma-names = "tx", "rx";
563 pinctrl-names = "default";
564 pinctrl-0 = <&spi_txd &spi_rxd &spi_clk &spi_cs0>;
565 #address-cells = <1>;
566 #size-cells = <0>;
567 status = "disabled";
568 };

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561 dmas = <&pdma 8>, <&pdma 9>;
562 dma-names = "tx", "rx";
563 pinctrl-names = "default";
564 pinctrl-0 = <&spi_txd &spi_rxd &spi_clk &spi_cs0>;
565 #address-cells = <1>;
566 #size-cells = <0>;
567 status = "disabled";
568 };

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