| axs10x.c (2ef6765ccaab2c69470d7049d9a9bf6456a6e666) | axs10x.c (fbd1cec57064aa1380726ec899c49fcd84e702b9) |
|---|---|
| 1/* 2 * AXS101/AXS103 Software Development Platform 3 * 4 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 306 unchanged lines hidden (view full) --- 315 * which defaults to 100 MHz. However recent failures of Quad config 316 * revealed P&R timing violations so clamp it down to safe 50 MHz 317 * Instead of duplicating defconfig/DT for SMP/QUAD, add a small hack 318 * of fudging the freq in DT 319 */ 320 unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F; 321 if (num_cores > 2) { 322 u32 freq = 50, orig; | 1/* 2 * AXS101/AXS103 Software Development Platform 3 * 4 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 306 unchanged lines hidden (view full) --- 315 * which defaults to 100 MHz. However recent failures of Quad config 316 * revealed P&R timing violations so clamp it down to safe 50 MHz 317 * Instead of duplicating defconfig/DT for SMP/QUAD, add a small hack 318 * of fudging the freq in DT 319 */ 320 unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F; 321 if (num_cores > 2) { 322 u32 freq = 50, orig; |
| 323 /* 324 * TODO: use cpu node "cpu-freq" param instead of platform-specific 325 * "/cpu_card/core_clk" as it works only if we use fixed-clock for cpu. 326 */ | |
| 327 int off = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk"); 328 const struct fdt_property *prop; 329 330 prop = fdt_get_property(initial_boot_params, off, | 323 int off = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk"); 324 const struct fdt_property *prop; 325 326 prop = fdt_get_property(initial_boot_params, off, |
| 331 "clock-frequency", NULL); | 327 "assigned-clock-rates", NULL); |
| 332 orig = be32_to_cpu(*(u32*)(prop->data)) / 1000000; 333 334 /* Patching .dtb in-place with new core clock value */ 335 if (freq != orig ) { 336 freq = cpu_to_be32(freq * 1000000); 337 fdt_setprop_inplace(initial_boot_params, off, | 328 orig = be32_to_cpu(*(u32*)(prop->data)) / 1000000; 329 330 /* Patching .dtb in-place with new core clock value */ 331 if (freq != orig ) { 332 freq = cpu_to_be32(freq * 1000000); 333 fdt_setprop_inplace(initial_boot_params, off, |
| 338 "clock-frequency", &freq, sizeof(freq)); | 334 "assigned-clock-rates", &freq, sizeof(freq)); |
| 339 } 340 } 341#endif 342 343 /* Memory maps already config in pre-bootloader */ 344 345 /* set GPIO mux to UART */ 346 iowrite32(0x01, (void __iomem *) CREG_CPU_GPIO_UART_MUX); --- 50 unchanged lines hidden --- | 335 } 336 } 337#endif 338 339 /* Memory maps already config in pre-bootloader */ 340 341 /* set GPIO mux to UART */ 342 iowrite32(0x01, (void __iomem *) CREG_CPU_GPIO_UART_MUX); --- 50 unchanged lines hidden --- |