unaligned.c (75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37) unaligned.c (ecaa054fc4c65ad337ec57aef2c6b041e0ef8f91)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2011-2012 Synopsys (www.synopsys.com)
4 *
5 * vineetg : May 2011
6 * -Adapted (from .26 to .35)
7 * -original contribution by Tim.yao@amlogic.com
8 */

--- 223 unchanged lines hidden (view full) ---

232 if (!state.write)
233 fixup_load(&state, regs, cregs);
234 else
235 fixup_store(&state, regs, cregs);
236
237 if (state.fault)
238 goto fault;
239
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2011-2012 Synopsys (www.synopsys.com)
4 *
5 * vineetg : May 2011
6 * -Adapted (from .26 to .35)
7 * -original contribution by Tim.yao@amlogic.com
8 */

--- 223 unchanged lines hidden (view full) ---

232 if (!state.write)
233 fixup_load(&state, regs, cregs);
234 else
235 fixup_store(&state, regs, cregs);
236
237 if (state.fault)
238 goto fault;
239
240 /* clear any remanants of delay slot */
240 /* clear any remnants of delay slot */
241 if (delay_mode(regs)) {
242 regs->ret = regs->bta & ~1U;
243 regs->status32 &= ~STATUS_DE_MASK;
244 } else {
245 regs->ret += state.instr_len;
246
247 /* handle zero-overhead-loop */
248 if ((regs->ret == regs->lp_end) && (regs->lp_count)) {

--- 14 unchanged lines hidden --- 		241 if (delay_mode(regs)) {
242 regs->ret = regs->bta & ~1U;
243 regs->status32 &= ~STATUS_DE_MASK;
244 } else {
245 regs->ret += state.instr_len;
246
247 /* handle zero-overhead-loop */
248 if ((regs->ret == regs->lp_end) && (regs->lp_count)) {

--- 14 unchanged lines hidden ---