devtree.c (8d0d56ba24d8d0b04bc9d9a7fbd1796d8966159f) | devtree.c (5fa2daaa8d8223d06fcdba171a7a668dc8e8b179) |
---|---|
1/* 2 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * Based on reduced version of METAG 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 19 unchanged lines hidden (view full) --- 28 29static void __init arc_set_early_base_baud(unsigned long dt_root) 30{ 31 unsigned int core_clk = arc_get_core_freq(); 32 33 if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x")) 34 arc_base_baud = core_clk/3; 35 else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp")) | 1/* 2 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * Based on reduced version of METAG 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. --- 19 unchanged lines hidden (view full) --- 28 29static void __init arc_set_early_base_baud(unsigned long dt_root) 30{ 31 unsigned int core_clk = arc_get_core_freq(); 32 33 if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x")) 34 arc_base_baud = core_clk/3; 35 else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp")) |
36 arc_base_baud = 33333333; /* Fixed 33MHz clk */ | 36 arc_base_baud = 33333333; /* Fixed 33MHz clk (AXS10x) */ |
37 else 38 arc_base_baud = core_clk; 39} 40#else 41#define arc_set_early_base_baud(dt_root) 42#endif 43 44static const void * __init arch_get_next_mach(const char *const **match) --- 42 unchanged lines hidden --- | 37 else 38 arc_base_baud = core_clk; 39} 40#else 41#define arc_set_early_base_baud(dt_root) 42#endif 43 44static const void * __init arch_get_next_mach(const char *const **match) --- 42 unchanged lines hidden --- |