axc003.dtsi (75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37) | axc003.dtsi (05b1be68c4d6d76970025e6139bfd735c2256ee5) |
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1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 4 */ 5 6/* 7 * Device tree for AXC003 CPU card: HS38x UP configuration 8 */ --- 115 unchanged lines hidden (view full) --- 124 * So here we mimic a direct connection betwen them, ignoring the 125 * ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core) 126 * instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO) 127 * 128 * This intc actually resides on MB, but we move it here to 129 * avoid duplicating the MB dtsi file given that IRQ from 130 * this intc to cpu intc are different for axs101 and axs103 131 */ | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 4 */ 5 6/* 7 * Device tree for AXC003 CPU card: HS38x UP configuration 8 */ --- 115 unchanged lines hidden (view full) --- 124 * So here we mimic a direct connection betwen them, ignoring the 125 * ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core) 126 * instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO) 127 * 128 * This intc actually resides on MB, but we move it here to 129 * avoid duplicating the MB dtsi file given that IRQ from 130 * this intc to cpu intc are different for axs101 and axs103 131 */ |
132 mb_intc: dw-apb-ictl@e0012000 { | 132 mb_intc: interrupt-controller@e0012000 { |
133 #interrupt-cells = <1>; 134 compatible = "snps,dw-apb-ictl"; 135 reg = < 0x0 0xe0012000 0x0 0x200 >; 136 interrupt-controller; 137 interrupt-parent = <&core_intc>; 138 interrupts = < 24 >; 139 }; 140 --- 21 unchanged lines hidden --- | 133 #interrupt-cells = <1>; 134 compatible = "snps,dw-apb-ictl"; 135 reg = < 0x0 0xe0012000 0x0 0x200 >; 136 interrupt-controller; 137 interrupt-parent = <&core_intc>; 138 interrupts = < 24 >; 139 }; 140 --- 21 unchanged lines hidden --- |