axc003.dtsi (3e83dfd5d8e374328078f527f1f7d189824896ab) axc003.dtsi (f6a09bace0bb9587985b48ed652f2b292f8de0de)
1/*
2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8

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19
20 cpu_card {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
24
25 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
26
1/*
2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8

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19
20 cpu_card {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
24
25 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
26
27 core_clk: core_clk {
27 input_clk: input-clk {
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
30 clock-frequency = <90000000>;
30 clock-frequency = <33333333>;
31 };
32
31 };
32
33 core_clk: core-clk@80 {
34 compatible = "snps,axs10x-arc-pll-clock";
35 reg = <0x80 0x10>, <0x100 0x10>;
36 #clock-cells = <0>;
37 clocks = <&input_clk>;
38 };
39
33 core_intc: archs-intc@cpu {
34 compatible = "snps,archs-intc";
35 interrupt-controller;
36 #interrupt-cells = <1>;
37 };
38
39 /*
40 * this GPIO block ORs all interrupts on CPU card (creg,..)

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40 core_intc: archs-intc@cpu {
41 compatible = "snps,archs-intc";
42 interrupt-controller;
43 #interrupt-cells = <1>;
44 };
45
46 /*
47 * this GPIO block ORs all interrupts on CPU card (creg,..)

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