axc001.dtsi (9a652cc01e589e10e2aa341074ea240c9838102b) axc001.dtsi (0efacbbaee1e94e9942da0912f5b46ffd45a74bd)
1/*
2 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Device tree for AXC001 770D/EM6/AS221 CPU card
11 * Note that this file only supports the 770D CPU
12 */
13
1/*
2 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Device tree for AXC001 770D/EM6/AS221 CPU card
11 * Note that this file only supports the 770D CPU
12 */
13
14/include/ "skeleton.dtsi"
15
14/ {
15 compatible = "snps,arc";
16 clock-frequency = <750000000>; /* 750 MHZ */
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 cpu_card {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
24
25 ranges = <0x00000000 0xf0000000 0x10000000>;
26
16/ {
17 compatible = "snps,arc";
18 clock-frequency = <750000000>; /* 750 MHZ */
19 #address-cells = <1>;
20 #size-cells = <1>;
21
22 cpu_card {
23 compatible = "simple-bus";
24 #address-cells = <1>;
25 #size-cells = <1>;
26
27 ranges = <0x00000000 0xf0000000 0x10000000>;
28
27 cpu_intc: arc700-intc@cpu {
29 core_clk: core_clk {
30 #clock-cells = <0>;
31 compatible = "fixed-clock";
32 clock-frequency = <750000000>;
33 };
34
35 core_intc: arc700-intc@cpu {
28 compatible = "snps,arc700-intc";
29 interrupt-controller;
30 #interrupt-cells = <1>;
31 };
32
33 /*
34 * this GPIO block ORs all interrupts on CPU card (creg,..)
35 * to uplink only 1 IRQ to ARC core intc

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43 ictl_intc: gpio-controller@0 {
44 compatible = "snps,dw-apb-gpio-port";
45 gpio-controller;
46 #gpio-cells = <2>;
47 snps,nr-gpios = <30>;
48 reg = <0>;
49 interrupt-controller;
50 #interrupt-cells = <2>;
36 compatible = "snps,arc700-intc";
37 interrupt-controller;
38 #interrupt-cells = <1>;
39 };
40
41 /*
42 * this GPIO block ORs all interrupts on CPU card (creg,..)
43 * to uplink only 1 IRQ to ARC core intc

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51 ictl_intc: gpio-controller@0 {
52 compatible = "snps,dw-apb-gpio-port";
53 gpio-controller;
54 #gpio-cells = <2>;
55 snps,nr-gpios = <30>;
56 reg = <0>;
57 interrupt-controller;
58 #interrupt-cells = <2>;
51 interrupt-parent = <&cpu_intc>;
59 interrupt-parent = <&core_intc>;
52 interrupts = <15>;
53 };
54 };
55
56 debug_uart: dw-apb-uart@0x5000 {
57 compatible = "snps,dw-apb-uart";
58 reg = <0x5000 0x100>;
59 clock-frequency = <33333000>;

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81 * avoid duplicating the MB dtsi file given that IRQ from
82 * this intc to cpu intc are different for axs101 and axs103
83 */
84 mb_intc: dw-apb-ictl@0xe0012000 {
85 #interrupt-cells = <1>;
86 compatible = "snps,dw-apb-ictl";
87 reg = < 0xe0012000 0x200 >;
88 interrupt-controller;
60 interrupts = <15>;
61 };
62 };
63
64 debug_uart: dw-apb-uart@0x5000 {
65 compatible = "snps,dw-apb-uart";
66 reg = <0x5000 0x100>;
67 clock-frequency = <33333000>;

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89 * avoid duplicating the MB dtsi file given that IRQ from
90 * this intc to cpu intc are different for axs101 and axs103
91 */
92 mb_intc: dw-apb-ictl@0xe0012000 {
93 #interrupt-cells = <1>;
94 compatible = "snps,dw-apb-ictl";
95 reg = < 0xe0012000 0x200 >;
96 interrupt-controller;
89 interrupt-parent = <&cpu_intc>;
97 interrupt-parent = <&core_intc>;
90 interrupts = < 7 >;
91 };
92
93 memory {
94 #address-cells = <1>;
95 #size-cells = <1>;
98 interrupts = < 7 >;
99 };
100
101 memory {
102 #address-cells = <1>;
103 #size-cells = <1>;
96 ranges = <0x00000000 0x80000000 0x20000000>;
104 ranges = <0x00000000 0x80000000 0x40000000>;
97 device_type = "memory";
105 device_type = "memory";
98 reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */
106 reg = <0x80000000 0x20000000>; /* 512MiB */
99 };
107 };
100
101 reserved-memory {
102 #address-cells = <1>;
103 #size-cells = <1>;
104 ranges;
105 /*
106 * We just move frame buffer area to the very end of
107 * available DDR. And even though in case of ARC770 there's
108 * no strict requirement for a frame-buffer to be in any
109 * particular location it allows us to use the same
110 * base board's DT node for ARC PGU as for ARc HS38.
111 */
112 frame_buffer: frame_buffer@9e000000 {
113 compatible = "shared-dma-pool";
114 reg = <0x9e000000 0x2000000>;
115 no-map;
116 };
117 };
118};
108};