irq_pyxis.c (026477c1141b67e98e3bd8bdedb7d4b88a3ecd09) irq_pyxis.c (7ca56053b29633ef08b14e5ca16c663363edac36)
1/*
2 * linux/arch/alpha/kernel/irq_pyxis.c
3 *
4 * Based on code written by David A Rusling (david.rusling@reo.mts.dec.com).
5 *
6 * IRQ Code common to all PYXIS core logic chips.
7 */
8

--- 67 unchanged lines hidden (view full) ---

76 .shutdown = pyxis_disable_irq,
77 .enable = pyxis_enable_irq,
78 .disable = pyxis_disable_irq,
79 .ack = pyxis_mask_and_ack_irq,
80 .end = pyxis_end_irq,
81};
82
83void
1/*
2 * linux/arch/alpha/kernel/irq_pyxis.c
3 *
4 * Based on code written by David A Rusling (david.rusling@reo.mts.dec.com).
5 *
6 * IRQ Code common to all PYXIS core logic chips.
7 */
8

--- 67 unchanged lines hidden (view full) ---

76 .shutdown = pyxis_disable_irq,
77 .enable = pyxis_enable_irq,
78 .disable = pyxis_disable_irq,
79 .ack = pyxis_mask_and_ack_irq,
80 .end = pyxis_end_irq,
81};
82
83void
84pyxis_device_interrupt(unsigned long vector, struct pt_regs *regs)
84pyxis_device_interrupt(unsigned long vector)
85{
86 unsigned long pld;
87 unsigned int i;
88
89 /* Read the interrupt summary register of PYXIS */
90 pld = *(vulp)PYXIS_INT_REQ;
91 pld &= cached_irq_mask;
92
93 /*
94 * Now for every possible bit set, work through them and call
95 * the appropriate interrupt handler.
96 */
97 while (pld) {
98 i = ffz(~pld);
99 pld &= pld - 1; /* clear least bit set */
100 if (i == 7)
85{
86 unsigned long pld;
87 unsigned int i;
88
89 /* Read the interrupt summary register of PYXIS */
90 pld = *(vulp)PYXIS_INT_REQ;
91 pld &= cached_irq_mask;
92
93 /*
94 * Now for every possible bit set, work through them and call
95 * the appropriate interrupt handler.
96 */
97 while (pld) {
98 i = ffz(~pld);
99 pld &= pld - 1; /* clear least bit set */
100 if (i == 7)
101 isa_device_interrupt(vector, regs);
101 isa_device_interrupt(vector);
102 else
102 else
103 handle_irq(16+i, regs);
103 handle_irq(16+i, get_irq_regs());
104 }
105}
106
107void __init
108init_pyxis_irqs(unsigned long ignore_mask)
109{
110 long i;
111

--- 16 unchanged lines hidden --- 		104 }
105}
106
107void __init
108init_pyxis_irqs(unsigned long ignore_mask)
109{
110 long i;
111

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