reg-mux.yaml (3474b838f4204c21d108183d9268611d961a428f) reg-mux.yaml (4e71ed985389ce213003927cfa65c1352e70396c)
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Generic register bitfield-based multiplexer controller bindings
8

--- 11 unchanged lines hidden (view full) ---

20 - mmio-mux # parent device of mux controller is syscon device
21
22 reg: true
23
24 '#mux-control-cells':
25 const: 1
26
27 mux-reg-masks:
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Generic register bitfield-based multiplexer controller bindings
8

--- 11 unchanged lines hidden (view full) ---

20 - mmio-mux # parent device of mux controller is syscon device
21
22 reg: true
23
24 '#mux-control-cells':
25 const: 1
26
27 mux-reg-masks:
28 description: an array of register offset and pre-shifted bitfield mask
29 pairs, each describing a single mux control.
28 $ref: /schemas/types.yaml#/definitions/uint32-matrix
29 items:
30 items:
31 - description: register offset
32 - description: pre-shifted bitfield mask
33 description: Each entry pair describes a single mux control.
30
31 idle-states: true
32
33required:
34 - compatible
35 - mux-reg-masks
36 - '#mux-control-cells'
37

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91 };
92 };
93
94 - |
95 /* The parent device of mux controller is syscon device. */
96
97 #include <dt-bindings/mux/mux.h>
98 syscon@1000 {
34
35 idle-states: true
36
37required:
38 - compatible
39 - mux-reg-masks
40 - '#mux-control-cells'
41

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95 };
96 };
97
98 - |
99 /* The parent device of mux controller is syscon device. */
100
101 #include <dt-bindings/mux/mux.h>
102 syscon@1000 {
103 compatible = "fsl,imx7d-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";
99 reg = <0x1000 0x100>;
100
101 mux2: mux-controller {
102 compatible = "mmio-mux";
103 #mux-control-cells = <1>;
104
105 mux-reg-masks =
106 <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */

--- 36 unchanged lines hidden --- 		104 reg = <0x1000 0x100>;
105
106 mux2: mux-controller {
107 compatible = "mmio-mux";
108 #mux-control-cells = <1>;
109
110 mux-reg-masks =
111 <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */

--- 36 unchanged lines hidden ---