rtsx.c (2e8830678637f5c1757a228ceb2605387c6f97ef) rtsx.c (8290c144201804d3f01ae16eebe1b9a6b221af54)
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
5 * Copyright (c) 2012 Stefan Sperling <stsp@openbsd.org>
6 * Copyright (c) 2020 Henri Hennebert <hlh@restart.be>
7 * Copyright (c) 2020 Gary Jennejohn <gj@freebsd.org>
8 * Copyright (c) 2020 Jesper Schmitz Mouridsen <jsm@FreeBSD.org>

--- 158 unchanged lines hidden (view full) ---

167#define RTSX_RTS522A 0x522a
168#define RTSX_RTS525A 0x525a
169#define RTSX_RTS5249 0x5249
170#define RTSX_RTS5260 0x5260
171#define RTSX_RTL8402 0x5286
172#define RTSX_RTL8411 0x5289
173#define RTSX_RTL8411B 0x5287
174
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
5 * Copyright (c) 2012 Stefan Sperling <stsp@openbsd.org>
6 * Copyright (c) 2020 Henri Hennebert <hlh@restart.be>
7 * Copyright (c) 2020 Gary Jennejohn <gj@freebsd.org>
8 * Copyright (c) 2020 Jesper Schmitz Mouridsen <jsm@FreeBSD.org>

--- 158 unchanged lines hidden (view full) ---

167#define RTSX_RTS522A 0x522a
168#define RTSX_RTS525A 0x525a
169#define RTSX_RTS5249 0x5249
170#define RTSX_RTS5260 0x5260
171#define RTSX_RTL8402 0x5286
172#define RTSX_RTL8411 0x5289
173#define RTSX_RTL8411B 0x5287
174
175#define RTSX_VERSION "2.1f-1"
175#define RTSX_VERSION "2.1g"
176
177static const struct rtsx_device {
178 uint16_t vendor_id;
179 uint16_t device_id;
180 const char *desc;
181} rtsx_devices[] = {
176
177static const struct rtsx_device {
178 uint16_t vendor_id;
179 uint16_t device_id;
180 const char *desc;
181} rtsx_devices[] = {
182 { RTSX_REALTEK, RTSX_RTS5209, RTSX_VERSION " Realtek RTS5209 PCIe MMC/SD Card Reader"},
183 { RTSX_REALTEK, RTSX_RTS5227, RTSX_VERSION " Realtek RTS5227 PCIe MMC/SD Card Reader"},
184 { RTSX_REALTEK, RTSX_RTS5229, RTSX_VERSION " Realtek RTS5229 PCIe MMC/SD Card Reader"},
185 { RTSX_REALTEK, RTSX_RTS522A, RTSX_VERSION " Realtek RTS522A PCIe MMC/SD Card Reader"},
186 { RTSX_REALTEK, RTSX_RTS525A, RTSX_VERSION " Realtek RTS525A PCIe MMC/SD Card Reader"},
187 { RTSX_REALTEK, RTSX_RTS5249, RTSX_VERSION " Realtek RTS5249 PCIe MMC/SD Card Reader"},
188 { RTSX_REALTEK, RTSX_RTS5260, RTSX_VERSION " Realtek RTS5260 PCIe MMC/SD Card Reader"},
189 { RTSX_REALTEK, RTSX_RTL8402, RTSX_VERSION " Realtek RTL8402 PCIe MMC/SD Card Reader"},
190 { RTSX_REALTEK, RTSX_RTL8411, RTSX_VERSION " Realtek RTL8411 PCIe MMC/SD Card Reader"},
191 { RTSX_REALTEK, RTSX_RTL8411B, RTSX_VERSION " Realtek RTL8411B PCIe MMC/SD Card Reader"},
182 { RTSX_REALTEK, RTSX_RTS5209, RTSX_VERSION " Realtek RTS5209 PCIe SD Card Reader"},
183 { RTSX_REALTEK, RTSX_RTS5227, RTSX_VERSION " Realtek RTS5227 PCIe SD Card Reader"},
184 { RTSX_REALTEK, RTSX_RTS5229, RTSX_VERSION " Realtek RTS5229 PCIe SD Card Reader"},
185 { RTSX_REALTEK, RTSX_RTS522A, RTSX_VERSION " Realtek RTS522A PCIe SD Card Reader"},
186 { RTSX_REALTEK, RTSX_RTS525A, RTSX_VERSION " Realtek RTS525A PCIe SD Card Reader"},
187 { RTSX_REALTEK, RTSX_RTS5249, RTSX_VERSION " Realtek RTS5249 PCIe SD Card Reader"},
188 { RTSX_REALTEK, RTSX_RTS5260, RTSX_VERSION " Realtek RTS5260 PCIe SD Card Reader"},
189 { RTSX_REALTEK, RTSX_RTL8402, RTSX_VERSION " Realtek RTL8402 PCIe SD Card Reader"},
190 { RTSX_REALTEK, RTSX_RTL8411, RTSX_VERSION " Realtek RTL8411 PCIe SD Card Reader"},
191 { RTSX_REALTEK, RTSX_RTL8411B, RTSX_VERSION " Realtek RTL8411B PCIe SD Card Reader"},
192 { 0, 0, NULL}
193};
194
195/* See `kenv | grep smbios.system` */
196static const struct rtsx_inversion_model {
197 char *maker;
198 char *family;
199 char *product;

--- 681 unchanged lines hidden (view full) ---

881 sc->rtsx_card_drive_sel, sc->rtsx_sd30_drive_sel_3v3);
882 break;
883 }
884
885 if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
886 device_printf(sc->rtsx_dev, "rtsx_init() rtsx_flags: 0x%04x\n", sc->rtsx_flags);
887
888 /* Enable interrupts. */
192 { 0, 0, NULL}
193};
194
195/* See `kenv | grep smbios.system` */
196static const struct rtsx_inversion_model {
197 char *maker;
198 char *family;
199 char *product;

--- 681 unchanged lines hidden (view full) ---

881 sc->rtsx_card_drive_sel, sc->rtsx_sd30_drive_sel_3v3);
882 break;
883 }
884
885 if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
886 device_printf(sc->rtsx_dev, "rtsx_init() rtsx_flags: 0x%04x\n", sc->rtsx_flags);
887
888 /* Enable interrupts. */
889 sc->rtsx_intr_enabled = RTSX_TRANS_OK_INT_EN | RTSX_TRANS_FAIL_INT_EN | RTSX_SD_INT_EN | RTSX_MS_INT_EN;
889 sc->rtsx_intr_enabled = RTSX_TRANS_OK_INT_EN | RTSX_TRANS_FAIL_INT_EN | RTSX_SD_INT_EN;
890 WRITE4(sc, RTSX_BIER, sc->rtsx_intr_enabled);
891
892 /* Power on SSC clock. */
893 RTSX_CLR(sc, RTSX_FPDCTL, RTSX_SSC_POWER_DOWN);
894 /* Wait SSC power stable. */
895 DELAY(200);
896
897 /* Disable ASPM */

--- 132 unchanged lines hidden (view full) ---

1030 RTSX_WRITE(sc, RTSX_PERST_GLITCH_WIDTH, 0x80);
1031
1032 /* Set RC oscillator to 400K. */
1033 RTSX_CLR(sc, RTSX_RCCTL, RTSX_RCCTL_F_2M);
1034
1035 /* Enable interrupt write-clear (default is read-clear). */
1036 RTSX_CLR(sc, RTSX_NFTS_TX_CTRL, RTSX_INT_READ_CLR);
1037
890 WRITE4(sc, RTSX_BIER, sc->rtsx_intr_enabled);
891
892 /* Power on SSC clock. */
893 RTSX_CLR(sc, RTSX_FPDCTL, RTSX_SSC_POWER_DOWN);
894 /* Wait SSC power stable. */
895 DELAY(200);
896
897 /* Disable ASPM */

--- 132 unchanged lines hidden (view full) ---

1030 RTSX_WRITE(sc, RTSX_PERST_GLITCH_WIDTH, 0x80);
1031
1032 /* Set RC oscillator to 400K. */
1033 RTSX_CLR(sc, RTSX_RCCTL, RTSX_RCCTL_F_2M);
1034
1035 /* Enable interrupt write-clear (default is read-clear). */
1036 RTSX_CLR(sc, RTSX_NFTS_TX_CTRL, RTSX_INT_READ_CLR);
1037
1038 if (sc->rtsx_device_id == RTSX_RTS525A)
1038 switch (sc->rtsx_device_id) {
1039 case RTSX_RTS525A:
1040 case RTSX_RTS5260:
1039 RTSX_BITOP(sc, RTSX_PM_CLK_FORCE_CTL, 1, 1);
1041 RTSX_BITOP(sc, RTSX_PM_CLK_FORCE_CTL, 1, 1);
1042 break;
1043 }
1040
1041 /* OC power down. */
1042 RTSX_BITOP(sc, RTSX_FPDCTL, RTSX_SD_OC_POWER_DOWN, RTSX_SD_OC_POWER_DOWN);
1043
1044 /* Enable clk_request_n to enable clock power management */
1045 pci_write_config(sc->rtsx_dev, sc->rtsx_pcie_cap + PCIER_LINK_CTL + 1, 1, 1);
1046
1047 /* Enter L1 when host tx idle */

--- 155 unchanged lines hidden (view full) ---

1203 RTSX_BITOP(sc, RTSX_PETXCFG, 0xB0, 0xB0);
1204 else
1205 RTSX_BITOP(sc, RTSX_PETXCFG, 0xB0, 0x80);
1206 break;
1207 case RTSX_RTS5260:
1208 /* Set mcu_cnt to 7 to ensure data can be sampled properly. */
1209 RTSX_BITOP(sc, RTSX_CLK_DIV, 0x07, 0x07);
1210 RTSX_WRITE(sc, RTSX_SSC_DIV_N_0, 0x5D);
1044
1045 /* OC power down. */
1046 RTSX_BITOP(sc, RTSX_FPDCTL, RTSX_SD_OC_POWER_DOWN, RTSX_SD_OC_POWER_DOWN);
1047
1048 /* Enable clk_request_n to enable clock power management */
1049 pci_write_config(sc->rtsx_dev, sc->rtsx_pcie_cap + PCIER_LINK_CTL + 1, 1, 1);
1050
1051 /* Enter L1 when host tx idle */

--- 155 unchanged lines hidden (view full) ---

1207 RTSX_BITOP(sc, RTSX_PETXCFG, 0xB0, 0xB0);
1208 else
1209 RTSX_BITOP(sc, RTSX_PETXCFG, 0xB0, 0x80);
1210 break;
1211 case RTSX_RTS5260:
1212 /* Set mcu_cnt to 7 to ensure data can be sampled properly. */
1213 RTSX_BITOP(sc, RTSX_CLK_DIV, 0x07, 0x07);
1214 RTSX_WRITE(sc, RTSX_SSC_DIV_N_0, 0x5D);
1211 /* force no MDIO*/
1215 /* Force no MDIO */
1212 RTSX_WRITE(sc, RTSX_RTS5260_AUTOLOAD_CFG4, RTSX_RTS5260_MIMO_DISABLE);
1216 RTSX_WRITE(sc, RTSX_RTS5260_AUTOLOAD_CFG4, RTSX_RTS5260_MIMO_DISABLE);
1213 /*Modify SDVCC Tune Default Parameters!*/
1217 /* Modify SDVCC Tune Default Parameters! */
1214 RTSX_BITOP(sc, RTSX_LDO_VCC_CFG0, RTSX_RTS5260_DVCC_TUNE_MASK, RTSX_RTS5260_DVCC_33);
1218 RTSX_BITOP(sc, RTSX_LDO_VCC_CFG0, RTSX_RTS5260_DVCC_TUNE_MASK, RTSX_RTS5260_DVCC_33);
1219
1215 RTSX_BITOP(sc, RTSX_PCLK_CTL, RTSX_PCLK_MODE_SEL, RTSX_PCLK_MODE_SEL);
1220 RTSX_BITOP(sc, RTSX_PCLK_CTL, RTSX_PCLK_MODE_SEL, RTSX_PCLK_MODE_SEL);
1221
1216 RTSX_BITOP(sc, RTSX_L1SUB_CONFIG1, RTSX_AUX_CLK_ACTIVE_SEL_MASK, RTSX_MAC_CKSW_DONE);
1217 /* Rest L1SUB Config */
1218 RTSX_CLR(sc, RTSX_L1SUB_CONFIG3, 0xFF);
1219 RTSX_BITOP(sc, RTSX_PM_CLK_FORCE_CTL, RTSX_CLK_PM_EN, RTSX_CLK_PM_EN);
1222 RTSX_BITOP(sc, RTSX_L1SUB_CONFIG1, RTSX_AUX_CLK_ACTIVE_SEL_MASK, RTSX_MAC_CKSW_DONE);
1223 /* Rest L1SUB Config */
1224 RTSX_CLR(sc, RTSX_L1SUB_CONFIG3, 0xFF);
1225 RTSX_BITOP(sc, RTSX_PM_CLK_FORCE_CTL, RTSX_CLK_PM_EN, RTSX_CLK_PM_EN);
1226 RTSX_WRITE(sc, RTSX_PWD_SUSPEND_EN, 0xFF);
1220 RTSX_BITOP(sc, RTSX_PWR_GATE_CTRL, RTSX_PWR_GATE_EN, RTSX_PWR_GATE_EN);
1227 RTSX_BITOP(sc, RTSX_PWR_GATE_CTRL, RTSX_PWR_GATE_EN, RTSX_PWR_GATE_EN);
1221 RTSX_BITOP(sc, RTSX_RB_FLUSH, RTSX_U_AUTO_DMA_EN_MASK, RTSX_U_AUTO_DMA_DISABLE);
1228 RTSX_BITOP(sc, RTSX_REG_VREF, RTSX_PWD_SUSPND_EN, RTSX_PWD_SUSPND_EN);
1229 RTSX_BITOP(sc, RTSX_RBCTL, RTSX_U_AUTO_DMA_EN_MASK, RTSX_U_AUTO_DMA_DISABLE);
1222 if (sc->rtsx_flags & RTSX_F_REVERSE_SOCKET)
1223 RTSX_BITOP(sc, RTSX_PETXCFG, 0xB0, 0xB0);
1224 else
1225 RTSX_BITOP(sc, RTSX_PETXCFG, 0xB0, 0x80);
1226 RTSX_BITOP(sc, RTSX_OBFF_CFG, RTSX_OBFF_EN_MASK, RTSX_OBFF_DISABLE);
1230 if (sc->rtsx_flags & RTSX_F_REVERSE_SOCKET)
1231 RTSX_BITOP(sc, RTSX_PETXCFG, 0xB0, 0xB0);
1232 else
1233 RTSX_BITOP(sc, RTSX_PETXCFG, 0xB0, 0x80);
1234 RTSX_BITOP(sc, RTSX_OBFF_CFG, RTSX_OBFF_EN_MASK, RTSX_OBFF_DISABLE);
1235
1236 RTSX_CLR(sc, RTSX_RTS5260_DVCC_CTRL, RTSX_RTS5260_DVCC_OCP_EN | RTSX_RTS5260_DVCC_OCP_CL_EN);
1237
1238 /* CLKREQ# PIN will be forced to drive low. */
1239 RTSX_BITOP(sc, RTSX_PETXCFG, RTSX_FORCE_CLKREQ_DELINK_MASK, RTSX_FORCE_CLKREQ_LOW);
1240
1241 RTSX_CLR(sc, RTSX_RTS522A_PM_CTRL3, 0x10);
1227 break;
1228 case RTSX_RTL8402:
1229 case RTSX_RTL8411:
1230 RTSX_WRITE(sc, RTSX_SD30_CMD_DRIVE_SEL, sc->rtsx_sd30_drive_sel_3v3);
1231 RTSX_BITOP(sc, RTSX_CARD_PAD_CTL, RTSX_CD_DISABLE_MASK | RTSX_CD_AUTO_DISABLE,
1232 RTSX_CD_ENABLE);
1233 break;
1234 case RTSX_RTL8411B:

--- 232 unchanged lines hidden (view full) ---

1467 case RTSX_RTS5227:
1468 case RTSX_RTS5229:
1469 case RTSX_RTS522A:
1470 RTSX_BITOP(sc, RTSX_CARD_PWR_CTL, RTSX_SD_PWR_MASK | RTSX_PMOS_STRG_MASK,
1471 RTSX_SD_PWR_OFF | RTSX_PMOS_STRG_400mA);
1472 RTSX_CLR(sc, RTSX_PWR_GATE_CTRL, RTSX_LDO3318_PWR_MASK);
1473 break;
1474 case RTSX_RTS5260:
1242 break;
1243 case RTSX_RTL8402:
1244 case RTSX_RTL8411:
1245 RTSX_WRITE(sc, RTSX_SD30_CMD_DRIVE_SEL, sc->rtsx_sd30_drive_sel_3v3);
1246 RTSX_BITOP(sc, RTSX_CARD_PAD_CTL, RTSX_CD_DISABLE_MASK | RTSX_CD_AUTO_DISABLE,
1247 RTSX_CD_ENABLE);
1248 break;
1249 case RTSX_RTL8411B:

--- 232 unchanged lines hidden (view full) ---

1482 case RTSX_RTS5227:
1483 case RTSX_RTS5229:
1484 case RTSX_RTS522A:
1485 RTSX_BITOP(sc, RTSX_CARD_PWR_CTL, RTSX_SD_PWR_MASK | RTSX_PMOS_STRG_MASK,
1486 RTSX_SD_PWR_OFF | RTSX_PMOS_STRG_400mA);
1487 RTSX_CLR(sc, RTSX_PWR_GATE_CTRL, RTSX_LDO3318_PWR_MASK);
1488 break;
1489 case RTSX_RTS5260:
1490 rtsx_stop_cmd(sc);
1491 /* Switch vccq to 330 */
1492 RTSX_BITOP(sc, RTSX_LDO_CONFIG2, RTSX_DV331812_VDD1, RTSX_DV331812_VDD1);
1493 RTSX_BITOP(sc, RTSX_LDO_DV18_CFG, RTSX_DV331812_MASK, RTSX_DV331812_33);
1494 RTSX_CLR(sc, RTSX_SD_PAD_CTL, RTSX_SD_IO_USING_1V8);
1495 rtsx_rts5260_fill_driving(sc);
1496
1475 RTSX_BITOP(sc, RTSX_LDO_VCC_CFG1, RTSX_LDO_POW_SDVDD1_MASK, RTSX_LDO_POW_SDVDD1_OFF);
1476 RTSX_BITOP(sc, RTSX_LDO_CONFIG2, RTSX_DV331812_POWERON, RTSX_DV331812_POWEROFF);
1477 break;
1478 case RTSX_RTL8402:
1479 case RTSX_RTL8411:
1480 case RTSX_RTL8411B:
1481 RTSX_BITOP(sc, RTSX_CARD_PWR_CTL, RTSX_BPP_POWER_MASK,
1482 RTSX_BPP_POWER_OFF);

--- 187 unchanged lines hidden (view full) ---

1670 case RTSX_RTS5260:
1671 RTSX_BITOP(sc, RTSX_LDO_CONFIG2, RTSX_DV331812_VDD1, RTSX_DV331812_VDD1);
1672 RTSX_BITOP(sc, RTSX_LDO_VCC_CFG0, RTSX_RTS5260_DVCC_TUNE_MASK, RTSX_RTS5260_DVCC_33);
1673 RTSX_BITOP(sc, RTSX_LDO_VCC_CFG1, RTSX_LDO_POW_SDVDD1_MASK, RTSX_LDO_POW_SDVDD1_ON);
1674 RTSX_BITOP(sc, RTSX_LDO_CONFIG2, RTSX_DV331812_POWERON, RTSX_DV331812_POWERON);
1675
1676 DELAY(20000);
1677
1497 RTSX_BITOP(sc, RTSX_LDO_VCC_CFG1, RTSX_LDO_POW_SDVDD1_MASK, RTSX_LDO_POW_SDVDD1_OFF);
1498 RTSX_BITOP(sc, RTSX_LDO_CONFIG2, RTSX_DV331812_POWERON, RTSX_DV331812_POWEROFF);
1499 break;
1500 case RTSX_RTL8402:
1501 case RTSX_RTL8411:
1502 case RTSX_RTL8411B:
1503 RTSX_BITOP(sc, RTSX_CARD_PWR_CTL, RTSX_BPP_POWER_MASK,
1504 RTSX_BPP_POWER_OFF);

--- 187 unchanged lines hidden (view full) ---

1692 case RTSX_RTS5260:
1693 RTSX_BITOP(sc, RTSX_LDO_CONFIG2, RTSX_DV331812_VDD1, RTSX_DV331812_VDD1);
1694 RTSX_BITOP(sc, RTSX_LDO_VCC_CFG0, RTSX_RTS5260_DVCC_TUNE_MASK, RTSX_RTS5260_DVCC_33);
1695 RTSX_BITOP(sc, RTSX_LDO_VCC_CFG1, RTSX_LDO_POW_SDVDD1_MASK, RTSX_LDO_POW_SDVDD1_ON);
1696 RTSX_BITOP(sc, RTSX_LDO_CONFIG2, RTSX_DV331812_POWERON, RTSX_DV331812_POWERON);
1697
1698 DELAY(20000);
1699
1700 RTSX_BITOP(sc, RTSX_SD_CFG1, RTSX_SD_MODE_MASK | RTSX_SD_ASYNC_FIFO_NOT_RST,
1701 RTSX_SD30_MODE | RTSX_SD_ASYNC_FIFO_NOT_RST);
1702 RTSX_BITOP(sc, RTSX_CLK_CTL, RTSX_CHANGE_CLK, RTSX_CLK_LOW_FREQ);
1703 RTSX_WRITE(sc, RTSX_CARD_CLK_SOURCE,
1704 RTSX_CRC_VAR_CLK0 | RTSX_SD30_FIX_CLK | RTSX_SAMPLE_VAR_CLK1);
1705 RTSX_CLR(sc, RTSX_CLK_CTL, RTSX_CLK_LOW_FREQ);
1706
1678 /* Initialize SD_CFG1 register */
1679 RTSX_WRITE(sc, RTSX_SD_CFG1, RTSX_CLK_DIVIDE_128 | RTSX_SD20_MODE);
1680 RTSX_WRITE(sc, RTSX_SD_SAMPLE_POINT_CTL, RTSX_SD20_RX_POS_EDGE);
1681 RTSX_CLR(sc, RTSX_SD_PUSH_POINT_CTL, 0xff);
1707 /* Initialize SD_CFG1 register */
1708 RTSX_WRITE(sc, RTSX_SD_CFG1, RTSX_CLK_DIVIDE_128 | RTSX_SD20_MODE);
1709 RTSX_WRITE(sc, RTSX_SD_SAMPLE_POINT_CTL, RTSX_SD20_RX_POS_EDGE);
1710 RTSX_CLR(sc, RTSX_SD_PUSH_POINT_CTL, 0xff);
1682 RTSX_BITOP(sc, RTSX_CARD_STOP, RTSX_MS_STOP | RTSX_SD_CLR_ERR,
1683 RTSX_MS_STOP | RTSX_SD_CLR_ERR);
1711 RTSX_BITOP(sc, RTSX_CARD_STOP, RTSX_SD_STOP | RTSX_SD_CLR_ERR,
1712 RTSX_SD_STOP | RTSX_SD_CLR_ERR);
1684 /* Reset SD_CFG3 register */
1685 RTSX_CLR(sc, RTSX_SD_CFG3, RTSX_SD30_CLK_END_EN);
1686 RTSX_CLR(sc, RTSX_REG_SD_STOP_SDCLK_CFG,
1687 RTSX_SD30_CLK_STOP_CFG_EN | RTSX_SD30_CLK_STOP_CFG0 | RTSX_SD30_CLK_STOP_CFG1);
1688 RTSX_CLR(sc, RTSX_REG_PRE_RW_MODE, RTSX_EN_INFINITE_MODE);
1689 break;
1690 case RTSX_RTL8402:
1691 case RTSX_RTL8411:

--- 569 unchanged lines hidden (view full) ---

2261
2262 switch (sc->rtsx_device_id) {
2263 case RTSX_RTS5260:
2264 rtsx_write(sc, RTSX_RTS5260_DMA_RST_CTL_0,
2265 RTSX_RTS5260_DMA_RST | RTSX_RTS5260_ADMA3_RST,
2266 RTSX_RTS5260_DMA_RST | RTSX_RTS5260_ADMA3_RST);
2267 rtsx_write(sc, RTSX_RBCTL, RTSX_RB_FLUSH, RTSX_RB_FLUSH);
2268 break;
1713 /* Reset SD_CFG3 register */
1714 RTSX_CLR(sc, RTSX_SD_CFG3, RTSX_SD30_CLK_END_EN);
1715 RTSX_CLR(sc, RTSX_REG_SD_STOP_SDCLK_CFG,
1716 RTSX_SD30_CLK_STOP_CFG_EN | RTSX_SD30_CLK_STOP_CFG0 | RTSX_SD30_CLK_STOP_CFG1);
1717 RTSX_CLR(sc, RTSX_REG_PRE_RW_MODE, RTSX_EN_INFINITE_MODE);
1718 break;
1719 case RTSX_RTL8402:
1720 case RTSX_RTL8411:

--- 569 unchanged lines hidden (view full) ---

2290
2291 switch (sc->rtsx_device_id) {
2292 case RTSX_RTS5260:
2293 rtsx_write(sc, RTSX_RTS5260_DMA_RST_CTL_0,
2294 RTSX_RTS5260_DMA_RST | RTSX_RTS5260_ADMA3_RST,
2295 RTSX_RTS5260_DMA_RST | RTSX_RTS5260_ADMA3_RST);
2296 rtsx_write(sc, RTSX_RBCTL, RTSX_RB_FLUSH, RTSX_RB_FLUSH);
2297 break;
2269 }
2270
2271 rtsx_write(sc, RTSX_DMACTL, RTSX_DMA_RST, RTSX_DMA_RST);
2298 default:
2299 rtsx_write(sc, RTSX_DMACTL, RTSX_DMA_RST, RTSX_DMA_RST);
2272
2300
2273 rtsx_write(sc, RTSX_RBCTL, RTSX_RB_FLUSH, RTSX_RB_FLUSH);
2301 rtsx_write(sc, RTSX_RBCTL, RTSX_RB_FLUSH, RTSX_RB_FLUSH);
2302 break;
2303 }
2274}
2275
2276/*
2277 * Clear error.
2278 */
2279static void
2280rtsx_clear_error(struct rtsx_softc *sc)
2281{

--- 999 unchanged lines hidden (view full) ---

3281 (val & RTSX_PHY_TUNE_VOLTAGE_MASK) | RTSX_PHY_TUNE_VOLTAGE_3V3)))
3282 return (error);
3283 if ((error = rtsx_rts5249_fill_driving(sc)))
3284 return (error);
3285 break;
3286 case RTSX_RTS5260:
3287 RTSX_BITOP(sc, RTSX_LDO_CONFIG2, RTSX_DV331812_VDD1, RTSX_DV331812_VDD1);
3288 RTSX_BITOP(sc, RTSX_LDO_DV18_CFG, RTSX_DV331812_MASK, RTSX_DV331812_33);
2304}
2305
2306/*
2307 * Clear error.
2308 */
2309static void
2310rtsx_clear_error(struct rtsx_softc *sc)
2311{

--- 999 unchanged lines hidden (view full) ---

3311 (val & RTSX_PHY_TUNE_VOLTAGE_MASK) | RTSX_PHY_TUNE_VOLTAGE_3V3)))
3312 return (error);
3313 if ((error = rtsx_rts5249_fill_driving(sc)))
3314 return (error);
3315 break;
3316 case RTSX_RTS5260:
3317 RTSX_BITOP(sc, RTSX_LDO_CONFIG2, RTSX_DV331812_VDD1, RTSX_DV331812_VDD1);
3318 RTSX_BITOP(sc, RTSX_LDO_DV18_CFG, RTSX_DV331812_MASK, RTSX_DV331812_33);
3319 RTSX_CLR(sc, RTSX_SD_PAD_CTL, RTSX_SD_IO_USING_1V8);
3289 if ((error = rtsx_rts5260_fill_driving(sc)))
3290 return (error);
3291 break;
3292 case RTSX_RTL8402:
3293 RTSX_BITOP(sc, RTSX_SD30_CMD_DRIVE_SEL, RTSX_SD30_DRIVE_SEL_MASK, sc->rtsx_sd30_drive_sel_3v3);
3294 RTSX_BITOP(sc, RTSX_LDO_CTL,
3295 (RTSX_BPP_ASIC_MASK << RTSX_BPP_SHIFT_8402) | RTSX_BPP_PAD_MASK,
3296 (RTSX_BPP_ASIC_3V3 << RTSX_BPP_SHIFT_8402) | RTSX_BPP_PAD_3V3);

--- 587 unchanged lines hidden --- 		3320 if ((error = rtsx_rts5260_fill_driving(sc)))
3321 return (error);
3322 break;
3323 case RTSX_RTL8402:
3324 RTSX_BITOP(sc, RTSX_SD30_CMD_DRIVE_SEL, RTSX_SD30_DRIVE_SEL_MASK, sc->rtsx_sd30_drive_sel_3v3);
3325 RTSX_BITOP(sc, RTSX_LDO_CTL,
3326 (RTSX_BPP_ASIC_MASK << RTSX_BPP_SHIFT_8402) | RTSX_BPP_PAD_MASK,
3327 (RTSX_BPP_ASIC_3V3 << RTSX_BPP_SHIFT_8402) | RTSX_BPP_PAD_3V3);

--- 587 unchanged lines hidden ---