oce_hw.h (cfe30d02adda7c3b5c76156ac52d50d8cab325d9) oce_hw.h (291a1934fa36be527bba60f5d24688687118b29a)
1/*-
1/*-
2 * Copyright (C) 2012 Emulex
2 * Copyright (C) 2013 Emulex
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *

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58#define PCICFG_ONLINE1 0xb4
59#define INTR_EN 0x20000000
60#define IMAGE_TRANSFER_SIZE (32 * 1024) /* 32K at a time */
61
62/* CSR register offsets */
63#define MPU_EP_CONTROL 0
64#define MPU_EP_SEMAPHORE_BE3 0xac
65#define MPU_EP_SEMAPHORE_XE201 0x400
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *

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58#define PCICFG_ONLINE1 0xb4
59#define INTR_EN 0x20000000
60#define IMAGE_TRANSFER_SIZE (32 * 1024) /* 32K at a time */
61
62/* CSR register offsets */
63#define MPU_EP_CONTROL 0
64#define MPU_EP_SEMAPHORE_BE3 0xac
65#define MPU_EP_SEMAPHORE_XE201 0x400
66#define MPU_EP_SEMAPHORE(sc) \
67 ((IS_BE(sc)) ? MPU_EP_SEMAPHORE_BE3 : MPU_EP_SEMAPHORE_XE201)
66#define MPU_EP_SEMAPHORE_SH 0x94
68#define PCICFG_INTR_CTRL 0xfc
69#define HOSTINTR_MASK (1 << 29)
70#define HOSTINTR_PFUNC_SHIFT 26
71#define HOSTINTR_PFUNC_MASK 7
72
73/* POST status reg struct */
74#define POST_STAGE_POWER_ON_RESET 0x00
75#define POST_STAGE_AWAITING_HOST_RDY 0x01

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1993 uint8_t loopback_type;
1994 uint8_t loopback_state;
1995 } req;
1996 struct {
1997 uint8_t rsvd0[4];
1998 } rsp;
1999 } params;
2000};
67#define PCICFG_INTR_CTRL 0xfc
68#define HOSTINTR_MASK (1 << 29)
69#define HOSTINTR_PFUNC_SHIFT 26
70#define HOSTINTR_PFUNC_MASK 7
71
72/* POST status reg struct */
73#define POST_STAGE_POWER_ON_RESET 0x00
74#define POST_STAGE_AWAITING_HOST_RDY 0x01

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1992 uint8_t loopback_type;
1993 uint8_t loopback_state;
1994 } req;
1995 struct {
1996 uint8_t rsvd0[4];
1997 } rsp;
1998 } params;
1999};
2000#define MAX_RESC_DESC 256
2001#define RESC_DESC_SIZE 88
2002#define ACTIVE_PROFILE 2
2003#define NIC_RESC_DESC_TYPE_V0 0x41
2004#define NIC_RESC_DESC_TYPE_V1 0x51
2005/* OPCODE_COMMON_GET_FUNCTION_CONFIG */
2006struct mbx_common_get_func_config {
2007 struct mbx_hdr hdr;
2008 union {
2009 struct {
2010 uint8_t rsvd;
2011 uint8_t type;
2012 uint16_t rsvd1;
2013 } req;
2014 struct {
2015 uint32_t desc_count;
2016 uint8_t resources[MAX_RESC_DESC * RESC_DESC_SIZE];
2017 } rsp;
2018 } params;
2019};
2001
2020
2021
2022/* OPCODE_COMMON_GET_PROFILE_CONFIG */
2023
2024struct mbx_common_get_profile_config {
2025 struct mbx_hdr hdr;
2026 union {
2027 struct {
2028 uint8_t rsvd;
2029 uint8_t type;
2030 uint16_t rsvd1;
2031 } req;
2032 struct {
2033 uint32_t desc_count;
2034 uint8_t resources[MAX_RESC_DESC * RESC_DESC_SIZE];
2035 } rsp;
2036 } params;
2037};
2038
2039struct oce_nic_resc_desc {
2040 uint8_t desc_type;
2041 uint8_t desc_len;
2042 uint8_t rsvd1;
2043 uint8_t flags;
2044 uint8_t vf_num;
2045 uint8_t rsvd2;
2046 uint8_t pf_num;
2047 uint8_t rsvd3;
2048 uint16_t unicast_mac_count;
2049 uint8_t rsvd4[6];
2050 uint16_t mcc_count;
2051 uint16_t vlan_count;
2052 uint16_t mcast_mac_count;
2053 uint16_t txq_count;
2054 uint16_t rq_count;
2055 uint16_t rssq_count;
2056 uint16_t lro_count;
2057 uint16_t cq_count;
2058 uint16_t toe_conn_count;
2059 uint16_t eq_count;
2060 uint32_t rsvd5;
2061 uint32_t cap_flags;
2062 uint8_t link_param;
2063 uint8_t rsvd6[3];
2064 uint32_t bw_min;
2065 uint32_t bw_max;
2066 uint8_t acpi_params;
2067 uint8_t wol_param;
2068 uint16_t rsvd7;
2069 uint32_t rsvd8[7];
2070
2071};
2072
2073
2002struct flash_file_hdr {
2003 uint8_t sign[52];
2004 uint8_t ufi_version[4];
2005 uint32_t file_len;
2006 uint32_t cksum;
2007 uint32_t antidote;
2008 uint32_t num_imgs;
2009 uint8_t build[24];

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2074struct flash_file_hdr {
2075 uint8_t sign[52];
2076 uint8_t ufi_version[4];
2077 uint32_t file_len;
2078 uint32_t cksum;
2079 uint32_t antidote;
2080 uint32_t num_imgs;
2081 uint8_t build[24];

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