rk_pcie.c (50cedfede3d21824ec6023324b3ad41a435e1815) rk_pcie.c (b8bfffc1b619cca5262f848b665bd56c4de0052b)
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2019 Michal Meloun <mmel@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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305
306static bool
307rk_pcie_check_dev(struct rk_pcie_softc *sc, u_int bus, u_int slot, u_int func,
308 u_int reg)
309{
310 uint32_t val;
311
312 if (bus < sc->bus_start || bus > sc->bus_end || slot > PCI_SLOTMAX ||
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2019 Michal Meloun <mmel@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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305
306static bool
307rk_pcie_check_dev(struct rk_pcie_softc *sc, u_int bus, u_int slot, u_int func,
308 u_int reg)
309{
310 uint32_t val;
311
312 if (bus < sc->bus_start || bus > sc->bus_end || slot > PCI_SLOTMAX ||
313 func > PCI_FUNCMAX || reg > PCI_REGMAX)
313 func > PCI_FUNCMAX || reg > PCIE_REGMAX)
314 return (false);
315
316 if (bus == sc->root_bus) {
317 /* we have only 1 device with 1 function root port */
318 if (slot > 0 || func > 0)
319 return (false);
320 return (true);
321 }
322
323 /* link is needed for accessing non-root busses */
324 val = APB_RD4(sc, PCIE_CLIENT_BASIC_STATUS1);
325 if (STATUS1_LINK_ST_GET(val) != STATUS1_LINK_ST_UP)
326 return (false);
327
314 return (false);
315
316 if (bus == sc->root_bus) {
317 /* we have only 1 device with 1 function root port */
318 if (slot > 0 || func > 0)
319 return (false);
320 return (true);
321 }
322
323 /* link is needed for accessing non-root busses */
324 val = APB_RD4(sc, PCIE_CLIENT_BASIC_STATUS1);
325 if (STATUS1_LINK_ST_GET(val) != STATUS1_LINK_ST_UP)
326 return (false);
327
328 /* only one device is on first subordinate bus */
329 if (bus == sc->sub_bus && slot)
328 /* only one device can be on first subordinate bus */
329 if (bus == sc->sub_bus && slot != 0 )
330 return (false);
331 return (true);
332}
333
334static void
335rk_pcie_map_out_atu(struct rk_pcie_softc *sc, int idx, int type,
336 int num_bits, uint64_t pa)
337{

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447 *
448 * P C I B I N T E R F A C E
449 */
450static uint32_t
451rk_pcie_read_config(device_t dev, u_int bus, u_int slot,
452 u_int func, u_int reg, int bytes)
453{
454 struct rk_pcie_softc *sc;
330 return (false);
331 return (true);
332}
333
334static void
335rk_pcie_map_out_atu(struct rk_pcie_softc *sc, int idx, int type,
336 int num_bits, uint64_t pa)
337{

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447 *
448 * P C I B I N T E R F A C E
449 */
450static uint32_t
451rk_pcie_read_config(device_t dev, u_int bus, u_int slot,
452 u_int func, u_int reg, int bytes)
453{
454 struct rk_pcie_softc *sc;
455 uint32_t data;
455 uint32_t d32, data;
456 uint16_t d16;
457 uint8_t d8;
456 uint64_t addr;
458 uint64_t addr;
457 int type;
459 int type, ret;
458
459 sc = device_get_softc(dev);
460
461 if (!rk_pcie_check_dev(sc, bus, slot, func, reg))
462 return (0xFFFFFFFFU);
460
461 sc = device_get_softc(dev);
462
463 if (!rk_pcie_check_dev(sc, bus, slot, func, reg))
464 return (0xFFFFFFFFU);
463
464 if (bus == sc->root_bus)
465 return (rk_pcie_local_cfg_read(sc, false, reg, bytes));
466
467 addr = ATU_CFG_BUS(bus) | ATU_CFG_SLOT(slot) | ATU_CFG_FUNC(func) |
468 ATU_CFG_REG(reg);
465 if (bus == sc->root_bus)
466 return (rk_pcie_local_cfg_read(sc, false, reg, bytes));
467
468 addr = ATU_CFG_BUS(bus) | ATU_CFG_SLOT(slot) | ATU_CFG_FUNC(func) |
469 ATU_CFG_REG(reg);
469 if (bus == sc->sub_bus) {
470 type = ATU_TYPE_CFG0;
471 } else {
472 type = ATU_TYPE_CFG1;
473 /*
474 * XXX FIXME: any attempt to generate type1 configuration
475 * access causes external data abort
476 */
477 return (0xFFFFFFFFU);
478 }
470 type = bus == sc->sub_bus ? ATU_TYPE_CFG0: ATU_TYPE_CFG1;
479 rk_pcie_map_cfg_atu(sc, 0, type);
480
471 rk_pcie_map_cfg_atu(sc, 0, type);
472
473 ret = -1;
481 switch (bytes) {
482 case 1:
474 switch (bytes) {
475 case 1:
483 data = bus_read_1(sc->axi_mem_res, addr);
476 ret = bus_peek_1(sc->axi_mem_res, addr, &d8);
477 data = d8;
484 break;
485 case 2:
478 break;
479 case 2:
486 data = bus_read_2(sc->axi_mem_res, addr);
480 ret = bus_peek_2(sc->axi_mem_res, addr, &d16);
481 data = d16;
487 break;
488 case 4:
482 break;
483 case 4:
489 data = bus_read_4(sc->axi_mem_res, addr);
484 ret = bus_peek_4(sc->axi_mem_res, addr, &d32);
485 data = d32;
490 break;
486 break;
491 default:
492 data = 0xFFFFFFFFU;
493 }
487 }
488 if (ret != 0)
489 data = 0xFFFFFFFF;
494 return (data);
495}
496
497static void
498rk_pcie_write_config(device_t dev, u_int bus, u_int slot,
499 u_int func, u_int reg, uint32_t val, int bytes)
500{
501 struct rk_pcie_softc *sc;

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507 if (!rk_pcie_check_dev(sc, bus, slot, func, reg))
508 return;
509
510 if (bus == sc->root_bus)
511 return (rk_pcie_local_cfg_write(sc, false, reg, val, bytes));
512
513 addr = ATU_CFG_BUS(bus) | ATU_CFG_SLOT(slot) | ATU_CFG_FUNC(func) |
514 ATU_CFG_REG(reg);
490 return (data);
491}
492
493static void
494rk_pcie_write_config(device_t dev, u_int bus, u_int slot,
495 u_int func, u_int reg, uint32_t val, int bytes)
496{
497 struct rk_pcie_softc *sc;

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503 if (!rk_pcie_check_dev(sc, bus, slot, func, reg))
504 return;
505
506 if (bus == sc->root_bus)
507 return (rk_pcie_local_cfg_write(sc, false, reg, val, bytes));
508
509 addr = ATU_CFG_BUS(bus) | ATU_CFG_SLOT(slot) | ATU_CFG_FUNC(func) |
510 ATU_CFG_REG(reg);
515 if (bus == sc->sub_bus){
516 type = ATU_TYPE_CFG0;
517 } else {
518 type = ATU_TYPE_CFG1;
519 /*
520 * XXX FIXME: any attempt to generate type1 configuration
521 * access causes external data abort
522 */
523 return;
524 }
511 type = bus == sc->sub_bus ? ATU_TYPE_CFG0: ATU_TYPE_CFG1;
525 rk_pcie_map_cfg_atu(sc, 0, type);
526
527 switch (bytes) {
528 case 1:
512 rk_pcie_map_cfg_atu(sc, 0, type);
513
514 switch (bytes) {
515 case 1:
529 bus_write_1(sc->axi_mem_res, addr, val);
516 bus_poke_1(sc->axi_mem_res, addr, (uint8_t)val);
530 break;
531 case 2:
517 break;
518 case 2:
532 bus_write_2(sc->axi_mem_res, addr, val);
519 bus_poke_2(sc->axi_mem_res, addr, (uint16_t)val);
533 break;
534 case 4:
520 break;
521 case 4:
535 bus_write_4(sc->axi_mem_res, addr, val);
522 bus_poke_4(sc->axi_mem_res, addr, val);
536 break;
537 default:
538 break;
539 }
540}
541
542#ifdef RK_PCIE_ENABLE_MSI
543static int

--- 859 unchanged lines hidden --- 		523 break;
524 default:
525 break;
526 }
527}
528
529#ifdef RK_PCIE_ENABLE_MSI
530static int

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