xref: /titanic_54/usr/src/uts/sun4v/sys/ldc.h (revision 1ae0874509b6811fdde1dfd46f0d93fd09867a3f)
1*1ae08745Sheppo /*
2*1ae08745Sheppo  * CDDL HEADER START
3*1ae08745Sheppo  *
4*1ae08745Sheppo  * The contents of this file are subject to the terms of the
5*1ae08745Sheppo  * Common Development and Distribution License (the "License").
6*1ae08745Sheppo  * You may not use this file except in compliance with the License.
7*1ae08745Sheppo  *
8*1ae08745Sheppo  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*1ae08745Sheppo  * or http://www.opensolaris.org/os/licensing.
10*1ae08745Sheppo  * See the License for the specific language governing permissions
11*1ae08745Sheppo  * and limitations under the License.
12*1ae08745Sheppo  *
13*1ae08745Sheppo  * When distributing Covered Code, include this CDDL HEADER in each
14*1ae08745Sheppo  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*1ae08745Sheppo  * If applicable, add the following below this CDDL HEADER, with the
16*1ae08745Sheppo  * fields enclosed by brackets "[]" replaced with your own identifying
17*1ae08745Sheppo  * information: Portions Copyright [yyyy] [name of copyright owner]
18*1ae08745Sheppo  *
19*1ae08745Sheppo  * CDDL HEADER END
20*1ae08745Sheppo  */
21*1ae08745Sheppo 
22*1ae08745Sheppo /*
23*1ae08745Sheppo  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24*1ae08745Sheppo  * Use is subject to license terms.
25*1ae08745Sheppo  */
26*1ae08745Sheppo 
27*1ae08745Sheppo #ifndef _LDC_H
28*1ae08745Sheppo #define	_LDC_H
29*1ae08745Sheppo 
30*1ae08745Sheppo #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*1ae08745Sheppo 
32*1ae08745Sheppo #ifdef __cplusplus
33*1ae08745Sheppo extern "C" {
34*1ae08745Sheppo #endif
35*1ae08745Sheppo 
36*1ae08745Sheppo #include <sys/types.h>
37*1ae08745Sheppo #include <sys/ddi.h>
38*1ae08745Sheppo #include <sys/sunddi.h>
39*1ae08745Sheppo #include <sys/ioctl.h>
40*1ae08745Sheppo #include <sys/processor.h>
41*1ae08745Sheppo 
42*1ae08745Sheppo /* Types */
43*1ae08745Sheppo typedef uint64_t ldc_handle_t;		/* Channel handle */
44*1ae08745Sheppo typedef uint64_t ldc_mem_handle_t;	/* Channel memory handle */
45*1ae08745Sheppo typedef uint64_t ldc_dring_handle_t;	/* Descriptor ring handle */
46*1ae08745Sheppo 
47*1ae08745Sheppo /* LDC transport mode */
48*1ae08745Sheppo typedef enum {
49*1ae08745Sheppo 	LDC_MODE_RAW,			/* Raw mode */
50*1ae08745Sheppo 	LDC_MODE_UNRELIABLE,		/* Unreliable packet mode */
51*1ae08745Sheppo 	LDC_MODE_RELIABLE,		/* Reliable packet mode */
52*1ae08745Sheppo 	LDC_MODE_STREAM			/* Reliable byte stream */
53*1ae08745Sheppo } ldc_mode_t;
54*1ae08745Sheppo 
55*1ae08745Sheppo /* LDC message payload sizes */
56*1ae08745Sheppo #define	LDC_ELEM_SIZE			8		/* size in bytes */
57*1ae08745Sheppo #define	LDC_PACKET_SIZE			(LDC_ELEM_SIZE * 8)
58*1ae08745Sheppo #define	LDC_PAYLOAD_SIZE_RAW		(LDC_PACKET_SIZE)
59*1ae08745Sheppo #define	LDC_PAYLOAD_SIZE_UNRELIABLE	(LDC_PACKET_SIZE - LDC_ELEM_SIZE)
60*1ae08745Sheppo #define	LDC_PAYLOAD_SIZE_RELIABLE	(LDC_PACKET_SIZE - (LDC_ELEM_SIZE * 2))
61*1ae08745Sheppo 
62*1ae08745Sheppo /* LDC Channel Status */
63*1ae08745Sheppo typedef enum {
64*1ae08745Sheppo 	LDC_INIT = 1,			/* Channel initialized */
65*1ae08745Sheppo 	LDC_OPEN,			/* Channel open */
66*1ae08745Sheppo 	LDC_READY,			/* Channel peer opened (hw-link-up) */
67*1ae08745Sheppo 	LDC_UP				/* Channel UP - ready for data xfer */
68*1ae08745Sheppo } ldc_status_t;
69*1ae08745Sheppo 
70*1ae08745Sheppo /* Callback return values */
71*1ae08745Sheppo #define	LDC_SUCCESS	0
72*1ae08745Sheppo #define	LDC_FAILURE	1
73*1ae08745Sheppo 
74*1ae08745Sheppo /* LDC callback mode */
75*1ae08745Sheppo typedef enum {
76*1ae08745Sheppo 	LDC_CB_ENABLE,			/* Enable callbacks */
77*1ae08745Sheppo 	LDC_CB_DISABLE			/* Disable callbacks */
78*1ae08745Sheppo } ldc_cb_mode_t;
79*1ae08745Sheppo 
80*1ae08745Sheppo /* Callback events */
81*1ae08745Sheppo #define	LDC_EVT_DOWN		0x1	/* Channel DOWN, status = OPEN */
82*1ae08745Sheppo #define	LDC_EVT_RESET		0x2	/* Channel RESET, status = READY */
83*1ae08745Sheppo #define	LDC_EVT_UP		0x4	/* Channel UP, status = UP */
84*1ae08745Sheppo #define	LDC_EVT_READ		0x8	/* Channel has data for read */
85*1ae08745Sheppo #define	LDC_EVT_WRITE		0x10	/* Channel has space for write */
86*1ae08745Sheppo 
87*1ae08745Sheppo /* LDC device classes */
88*1ae08745Sheppo typedef enum {
89*1ae08745Sheppo 	LDC_DEV_GENERIC = 1,		/* generic device */
90*1ae08745Sheppo 	LDC_DEV_BLK,			/* block device, eg. vdc */
91*1ae08745Sheppo 	LDC_DEV_BLK_SVC,		/* block device service, eg. vds */
92*1ae08745Sheppo 	LDC_DEV_NT,			/* network device, eg. vnet */
93*1ae08745Sheppo 	LDC_DEV_NT_SVC,			/* network service eg. vsw */
94*1ae08745Sheppo 	LDC_DEV_SERIAL			/* serial device eg. vldc, vcc */
95*1ae08745Sheppo } ldc_dev_t;
96*1ae08745Sheppo 
97*1ae08745Sheppo /* Channel nexus registration */
98*1ae08745Sheppo typedef struct ldc_cnex {
99*1ae08745Sheppo 	dev_info_t	*dip;		/* dip of channel nexus */
100*1ae08745Sheppo 	int		(*reg_chan)();	/* interface for channel register */
101*1ae08745Sheppo 	int		(*unreg_chan)(); /* interface for channel unregister */
102*1ae08745Sheppo 	int		(*add_intr)();	/* interface for adding interrupts */
103*1ae08745Sheppo 	int		(*rem_intr)();	/* interface for removing interrupts */
104*1ae08745Sheppo 	int		(*clr_intr)();	/* interface for clearing interrupts */
105*1ae08745Sheppo } ldc_cnex_t;
106*1ae08745Sheppo 
107*1ae08745Sheppo /* LDC attribute structure */
108*1ae08745Sheppo 
109*1ae08745Sheppo /*
110*1ae08745Sheppo  * FIXME: Attribute passed in should be an MTU size
111*1ae08745Sheppo  * Allocate the queue internally to ldc module to accomodate
112*1ae08745Sheppo  * based on MTU size. For streaming mode, size can be zero.
113*1ae08745Sheppo  */
114*1ae08745Sheppo 
115*1ae08745Sheppo typedef struct ldc_attr {
116*1ae08745Sheppo 	ldc_dev_t	devclass;	/* device class */
117*1ae08745Sheppo 	uint64_t	instance;	/* device class instance */
118*1ae08745Sheppo 	ldc_mode_t	mode;		/* channel mode */
119*1ae08745Sheppo 	uint64_t	qlen;		/* channel queue elements */
120*1ae08745Sheppo } ldc_attr_t;
121*1ae08745Sheppo 
122*1ae08745Sheppo /* LDC memory cookie */
123*1ae08745Sheppo typedef struct ldc_mem_cookie {
124*1ae08745Sheppo 	uint64_t	addr;		/* cookie address */
125*1ae08745Sheppo 	uint64_t	size;		/* size @ offset */
126*1ae08745Sheppo } ldc_mem_cookie_t;
127*1ae08745Sheppo 
128*1ae08745Sheppo /*
129*1ae08745Sheppo  * LDC Memory Map Type
130*1ae08745Sheppo  * Specifies how shared memory being created is shared with its
131*1ae08745Sheppo  * peer and/or how the peer has mapped in the exported memory.
132*1ae08745Sheppo  */
133*1ae08745Sheppo #define	LDC_SHADOW_MAP		0x1	/* share mem via shadow copy only */
134*1ae08745Sheppo #define	LDC_DIRECT_MAP		0x2	/* share mem direct access */
135*1ae08745Sheppo #define	LDC_IO_MAP		0x4	/* share mem for IOMMU/DMA access */
136*1ae08745Sheppo 
137*1ae08745Sheppo /* LDC Memory Access Permissions  */
138*1ae08745Sheppo #define	LDC_MEM_R		0x1	/* Memory region is read only */
139*1ae08745Sheppo #define	LDC_MEM_W		0x2	/* Memory region is write only */
140*1ae08745Sheppo #define	LDC_MEM_X		0x4	/* Memory region is execute only */
141*1ae08745Sheppo #define	LDC_MEM_RW		(LDC_MEM_R|LDC_MEM_W)
142*1ae08745Sheppo #define	LDC_MEM_RWX		(LDC_MEM_R|LDC_MEM_W|LDC_MEM_X)
143*1ae08745Sheppo 
144*1ae08745Sheppo /* LDC Memory Copy Direction */
145*1ae08745Sheppo #define	LDC_COPY_IN		0x0	/* Copy data to VA from cookie mem */
146*1ae08745Sheppo #define	LDC_COPY_OUT		0x1	/* Copy data from VA to cookie mem */
147*1ae08745Sheppo 
148*1ae08745Sheppo /* LDC memory/dring (handle) status */
149*1ae08745Sheppo typedef enum {
150*1ae08745Sheppo 	LDC_UNBOUND,			/* Memory handle is unbound */
151*1ae08745Sheppo 	LDC_BOUND,			/* Memory handle is bound */
152*1ae08745Sheppo 	LDC_MAPPED			/* Memory handle is mapped */
153*1ae08745Sheppo } ldc_mstatus_t;
154*1ae08745Sheppo 
155*1ae08745Sheppo /* LDC [dring] memory info */
156*1ae08745Sheppo typedef struct ldc_mem_info {
157*1ae08745Sheppo 	uint8_t		mtype;		/* map type */
158*1ae08745Sheppo 	uint8_t		perm;		/* RWX permissions */
159*1ae08745Sheppo 	caddr_t		vaddr;		/* base VA */
160*1ae08745Sheppo 	uintptr_t	raddr;		/* base RA */
161*1ae08745Sheppo 	ldc_mstatus_t	status;		/* dring/mem handle status */
162*1ae08745Sheppo } ldc_mem_info_t;
163*1ae08745Sheppo 
164*1ae08745Sheppo /* API functions */
165*1ae08745Sheppo int ldc_register(ldc_cnex_t *cinfo);
166*1ae08745Sheppo int ldc_unregister(ldc_cnex_t *cinfo);
167*1ae08745Sheppo 
168*1ae08745Sheppo int ldc_init(uint64_t id, ldc_attr_t *attr, ldc_handle_t *handle);
169*1ae08745Sheppo int ldc_fini(ldc_handle_t handle);
170*1ae08745Sheppo int ldc_open(ldc_handle_t handle);
171*1ae08745Sheppo int ldc_close(ldc_handle_t handle);
172*1ae08745Sheppo int ldc_up(ldc_handle_t handle);
173*1ae08745Sheppo int ldc_reset(ldc_handle_t handle);
174*1ae08745Sheppo int ldc_reg_callback(ldc_handle_t handle,
175*1ae08745Sheppo     uint_t(*callback)(uint64_t event, caddr_t arg), caddr_t arg);
176*1ae08745Sheppo int ldc_unreg_callback(ldc_handle_t handle);
177*1ae08745Sheppo int ldc_set_cb_mode(ldc_handle_t handle, ldc_cb_mode_t imode);
178*1ae08745Sheppo int ldc_chkq(ldc_handle_t handle, boolean_t *isempty);
179*1ae08745Sheppo int ldc_read(ldc_handle_t handle, caddr_t buf, size_t *size);
180*1ae08745Sheppo int ldc_write(ldc_handle_t handle, caddr_t buf, size_t *size);
181*1ae08745Sheppo int ldc_status(ldc_handle_t handle, ldc_status_t *status);
182*1ae08745Sheppo 
183*1ae08745Sheppo int ldc_mem_alloc_handle(ldc_handle_t handle, ldc_mem_handle_t *mhandle);
184*1ae08745Sheppo int ldc_mem_free_handle(ldc_mem_handle_t mhandle);
185*1ae08745Sheppo int ldc_mem_bind_handle(ldc_mem_handle_t mhandle, caddr_t vaddr, size_t len,
186*1ae08745Sheppo     uint8_t mtype, uint8_t perm, ldc_mem_cookie_t *cookie, uint32_t *ccount);
187*1ae08745Sheppo int ldc_mem_unbind_handle(ldc_mem_handle_t mhandle);
188*1ae08745Sheppo int ldc_mem_info(ldc_mem_handle_t mhandle, ldc_mem_info_t *minfo);
189*1ae08745Sheppo int ldc_mem_nextcookie(ldc_mem_handle_t mhandle, ldc_mem_cookie_t *cookie);
190*1ae08745Sheppo int ldc_mem_copy(ldc_handle_t handle, caddr_t vaddr, uint64_t off, size_t *len,
191*1ae08745Sheppo     ldc_mem_cookie_t *cookies, uint32_t ccount, uint8_t direction);
192*1ae08745Sheppo int ldc_mem_rdwr_pa(ldc_handle_t handle, caddr_t vaddr, size_t *size,
193*1ae08745Sheppo     caddr_t paddr, uint8_t  direction);
194*1ae08745Sheppo int ldc_mem_map(ldc_mem_handle_t mhandle, ldc_mem_cookie_t *cookie,
195*1ae08745Sheppo     uint32_t ccount, uint8_t mtype, caddr_t *vaddr, caddr_t *raddr);
196*1ae08745Sheppo int ldc_mem_acquire(ldc_mem_handle_t mhandle, uint64_t offset, uint64_t size);
197*1ae08745Sheppo int ldc_mem_release(ldc_mem_handle_t mhandle, uint64_t offset, uint64_t size);
198*1ae08745Sheppo 
199*1ae08745Sheppo int ldc_mem_dring_create(uint32_t len, uint32_t dsize,
200*1ae08745Sheppo     ldc_dring_handle_t *dhandle);
201*1ae08745Sheppo int ldc_mem_dring_destroy(ldc_dring_handle_t dhandle);
202*1ae08745Sheppo int ldc_mem_dring_bind(ldc_handle_t handle, ldc_dring_handle_t dhandle,
203*1ae08745Sheppo     uint8_t mtype, uint8_t perm, ldc_mem_cookie_t *dcookie, uint32_t *ccount);
204*1ae08745Sheppo int ldc_mem_dring_nextcookie(ldc_dring_handle_t mhandle,
205*1ae08745Sheppo     ldc_mem_cookie_t *cookie);
206*1ae08745Sheppo int ldc_mem_dring_unbind(ldc_dring_handle_t dhandle);
207*1ae08745Sheppo int ldc_mem_dring_info(ldc_dring_handle_t dhandle, ldc_mem_info_t *minfo);
208*1ae08745Sheppo int ldc_mem_dring_map(ldc_handle_t handle, ldc_mem_cookie_t *cookie,
209*1ae08745Sheppo     uint32_t ccount, uint32_t len, uint32_t dsize, uint8_t mtype,
210*1ae08745Sheppo     ldc_dring_handle_t *dhandle);
211*1ae08745Sheppo int ldc_mem_dring_unmap(ldc_dring_handle_t dhandle);
212*1ae08745Sheppo int ldc_mem_dring_acquire(ldc_dring_handle_t dhandle, uint64_t start,
213*1ae08745Sheppo     uint64_t end);
214*1ae08745Sheppo int ldc_mem_dring_release(ldc_dring_handle_t dhandle, uint64_t start,
215*1ae08745Sheppo     uint64_t end);
216*1ae08745Sheppo 
217*1ae08745Sheppo #ifdef __cplusplus
218*1ae08745Sheppo }
219*1ae08745Sheppo #endif
220*1ae08745Sheppo 
221*1ae08745Sheppo #endif /* _LDC_H */
222