xref: /titanic_54/usr/src/uts/i86pc/io/rootnex.c (revision b57cd2d379392d3f463b3136fc903cffce34e3b8)
17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
500d0963fSdilpreet  * Common Development and Distribution License (the "License").
600d0963fSdilpreet  * You may not use this file except in compliance with the License.
77c478bd9Sstevel@tonic-gate  *
87c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
107c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
117c478bd9Sstevel@tonic-gate  * and limitations under the License.
127c478bd9Sstevel@tonic-gate  *
137c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
147c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
167c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
177c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bd9Sstevel@tonic-gate  *
197c478bd9Sstevel@tonic-gate  * CDDL HEADER END
207c478bd9Sstevel@tonic-gate  */
217c478bd9Sstevel@tonic-gate /*
22*b57cd2d3SMark Johnson  * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
237c478bd9Sstevel@tonic-gate  */
247c478bd9Sstevel@tonic-gate 
257c478bd9Sstevel@tonic-gate /*
2612f080e7Smrj  * x86 root nexus driver
277c478bd9Sstevel@tonic-gate  */
287c478bd9Sstevel@tonic-gate 
297c478bd9Sstevel@tonic-gate #include <sys/sysmacros.h>
307c478bd9Sstevel@tonic-gate #include <sys/conf.h>
317c478bd9Sstevel@tonic-gate #include <sys/autoconf.h>
327c478bd9Sstevel@tonic-gate #include <sys/sysmacros.h>
337c478bd9Sstevel@tonic-gate #include <sys/debug.h>
347c478bd9Sstevel@tonic-gate #include <sys/psw.h>
357c478bd9Sstevel@tonic-gate #include <sys/ddidmareq.h>
367c478bd9Sstevel@tonic-gate #include <sys/promif.h>
377c478bd9Sstevel@tonic-gate #include <sys/devops.h>
387c478bd9Sstevel@tonic-gate #include <sys/kmem.h>
397c478bd9Sstevel@tonic-gate #include <sys/cmn_err.h>
407c478bd9Sstevel@tonic-gate #include <vm/seg.h>
417c478bd9Sstevel@tonic-gate #include <vm/seg_kmem.h>
427c478bd9Sstevel@tonic-gate #include <vm/seg_dev.h>
437c478bd9Sstevel@tonic-gate #include <sys/vmem.h>
447c478bd9Sstevel@tonic-gate #include <sys/mman.h>
457c478bd9Sstevel@tonic-gate #include <vm/hat.h>
467c478bd9Sstevel@tonic-gate #include <vm/as.h>
477c478bd9Sstevel@tonic-gate #include <vm/page.h>
487c478bd9Sstevel@tonic-gate #include <sys/avintr.h>
497c478bd9Sstevel@tonic-gate #include <sys/errno.h>
507c478bd9Sstevel@tonic-gate #include <sys/modctl.h>
517c478bd9Sstevel@tonic-gate #include <sys/ddi_impldefs.h>
527c478bd9Sstevel@tonic-gate #include <sys/sunddi.h>
537c478bd9Sstevel@tonic-gate #include <sys/sunndi.h>
547a364d25Sschwartz #include <sys/mach_intr.h>
557c478bd9Sstevel@tonic-gate #include <sys/psm.h>
567c478bd9Sstevel@tonic-gate #include <sys/ontrap.h>
5712f080e7Smrj #include <sys/atomic.h>
5812f080e7Smrj #include <sys/sdt.h>
5912f080e7Smrj #include <sys/rootnex.h>
6012f080e7Smrj #include <vm/hat_i86.h>
6100d0963fSdilpreet #include <sys/ddifm.h>
6236945f79Smrj #include <sys/ddi_isa.h>
637c478bd9Sstevel@tonic-gate 
64843e1988Sjohnlev #ifdef __xpv
65843e1988Sjohnlev #include <sys/bootinfo.h>
66843e1988Sjohnlev #include <sys/hypervisor.h>
67843e1988Sjohnlev #include <sys/bootconf.h>
68843e1988Sjohnlev #include <vm/kboot_mmu.h>
693a634bfcSVikram Hegde #endif
703a634bfcSVikram Hegde 
713a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
723a634bfcSVikram Hegde #include <sys/immu.h>
73843e1988Sjohnlev #endif
74843e1988Sjohnlev 
7586c1f4dcSVikram Hegde 
7612f080e7Smrj /*
7712f080e7Smrj  * enable/disable extra checking of function parameters. Useful for debugging
7812f080e7Smrj  * drivers.
7912f080e7Smrj  */
8012f080e7Smrj #ifdef	DEBUG
8112f080e7Smrj int rootnex_alloc_check_parms = 1;
8212f080e7Smrj int rootnex_bind_check_parms = 1;
8312f080e7Smrj int rootnex_bind_check_inuse = 1;
8412f080e7Smrj int rootnex_unbind_verify_buffer = 0;
8512f080e7Smrj int rootnex_sync_check_parms = 1;
8612f080e7Smrj #else
8712f080e7Smrj int rootnex_alloc_check_parms = 0;
8812f080e7Smrj int rootnex_bind_check_parms = 0;
8912f080e7Smrj int rootnex_bind_check_inuse = 0;
9012f080e7Smrj int rootnex_unbind_verify_buffer = 0;
9112f080e7Smrj int rootnex_sync_check_parms = 0;
9212f080e7Smrj #endif
937c478bd9Sstevel@tonic-gate 
943a634bfcSVikram Hegde boolean_t rootnex_dmar_not_setup;
953a634bfcSVikram Hegde 
967aec1d6eScindi /* Master Abort and Target Abort panic flag */
977aec1d6eScindi int rootnex_fm_ma_ta_panic_flag = 0;
987aec1d6eScindi 
9912f080e7Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */
1007c478bd9Sstevel@tonic-gate int rootnex_bind_fail = 1;
1017c478bd9Sstevel@tonic-gate int rootnex_bind_warn = 1;
1027c478bd9Sstevel@tonic-gate uint8_t *rootnex_warn_list;
1037c478bd9Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */
1047c478bd9Sstevel@tonic-gate #define	ROOTNEX_BIND_WARNING	(0x1 << 0)
1057c478bd9Sstevel@tonic-gate 
1067c478bd9Sstevel@tonic-gate /*
10712f080e7Smrj  * revert back to old broken behavior of always sync'ing entire copy buffer.
10812f080e7Smrj  * This is useful if be have a buggy driver which doesn't correctly pass in
10912f080e7Smrj  * the offset and size into ddi_dma_sync().
1107c478bd9Sstevel@tonic-gate  */
11112f080e7Smrj int rootnex_sync_ignore_params = 0;
1127c478bd9Sstevel@tonic-gate 
1137c478bd9Sstevel@tonic-gate /*
11412f080e7Smrj  * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1
11512f080e7Smrj  * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a
11612f080e7Smrj  * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit
11712f080e7Smrj  * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65
11812f080e7Smrj  * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages
11912f080e7Smrj  * (< 8K). We will still need to allocate the copy buffer during bind though
12012f080e7Smrj  * (if we need one). These can only be modified in /etc/system before rootnex
12112f080e7Smrj  * attach.
1227c478bd9Sstevel@tonic-gate  */
12312f080e7Smrj #if defined(__amd64)
12412f080e7Smrj int rootnex_prealloc_cookies = 65;
12512f080e7Smrj int rootnex_prealloc_windows = 4;
12612f080e7Smrj int rootnex_prealloc_copybuf = 2;
12712f080e7Smrj #else
12812f080e7Smrj int rootnex_prealloc_cookies = 33;
12912f080e7Smrj int rootnex_prealloc_windows = 4;
13012f080e7Smrj int rootnex_prealloc_copybuf = 2;
13112f080e7Smrj #endif
1327c478bd9Sstevel@tonic-gate 
13312f080e7Smrj /* driver global state */
13412f080e7Smrj static rootnex_state_t *rootnex_state;
13512f080e7Smrj 
13612f080e7Smrj /* shortcut to rootnex counters */
13712f080e7Smrj static uint64_t *rootnex_cnt;
1387c478bd9Sstevel@tonic-gate 
1397c478bd9Sstevel@tonic-gate /*
14012f080e7Smrj  * XXX - does x86 even need these or are they left over from the SPARC days?
1417c478bd9Sstevel@tonic-gate  */
14212f080e7Smrj /* statically defined integer/boolean properties for the root node */
14312f080e7Smrj static rootnex_intprop_t rootnex_intprp[] = {
14412f080e7Smrj 	{ "PAGESIZE",			PAGESIZE },
14512f080e7Smrj 	{ "MMU_PAGESIZE",		MMU_PAGESIZE },
14612f080e7Smrj 	{ "MMU_PAGEOFFSET",		MMU_PAGEOFFSET },
14712f080e7Smrj 	{ DDI_RELATIVE_ADDRESSING,	1 },
14812f080e7Smrj };
14912f080e7Smrj #define	NROOT_INTPROPS	(sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t))
1507c478bd9Sstevel@tonic-gate 
151843e1988Sjohnlev #ifdef __xpv
152843e1988Sjohnlev typedef maddr_t rootnex_addr_t;
153843e1988Sjohnlev #define	ROOTNEX_PADDR_TO_RBASE(xinfo, pa)	\
154843e1988Sjohnlev 	(DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa))
155843e1988Sjohnlev #else
156843e1988Sjohnlev typedef paddr_t rootnex_addr_t;
157843e1988Sjohnlev #endif
158843e1988Sjohnlev 
15920906b23SVikram Hegde #if !defined(__xpv)
1607e301000SVikram Hegde char _depends_on[] = "mach/pcplusmp misc/iommulib misc/acpica";
16120906b23SVikram Hegde #endif
1627c478bd9Sstevel@tonic-gate 
16312f080e7Smrj static struct cb_ops rootnex_cb_ops = {
16412f080e7Smrj 	nodev,		/* open */
16512f080e7Smrj 	nodev,		/* close */
16612f080e7Smrj 	nodev,		/* strategy */
16712f080e7Smrj 	nodev,		/* print */
16812f080e7Smrj 	nodev,		/* dump */
16912f080e7Smrj 	nodev,		/* read */
17012f080e7Smrj 	nodev,		/* write */
17112f080e7Smrj 	nodev,		/* ioctl */
17212f080e7Smrj 	nodev,		/* devmap */
17312f080e7Smrj 	nodev,		/* mmap */
17412f080e7Smrj 	nodev,		/* segmap */
17512f080e7Smrj 	nochpoll,	/* chpoll */
17612f080e7Smrj 	ddi_prop_op,	/* cb_prop_op */
17712f080e7Smrj 	NULL,		/* struct streamtab */
17812f080e7Smrj 	D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */
17912f080e7Smrj 	CB_REV,		/* Rev */
18012f080e7Smrj 	nodev,		/* cb_aread */
18112f080e7Smrj 	nodev		/* cb_awrite */
18212f080e7Smrj };
1837c478bd9Sstevel@tonic-gate 
18412f080e7Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp,
1857c478bd9Sstevel@tonic-gate     off_t offset, off_t len, caddr_t *vaddrp);
18612f080e7Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip,
1877c478bd9Sstevel@tonic-gate     struct hat *hat, struct seg *seg, caddr_t addr,
1887c478bd9Sstevel@tonic-gate     struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock);
18912f080e7Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip,
1907c478bd9Sstevel@tonic-gate     struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep);
19112f080e7Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip,
19212f080e7Smrj     ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
19312f080e7Smrj     ddi_dma_handle_t *handlep);
19412f080e7Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip,
19512f080e7Smrj     ddi_dma_handle_t handle);
19612f080e7Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
19712f080e7Smrj     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
19812f080e7Smrj     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
19912f080e7Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
20012f080e7Smrj     ddi_dma_handle_t handle);
20112f080e7Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip,
20212f080e7Smrj     ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags);
20312f080e7Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip,
20412f080e7Smrj     ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp,
20512f080e7Smrj     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
20612f080e7Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip,
2077c478bd9Sstevel@tonic-gate     ddi_dma_handle_t handle, enum ddi_dma_ctlops request,
2087c478bd9Sstevel@tonic-gate     off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags);
20912f080e7Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip,
21012f080e7Smrj     ddi_ctl_enum_t ctlop, void *arg, void *result);
21100d0963fSdilpreet static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap,
21200d0963fSdilpreet     ddi_iblock_cookie_t *ibc);
21312f080e7Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip,
21412f080e7Smrj     ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result);
2157c478bd9Sstevel@tonic-gate 
21620906b23SVikram Hegde static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip,
21720906b23SVikram Hegde     ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
21820906b23SVikram Hegde     ddi_dma_handle_t *handlep);
21920906b23SVikram Hegde static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip,
22020906b23SVikram Hegde     ddi_dma_handle_t handle);
22120906b23SVikram Hegde static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
22220906b23SVikram Hegde     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
22320906b23SVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
22420906b23SVikram Hegde static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
22520906b23SVikram Hegde     ddi_dma_handle_t handle);
2263a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
22720906b23SVikram Hegde static void rootnex_coredma_reset_cookies(dev_info_t *dip,
22820906b23SVikram Hegde     ddi_dma_handle_t handle);
22920906b23SVikram Hegde static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
23094f1124eSVikram Hegde     ddi_dma_cookie_t **cookiepp, uint_t *ccountp);
23194f1124eSVikram Hegde static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
23294f1124eSVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t ccount);
23394f1124eSVikram Hegde static int rootnex_coredma_clear_cookies(dev_info_t *dip,
23494f1124eSVikram Hegde     ddi_dma_handle_t handle);
23594f1124eSVikram Hegde static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle);
2365dfdb46bSVikram Hegde #endif
23720906b23SVikram Hegde static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip,
23820906b23SVikram Hegde     ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags);
23920906b23SVikram Hegde static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip,
24020906b23SVikram Hegde     ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp,
24120906b23SVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
2427c478bd9Sstevel@tonic-gate 
2437c478bd9Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = {
2447c478bd9Sstevel@tonic-gate 	BUSO_REV,
2457c478bd9Sstevel@tonic-gate 	rootnex_map,
2467c478bd9Sstevel@tonic-gate 	NULL,
2477c478bd9Sstevel@tonic-gate 	NULL,
2487c478bd9Sstevel@tonic-gate 	NULL,
2497c478bd9Sstevel@tonic-gate 	rootnex_map_fault,
2507c478bd9Sstevel@tonic-gate 	rootnex_dma_map,
2517c478bd9Sstevel@tonic-gate 	rootnex_dma_allochdl,
2527c478bd9Sstevel@tonic-gate 	rootnex_dma_freehdl,
2537c478bd9Sstevel@tonic-gate 	rootnex_dma_bindhdl,
2547c478bd9Sstevel@tonic-gate 	rootnex_dma_unbindhdl,
25512f080e7Smrj 	rootnex_dma_sync,
2567c478bd9Sstevel@tonic-gate 	rootnex_dma_win,
2577c478bd9Sstevel@tonic-gate 	rootnex_dma_mctl,
2587c478bd9Sstevel@tonic-gate 	rootnex_ctlops,
2597c478bd9Sstevel@tonic-gate 	ddi_bus_prop_op,
2607c478bd9Sstevel@tonic-gate 	i_ddi_rootnex_get_eventcookie,
2617c478bd9Sstevel@tonic-gate 	i_ddi_rootnex_add_eventcall,
2627c478bd9Sstevel@tonic-gate 	i_ddi_rootnex_remove_eventcall,
2637c478bd9Sstevel@tonic-gate 	i_ddi_rootnex_post_event,
2647c478bd9Sstevel@tonic-gate 	0,			/* bus_intr_ctl */
2657c478bd9Sstevel@tonic-gate 	0,			/* bus_config */
2667c478bd9Sstevel@tonic-gate 	0,			/* bus_unconfig */
26700d0963fSdilpreet 	rootnex_fm_init,	/* bus_fm_init */
2687c478bd9Sstevel@tonic-gate 	NULL,			/* bus_fm_fini */
2697c478bd9Sstevel@tonic-gate 	NULL,			/* bus_fm_access_enter */
2707c478bd9Sstevel@tonic-gate 	NULL,			/* bus_fm_access_exit */
2717c478bd9Sstevel@tonic-gate 	NULL,			/* bus_powr */
2727c478bd9Sstevel@tonic-gate 	rootnex_intr_ops	/* bus_intr_op */
2737c478bd9Sstevel@tonic-gate };
2747c478bd9Sstevel@tonic-gate 
27512f080e7Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
27612f080e7Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
2773a634bfcSVikram Hegde static int rootnex_quiesce(dev_info_t *dip);
2787c478bd9Sstevel@tonic-gate 
2797c478bd9Sstevel@tonic-gate static struct dev_ops rootnex_ops = {
2807c478bd9Sstevel@tonic-gate 	DEVO_REV,
28112f080e7Smrj 	0,
28212f080e7Smrj 	ddi_no_info,
2837c478bd9Sstevel@tonic-gate 	nulldev,
28412f080e7Smrj 	nulldev,
2857c478bd9Sstevel@tonic-gate 	rootnex_attach,
28612f080e7Smrj 	rootnex_detach,
28712f080e7Smrj 	nulldev,
28812f080e7Smrj 	&rootnex_cb_ops,
28919397407SSherry Moore 	&rootnex_bus_ops,
29019397407SSherry Moore 	NULL,
2913a634bfcSVikram Hegde 	rootnex_quiesce,		/* quiesce */
2927c478bd9Sstevel@tonic-gate };
2937c478bd9Sstevel@tonic-gate 
29412f080e7Smrj static struct modldrv rootnex_modldrv = {
29512f080e7Smrj 	&mod_driverops,
296613b2871SRichard Bean 	"i86pc root nexus",
29712f080e7Smrj 	&rootnex_ops
2987c478bd9Sstevel@tonic-gate };
2997c478bd9Sstevel@tonic-gate 
30012f080e7Smrj static struct modlinkage rootnex_modlinkage = {
30112f080e7Smrj 	MODREV_1,
30212f080e7Smrj 	(void *)&rootnex_modldrv,
30312f080e7Smrj 	NULL
3047c478bd9Sstevel@tonic-gate };
3057c478bd9Sstevel@tonic-gate 
3063a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
30720906b23SVikram Hegde static iommulib_nexops_t iommulib_nexops = {
30820906b23SVikram Hegde 	IOMMU_NEXOPS_VERSION,
30920906b23SVikram Hegde 	"Rootnex IOMMU ops Vers 1.1",
31020906b23SVikram Hegde 	NULL,
31120906b23SVikram Hegde 	rootnex_coredma_allochdl,
31220906b23SVikram Hegde 	rootnex_coredma_freehdl,
31320906b23SVikram Hegde 	rootnex_coredma_bindhdl,
31420906b23SVikram Hegde 	rootnex_coredma_unbindhdl,
31520906b23SVikram Hegde 	rootnex_coredma_reset_cookies,
31620906b23SVikram Hegde 	rootnex_coredma_get_cookies,
31794f1124eSVikram Hegde 	rootnex_coredma_set_cookies,
31894f1124eSVikram Hegde 	rootnex_coredma_clear_cookies,
31994f1124eSVikram Hegde 	rootnex_coredma_get_sleep_flags,
32020906b23SVikram Hegde 	rootnex_coredma_sync,
32120906b23SVikram Hegde 	rootnex_coredma_win,
322b51bbbf5SVikram Hegde 	rootnex_dma_map,
323b51bbbf5SVikram Hegde 	rootnex_dma_mctl
32420906b23SVikram Hegde };
3255dfdb46bSVikram Hegde #endif
3267c478bd9Sstevel@tonic-gate 
32712f080e7Smrj /*
32812f080e7Smrj  *  extern hacks
32912f080e7Smrj  */
33012f080e7Smrj extern struct seg_ops segdev_ops;
33112f080e7Smrj extern int ignore_hardware_nodes;	/* force flag from ddi_impl.c */
33212f080e7Smrj #ifdef	DDI_MAP_DEBUG
33312f080e7Smrj extern int ddi_map_debug_flag;
33412f080e7Smrj #define	ddi_map_debug	if (ddi_map_debug_flag) prom_printf
33512f080e7Smrj #endif
33612f080e7Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr);
33712f080e7Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr);
33812f080e7Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *,
33912f080e7Smrj     psm_intr_op_t, int *);
34012f080e7Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip);
34112f080e7Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip);
34236945f79Smrj 
34312f080e7Smrj /*
34412f080e7Smrj  * Use device arena to use for device control register mappings.
34512f080e7Smrj  * Various kernel memory walkers (debugger, dtrace) need to know
34612f080e7Smrj  * to avoid this address range to prevent undesired device activity.
34712f080e7Smrj  */
34812f080e7Smrj extern void *device_arena_alloc(size_t size, int vm_flag);
34912f080e7Smrj extern void device_arena_free(void * vaddr, size_t size);
35012f080e7Smrj 
35112f080e7Smrj 
35212f080e7Smrj /*
35312f080e7Smrj  *  Internal functions
35412f080e7Smrj  */
35512f080e7Smrj static int rootnex_dma_init();
35612f080e7Smrj static void rootnex_add_props(dev_info_t *);
35712f080e7Smrj static int rootnex_ctl_reportdev(dev_info_t *dip);
35812f080e7Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum);
35912f080e7Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp);
36012f080e7Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp);
36112f080e7Smrj static int rootnex_map_handle(ddi_map_req_t *mp);
36212f080e7Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp);
36312f080e7Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize);
36412f080e7Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq,
36512f080e7Smrj     ddi_dma_attr_t *attr);
36612f080e7Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl,
36712f080e7Smrj     rootnex_sglinfo_t *sglinfo);
36812f080e7Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
36912f080e7Smrj     rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag);
37012f080e7Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
37112f080e7Smrj     rootnex_dma_t *dma, ddi_dma_attr_t *attr);
37212f080e7Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma);
37312f080e7Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
37412f080e7Smrj     ddi_dma_attr_t *attr, int kmflag);
37512f080e7Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma);
37612f080e7Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
37712f080e7Smrj     rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset);
37812f080e7Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object,
37912f080e7Smrj     rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset,
38012f080e7Smrj     size_t *copybuf_used, page_t **cur_pp);
38112f080e7Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp,
38212f080e7Smrj     rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie,
38312f080e7Smrj     ddi_dma_attr_t *attr, off_t cur_offset);
38412f080e7Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp,
38512f080e7Smrj     rootnex_dma_t *dma, rootnex_window_t **windowp,
38612f080e7Smrj     ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used);
38712f080e7Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp,
38812f080e7Smrj     rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie);
38912f080e7Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win,
39012f080e7Smrj     off_t offset, size_t size, uint_t cache_flags);
39112f080e7Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma);
39200d0963fSdilpreet static int rootnex_dma_check(dev_info_t *dip, const void *handle,
39300d0963fSdilpreet     const void *comp_addr, const void *not_used);
39407c6692fSMark Johnson static boolean_t rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object,
39507c6692fSMark Johnson     rootnex_sglinfo_t *sglinfo);
39612f080e7Smrj 
39712f080e7Smrj /*
39812f080e7Smrj  * _init()
39912f080e7Smrj  *
40012f080e7Smrj  */
4017c478bd9Sstevel@tonic-gate int
4027c478bd9Sstevel@tonic-gate _init(void)
4037c478bd9Sstevel@tonic-gate {
40412f080e7Smrj 
40512f080e7Smrj 	rootnex_state = NULL;
40612f080e7Smrj 	return (mod_install(&rootnex_modlinkage));
4077c478bd9Sstevel@tonic-gate }
4087c478bd9Sstevel@tonic-gate 
40912f080e7Smrj 
41012f080e7Smrj /*
41112f080e7Smrj  * _info()
41212f080e7Smrj  *
41312f080e7Smrj  */
41412f080e7Smrj int
41512f080e7Smrj _info(struct modinfo *modinfop)
41612f080e7Smrj {
41712f080e7Smrj 	return (mod_info(&rootnex_modlinkage, modinfop));
41812f080e7Smrj }
41912f080e7Smrj 
42012f080e7Smrj 
42112f080e7Smrj /*
42212f080e7Smrj  * _fini()
42312f080e7Smrj  *
42412f080e7Smrj  */
4257c478bd9Sstevel@tonic-gate int
4267c478bd9Sstevel@tonic-gate _fini(void)
4277c478bd9Sstevel@tonic-gate {
4287c478bd9Sstevel@tonic-gate 	return (EBUSY);
4297c478bd9Sstevel@tonic-gate }
4307c478bd9Sstevel@tonic-gate 
43112f080e7Smrj 
43212f080e7Smrj /*
43312f080e7Smrj  * rootnex_attach()
43412f080e7Smrj  *
43512f080e7Smrj  */
43612f080e7Smrj static int
43712f080e7Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
4387c478bd9Sstevel@tonic-gate {
4397aec1d6eScindi 	int fmcap;
44012f080e7Smrj 	int e;
44112f080e7Smrj 
44212f080e7Smrj 	switch (cmd) {
44312f080e7Smrj 	case DDI_ATTACH:
44412f080e7Smrj 		break;
44512f080e7Smrj 	case DDI_RESUME:
4463a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
4473a634bfcSVikram Hegde 		return (immu_unquiesce());
4483a634bfcSVikram Hegde #else
44912f080e7Smrj 		return (DDI_SUCCESS);
4503a634bfcSVikram Hegde #endif
45112f080e7Smrj 	default:
45212f080e7Smrj 		return (DDI_FAILURE);
4537c478bd9Sstevel@tonic-gate 	}
4547c478bd9Sstevel@tonic-gate 
4557c478bd9Sstevel@tonic-gate 	/*
45612f080e7Smrj 	 * We should only have one instance of rootnex. Save it away since we
45712f080e7Smrj 	 * don't have an easy way to get it back later.
4587c478bd9Sstevel@tonic-gate 	 */
45912f080e7Smrj 	ASSERT(rootnex_state == NULL);
46012f080e7Smrj 	rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP);
4617c478bd9Sstevel@tonic-gate 
46212f080e7Smrj 	rootnex_state->r_dip = dip;
4637aec1d6eScindi 	rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15);
46412f080e7Smrj 	rootnex_state->r_reserved_msg_printed = B_FALSE;
46512f080e7Smrj 	rootnex_cnt = &rootnex_state->r_counters[0];
4667c478bd9Sstevel@tonic-gate 
4677aec1d6eScindi 	/*
4687aec1d6eScindi 	 * Set minimum fm capability level for i86pc platforms and then
4697aec1d6eScindi 	 * initialize error handling. Since we're the rootnex, we don't
4707aec1d6eScindi 	 * care what's returned in the fmcap field.
4717aec1d6eScindi 	 */
47200d0963fSdilpreet 	ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE |
47300d0963fSdilpreet 	    DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE;
4747aec1d6eScindi 	fmcap = ddi_system_fmcap;
4757aec1d6eScindi 	ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc);
4767aec1d6eScindi 
47712f080e7Smrj 	/* initialize DMA related state */
47812f080e7Smrj 	e = rootnex_dma_init();
47912f080e7Smrj 	if (e != DDI_SUCCESS) {
48012f080e7Smrj 		kmem_free(rootnex_state, sizeof (rootnex_state_t));
48112f080e7Smrj 		return (DDI_FAILURE);
48212f080e7Smrj 	}
48312f080e7Smrj 
48412f080e7Smrj 	/* Add static root node properties */
48512f080e7Smrj 	rootnex_add_props(dip);
48612f080e7Smrj 
48712f080e7Smrj 	/* since we can't call ddi_report_dev() */
48812f080e7Smrj 	cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip));
48912f080e7Smrj 
49012f080e7Smrj 	/* Initialize rootnex event handle */
49112f080e7Smrj 	i_ddi_rootnex_init_events(dip);
49212f080e7Smrj 
4933a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
49420906b23SVikram Hegde 	e = iommulib_nexus_register(dip, &iommulib_nexops,
49520906b23SVikram Hegde 	    &rootnex_state->r_iommulib_handle);
49620906b23SVikram Hegde 
49720906b23SVikram Hegde 	ASSERT(e == DDI_SUCCESS);
49820906b23SVikram Hegde #endif
49920906b23SVikram Hegde 
50012f080e7Smrj 	return (DDI_SUCCESS);
50112f080e7Smrj }
50212f080e7Smrj 
50312f080e7Smrj 
50412f080e7Smrj /*
50512f080e7Smrj  * rootnex_detach()
50612f080e7Smrj  *
50712f080e7Smrj  */
5087c478bd9Sstevel@tonic-gate /*ARGSUSED*/
5097c478bd9Sstevel@tonic-gate static int
51012f080e7Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
5117c478bd9Sstevel@tonic-gate {
51212f080e7Smrj 	switch (cmd) {
51312f080e7Smrj 	case DDI_SUSPEND:
5143a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
5153a634bfcSVikram Hegde 		return (immu_quiesce());
5163a634bfcSVikram Hegde #else
5173a634bfcSVikram Hegde 		return (DDI_SUCCESS);
5183a634bfcSVikram Hegde #endif
51912f080e7Smrj 	default:
52012f080e7Smrj 		return (DDI_FAILURE);
52112f080e7Smrj 	}
5223a634bfcSVikram Hegde 	/*NOTREACHED*/
5237c478bd9Sstevel@tonic-gate 
52412f080e7Smrj }
5257c478bd9Sstevel@tonic-gate 
5267c478bd9Sstevel@tonic-gate 
52712f080e7Smrj /*
52812f080e7Smrj  * rootnex_dma_init()
52912f080e7Smrj  *
53012f080e7Smrj  */
53112f080e7Smrj /*ARGSUSED*/
53212f080e7Smrj static int
53312f080e7Smrj rootnex_dma_init()
53412f080e7Smrj {
53512f080e7Smrj 	size_t bufsize;
53612f080e7Smrj 
53712f080e7Smrj 
53812f080e7Smrj 	/*
53912f080e7Smrj 	 * size of our cookie/window/copybuf state needed in dma bind that we
54012f080e7Smrj 	 * pre-alloc in dma_alloc_handle
54112f080e7Smrj 	 */
54212f080e7Smrj 	rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies;
54312f080e7Smrj 	rootnex_state->r_prealloc_size =
54412f080e7Smrj 	    (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) +
54512f080e7Smrj 	    (rootnex_prealloc_windows * sizeof (rootnex_window_t)) +
54612f080e7Smrj 	    (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t));
54712f080e7Smrj 
54812f080e7Smrj 	/*
54912f080e7Smrj 	 * setup DDI DMA handle kmem cache, align each handle on 64 bytes,
55012f080e7Smrj 	 * allocate 16 extra bytes for struct pointer alignment
55112f080e7Smrj 	 * (p->dmai_private & dma->dp_prealloc_buffer)
55212f080e7Smrj 	 */
55312f080e7Smrj 	bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) +
55412f080e7Smrj 	    rootnex_state->r_prealloc_size + 0x10;
55512f080e7Smrj 	rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl",
55612f080e7Smrj 	    bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0);
55712f080e7Smrj 	if (rootnex_state->r_dmahdl_cache == NULL) {
55812f080e7Smrj 		return (DDI_FAILURE);
55912f080e7Smrj 	}
5607c478bd9Sstevel@tonic-gate 
5617c478bd9Sstevel@tonic-gate 	/*
5627c478bd9Sstevel@tonic-gate 	 * allocate array to track which major numbers we have printed warnings
5637c478bd9Sstevel@tonic-gate 	 * for.
5647c478bd9Sstevel@tonic-gate 	 */
5657c478bd9Sstevel@tonic-gate 	rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list),
5667c478bd9Sstevel@tonic-gate 	    KM_SLEEP);
5677c478bd9Sstevel@tonic-gate 
5687c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
5697c478bd9Sstevel@tonic-gate }
5707c478bd9Sstevel@tonic-gate 
5717c478bd9Sstevel@tonic-gate 
5727c478bd9Sstevel@tonic-gate /*
57312f080e7Smrj  * rootnex_add_props()
57412f080e7Smrj  *
5757c478bd9Sstevel@tonic-gate  */
5767c478bd9Sstevel@tonic-gate static void
57712f080e7Smrj rootnex_add_props(dev_info_t *dip)
5787c478bd9Sstevel@tonic-gate {
57912f080e7Smrj 	rootnex_intprop_t *rpp;
5807c478bd9Sstevel@tonic-gate 	int i;
5817c478bd9Sstevel@tonic-gate 
58212f080e7Smrj 	/* Add static integer/boolean properties to the root node */
58312f080e7Smrj 	rpp = rootnex_intprp;
58412f080e7Smrj 	for (i = 0; i < NROOT_INTPROPS; i++) {
58512f080e7Smrj 		(void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip,
58612f080e7Smrj 		    rpp[i].prop_name, rpp[i].prop_value);
58712f080e7Smrj 	}
5887c478bd9Sstevel@tonic-gate }
5897c478bd9Sstevel@tonic-gate 
59012f080e7Smrj 
59112f080e7Smrj 
5927c478bd9Sstevel@tonic-gate /*
59312f080e7Smrj  * *************************
59412f080e7Smrj  *  ctlops related routines
59512f080e7Smrj  * *************************
59612f080e7Smrj  */
59712f080e7Smrj 
59812f080e7Smrj /*
59912f080e7Smrj  * rootnex_ctlops()
6007c478bd9Sstevel@tonic-gate  *
6017c478bd9Sstevel@tonic-gate  */
602a195726fSgovinda /*ARGSUSED*/
6037c478bd9Sstevel@tonic-gate static int
60412f080e7Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop,
60512f080e7Smrj     void *arg, void *result)
6067c478bd9Sstevel@tonic-gate {
60712f080e7Smrj 	int n, *ptr;
60812f080e7Smrj 	struct ddi_parent_private_data *pdp;
6097c478bd9Sstevel@tonic-gate 
61012f080e7Smrj 	switch (ctlop) {
61112f080e7Smrj 	case DDI_CTLOPS_DMAPMAPC:
6127c478bd9Sstevel@tonic-gate 		/*
61312f080e7Smrj 		 * Return 'partial' to indicate that dma mapping
61412f080e7Smrj 		 * has to be done in the main MMU.
6157c478bd9Sstevel@tonic-gate 		 */
61612f080e7Smrj 		return (DDI_DMA_PARTIAL);
6177c478bd9Sstevel@tonic-gate 
61812f080e7Smrj 	case DDI_CTLOPS_BTOP:
6197c478bd9Sstevel@tonic-gate 		/*
62012f080e7Smrj 		 * Convert byte count input to physical page units.
62112f080e7Smrj 		 * (byte counts that are not a page-size multiple
62212f080e7Smrj 		 * are rounded down)
6237c478bd9Sstevel@tonic-gate 		 */
62412f080e7Smrj 		*(ulong_t *)result = btop(*(ulong_t *)arg);
6257c478bd9Sstevel@tonic-gate 		return (DDI_SUCCESS);
6267c478bd9Sstevel@tonic-gate 
62712f080e7Smrj 	case DDI_CTLOPS_PTOB:
6287c478bd9Sstevel@tonic-gate 		/*
62912f080e7Smrj 		 * Convert size in physical pages to bytes
6307c478bd9Sstevel@tonic-gate 		 */
63112f080e7Smrj 		*(ulong_t *)result = ptob(*(ulong_t *)arg);
6327c478bd9Sstevel@tonic-gate 		return (DDI_SUCCESS);
6337c478bd9Sstevel@tonic-gate 
63412f080e7Smrj 	case DDI_CTLOPS_BTOPR:
6357c478bd9Sstevel@tonic-gate 		/*
63612f080e7Smrj 		 * Convert byte count input to physical page units
63712f080e7Smrj 		 * (byte counts that are not a page-size multiple
63812f080e7Smrj 		 * are rounded up)
6397c478bd9Sstevel@tonic-gate 		 */
64012f080e7Smrj 		*(ulong_t *)result = btopr(*(ulong_t *)arg);
64112f080e7Smrj 		return (DDI_SUCCESS);
64212f080e7Smrj 
64312f080e7Smrj 	case DDI_CTLOPS_INITCHILD:
64412f080e7Smrj 		return (impl_ddi_sunbus_initchild(arg));
64512f080e7Smrj 
64612f080e7Smrj 	case DDI_CTLOPS_UNINITCHILD:
64712f080e7Smrj 		impl_ddi_sunbus_removechild(arg);
64812f080e7Smrj 		return (DDI_SUCCESS);
64912f080e7Smrj 
65012f080e7Smrj 	case DDI_CTLOPS_REPORTDEV:
65112f080e7Smrj 		return (rootnex_ctl_reportdev(rdip));
65212f080e7Smrj 
65312f080e7Smrj 	case DDI_CTLOPS_IOMIN:
6547c478bd9Sstevel@tonic-gate 		/*
65512f080e7Smrj 		 * Nothing to do here but reflect back..
6567c478bd9Sstevel@tonic-gate 		 */
6577c478bd9Sstevel@tonic-gate 		return (DDI_SUCCESS);
6587c478bd9Sstevel@tonic-gate 
65912f080e7Smrj 	case DDI_CTLOPS_REGSIZE:
66012f080e7Smrj 	case DDI_CTLOPS_NREGS:
66112f080e7Smrj 		break;
6627c478bd9Sstevel@tonic-gate 
66312f080e7Smrj 	case DDI_CTLOPS_SIDDEV:
66412f080e7Smrj 		if (ndi_dev_is_prom_node(rdip))
6657c478bd9Sstevel@tonic-gate 			return (DDI_SUCCESS);
66612f080e7Smrj 		if (ndi_dev_is_persistent_node(rdip))
66712f080e7Smrj 			return (DDI_SUCCESS);
6687c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
6697c478bd9Sstevel@tonic-gate 
67012f080e7Smrj 	case DDI_CTLOPS_POWER:
67112f080e7Smrj 		return ((*pm_platform_power)((power_req_t *)arg));
67212f080e7Smrj 
673a195726fSgovinda 	case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */
67412f080e7Smrj 	case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */
67512f080e7Smrj 	case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */
67612f080e7Smrj 	case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */
677a195726fSgovinda 	case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */
678a195726fSgovinda 	case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */
67912f080e7Smrj 		if (!rootnex_state->r_reserved_msg_printed) {
68012f080e7Smrj 			rootnex_state->r_reserved_msg_printed = B_TRUE;
68112f080e7Smrj 			cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for "
68212f080e7Smrj 			    "1 or more reserved/obsolete operations.");
6837c478bd9Sstevel@tonic-gate 		}
68412f080e7Smrj 		return (DDI_FAILURE);
6857c478bd9Sstevel@tonic-gate 
6867c478bd9Sstevel@tonic-gate 	default:
6877c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
6887c478bd9Sstevel@tonic-gate 	}
68912f080e7Smrj 	/*
69012f080e7Smrj 	 * The rest are for "hardware" properties
69112f080e7Smrj 	 */
69212f080e7Smrj 	if ((pdp = ddi_get_parent_data(rdip)) == NULL)
69312f080e7Smrj 		return (DDI_FAILURE);
6947c478bd9Sstevel@tonic-gate 
69512f080e7Smrj 	if (ctlop == DDI_CTLOPS_NREGS) {
69612f080e7Smrj 		ptr = (int *)result;
69712f080e7Smrj 		*ptr = pdp->par_nreg;
69812f080e7Smrj 	} else {
69912f080e7Smrj 		off_t *size = (off_t *)result;
7007c478bd9Sstevel@tonic-gate 
70112f080e7Smrj 		ptr = (int *)arg;
70212f080e7Smrj 		n = *ptr;
70312f080e7Smrj 		if (n >= pdp->par_nreg) {
70412f080e7Smrj 			return (DDI_FAILURE);
70512f080e7Smrj 		}
70612f080e7Smrj 		*size = (off_t)pdp->par_reg[n].regspec_size;
70712f080e7Smrj 	}
7087c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
7097c478bd9Sstevel@tonic-gate }
7107c478bd9Sstevel@tonic-gate 
71112f080e7Smrj 
71212f080e7Smrj /*
71312f080e7Smrj  * rootnex_ctl_reportdev()
71412f080e7Smrj  *
71512f080e7Smrj  */
7167c478bd9Sstevel@tonic-gate static int
71712f080e7Smrj rootnex_ctl_reportdev(dev_info_t *dev)
71812f080e7Smrj {
71912f080e7Smrj 	int i, n, len, f_len = 0;
72012f080e7Smrj 	char *buf;
72112f080e7Smrj 
72212f080e7Smrj 	buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP);
72312f080e7Smrj 	f_len += snprintf(buf, REPORTDEV_BUFSIZE,
72412f080e7Smrj 	    "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev));
72512f080e7Smrj 	len = strlen(buf);
72612f080e7Smrj 
72712f080e7Smrj 	for (i = 0; i < sparc_pd_getnreg(dev); i++) {
72812f080e7Smrj 
72912f080e7Smrj 		struct regspec *rp = sparc_pd_getreg(dev, i);
73012f080e7Smrj 
73112f080e7Smrj 		if (i == 0)
73212f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
73312f080e7Smrj 			    ": ");
73412f080e7Smrj 		else
73512f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
73612f080e7Smrj 			    " and ");
73712f080e7Smrj 		len = strlen(buf);
73812f080e7Smrj 
73912f080e7Smrj 		switch (rp->regspec_bustype) {
74012f080e7Smrj 
74112f080e7Smrj 		case BTEISA:
74212f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
74312f080e7Smrj 			    "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr);
74412f080e7Smrj 			break;
74512f080e7Smrj 
74612f080e7Smrj 		case BTISA:
74712f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
74812f080e7Smrj 			    "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr);
74912f080e7Smrj 			break;
75012f080e7Smrj 
75112f080e7Smrj 		default:
75212f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
75312f080e7Smrj 			    "space %x offset %x",
75412f080e7Smrj 			    rp->regspec_bustype, rp->regspec_addr);
75512f080e7Smrj 			break;
75612f080e7Smrj 		}
75712f080e7Smrj 		len = strlen(buf);
75812f080e7Smrj 	}
75912f080e7Smrj 	for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) {
76012f080e7Smrj 		int pri;
76112f080e7Smrj 
76212f080e7Smrj 		if (i != 0) {
76312f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
76412f080e7Smrj 			    ",");
76512f080e7Smrj 			len = strlen(buf);
76612f080e7Smrj 		}
76712f080e7Smrj 		pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri);
76812f080e7Smrj 		f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
76912f080e7Smrj 		    " sparc ipl %d", pri);
77012f080e7Smrj 		len = strlen(buf);
77112f080e7Smrj 	}
77212f080e7Smrj #ifdef DEBUG
77312f080e7Smrj 	if (f_len + 1 >= REPORTDEV_BUFSIZE) {
77412f080e7Smrj 		cmn_err(CE_NOTE, "next message is truncated: "
77512f080e7Smrj 		    "printed length 1024, real length %d", f_len);
77612f080e7Smrj 	}
77712f080e7Smrj #endif /* DEBUG */
77812f080e7Smrj 	cmn_err(CE_CONT, "?%s\n", buf);
77912f080e7Smrj 	kmem_free(buf, REPORTDEV_BUFSIZE);
78012f080e7Smrj 	return (DDI_SUCCESS);
78112f080e7Smrj }
78212f080e7Smrj 
78312f080e7Smrj 
78412f080e7Smrj /*
78512f080e7Smrj  * ******************
78612f080e7Smrj  *  map related code
78712f080e7Smrj  * ******************
78812f080e7Smrj  */
78912f080e7Smrj 
79012f080e7Smrj /*
79112f080e7Smrj  * rootnex_map()
79212f080e7Smrj  *
79312f080e7Smrj  */
79412f080e7Smrj static int
79512f080e7Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset,
79612f080e7Smrj     off_t len, caddr_t *vaddrp)
7977c478bd9Sstevel@tonic-gate {
7987c478bd9Sstevel@tonic-gate 	struct regspec *rp, tmp_reg;
7997c478bd9Sstevel@tonic-gate 	ddi_map_req_t mr = *mp;		/* Get private copy of request */
8007c478bd9Sstevel@tonic-gate 	int error;
8017c478bd9Sstevel@tonic-gate 
8027c478bd9Sstevel@tonic-gate 	mp = &mr;
8037c478bd9Sstevel@tonic-gate 
8047c478bd9Sstevel@tonic-gate 	switch (mp->map_op)  {
8057c478bd9Sstevel@tonic-gate 	case DDI_MO_MAP_LOCKED:
8067c478bd9Sstevel@tonic-gate 	case DDI_MO_UNMAP:
8077c478bd9Sstevel@tonic-gate 	case DDI_MO_MAP_HANDLE:
8087c478bd9Sstevel@tonic-gate 		break;
8097c478bd9Sstevel@tonic-gate 	default:
8107c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
8117c478bd9Sstevel@tonic-gate 		cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.",
8127c478bd9Sstevel@tonic-gate 		    mp->map_op);
8137c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8147c478bd9Sstevel@tonic-gate 		return (DDI_ME_UNIMPLEMENTED);
8157c478bd9Sstevel@tonic-gate 	}
8167c478bd9Sstevel@tonic-gate 
8177c478bd9Sstevel@tonic-gate 	if (mp->map_flags & DDI_MF_USER_MAPPING)  {
8187c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
8197c478bd9Sstevel@tonic-gate 		cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user.");
8207c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8217c478bd9Sstevel@tonic-gate 		return (DDI_ME_UNIMPLEMENTED);
8227c478bd9Sstevel@tonic-gate 	}
8237c478bd9Sstevel@tonic-gate 
8247c478bd9Sstevel@tonic-gate 	/*
8257c478bd9Sstevel@tonic-gate 	 * First, if given an rnumber, convert it to a regspec...
8267c478bd9Sstevel@tonic-gate 	 * (Presumably, this is on behalf of a child of the root node?)
8277c478bd9Sstevel@tonic-gate 	 */
8287c478bd9Sstevel@tonic-gate 
8297c478bd9Sstevel@tonic-gate 	if (mp->map_type == DDI_MT_RNUMBER)  {
8307c478bd9Sstevel@tonic-gate 
8317c478bd9Sstevel@tonic-gate 		int rnumber = mp->map_obj.rnumber;
8327c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
8337c478bd9Sstevel@tonic-gate 		static char *out_of_range =
8347c478bd9Sstevel@tonic-gate 		    "rootnex_map: Out of range rnumber <%d>, device <%s>";
8357c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8367c478bd9Sstevel@tonic-gate 
8377c478bd9Sstevel@tonic-gate 		rp = i_ddi_rnumber_to_regspec(rdip, rnumber);
8387c478bd9Sstevel@tonic-gate 		if (rp == NULL)  {
8397c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
8407c478bd9Sstevel@tonic-gate 			cmn_err(CE_WARN, out_of_range, rnumber,
8417c478bd9Sstevel@tonic-gate 			    ddi_get_name(rdip));
8427c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8437c478bd9Sstevel@tonic-gate 			return (DDI_ME_RNUMBER_RANGE);
8447c478bd9Sstevel@tonic-gate 		}
8457c478bd9Sstevel@tonic-gate 
8467c478bd9Sstevel@tonic-gate 		/*
8477c478bd9Sstevel@tonic-gate 		 * Convert the given ddi_map_req_t from rnumber to regspec...
8487c478bd9Sstevel@tonic-gate 		 */
8497c478bd9Sstevel@tonic-gate 
8507c478bd9Sstevel@tonic-gate 		mp->map_type = DDI_MT_REGSPEC;
8517c478bd9Sstevel@tonic-gate 		mp->map_obj.rp = rp;
8527c478bd9Sstevel@tonic-gate 	}
8537c478bd9Sstevel@tonic-gate 
8547c478bd9Sstevel@tonic-gate 	/*
8557c478bd9Sstevel@tonic-gate 	 * Adjust offset and length correspnding to called values...
8567c478bd9Sstevel@tonic-gate 	 * XXX: A non-zero length means override the one in the regspec
8577c478bd9Sstevel@tonic-gate 	 * XXX: (regardless of what's in the parent's range?)
8587c478bd9Sstevel@tonic-gate 	 */
8597c478bd9Sstevel@tonic-gate 
8607c478bd9Sstevel@tonic-gate 	tmp_reg = *(mp->map_obj.rp);		/* Preserve underlying data */
8617c478bd9Sstevel@tonic-gate 	rp = mp->map_obj.rp = &tmp_reg;		/* Use tmp_reg in request */
8627c478bd9Sstevel@tonic-gate 
8637c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
864843e1988Sjohnlev 	cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d "
865843e1988Sjohnlev 	    "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip),
866843e1988Sjohnlev 	    rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset,
867843e1988Sjohnlev 	    len, mp->map_handlep);
8687c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8697c478bd9Sstevel@tonic-gate 
8707c478bd9Sstevel@tonic-gate 	/*
8717c478bd9Sstevel@tonic-gate 	 * I/O or memory mapping:
8727c478bd9Sstevel@tonic-gate 	 *
8737c478bd9Sstevel@tonic-gate 	 *	<bustype=0, addr=x, len=x>: memory
8747c478bd9Sstevel@tonic-gate 	 *	<bustype=1, addr=x, len=x>: i/o
8757c478bd9Sstevel@tonic-gate 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
8767c478bd9Sstevel@tonic-gate 	 */
8777c478bd9Sstevel@tonic-gate 
8787c478bd9Sstevel@tonic-gate 	if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) {
8797c478bd9Sstevel@tonic-gate 		cmn_err(CE_WARN, "<%s,%s> invalid register spec"
8807c478bd9Sstevel@tonic-gate 		    " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip),
8817c478bd9Sstevel@tonic-gate 		    ddi_get_name(rdip), rp->regspec_bustype,
8827c478bd9Sstevel@tonic-gate 		    rp->regspec_addr, rp->regspec_size);
8837c478bd9Sstevel@tonic-gate 		return (DDI_ME_INVAL);
8847c478bd9Sstevel@tonic-gate 	}
8857c478bd9Sstevel@tonic-gate 
8867c478bd9Sstevel@tonic-gate 	if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) {
8877c478bd9Sstevel@tonic-gate 		/*
8887c478bd9Sstevel@tonic-gate 		 * compatibility i/o mapping
8897c478bd9Sstevel@tonic-gate 		 */
8907c478bd9Sstevel@tonic-gate 		rp->regspec_bustype += (uint_t)offset;
8917c478bd9Sstevel@tonic-gate 	} else {
8927c478bd9Sstevel@tonic-gate 		/*
8937c478bd9Sstevel@tonic-gate 		 * Normal memory or i/o mapping
8947c478bd9Sstevel@tonic-gate 		 */
8957c478bd9Sstevel@tonic-gate 		rp->regspec_addr += (uint_t)offset;
8967c478bd9Sstevel@tonic-gate 	}
8977c478bd9Sstevel@tonic-gate 
8987c478bd9Sstevel@tonic-gate 	if (len != 0)
8997c478bd9Sstevel@tonic-gate 		rp->regspec_size = (uint_t)len;
9007c478bd9Sstevel@tonic-gate 
9017c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
902843e1988Sjohnlev 	cmn_err(CE_CONT, "             <%s,%s> <0x%x, 0x%x, 0x%d> offset %d "
903843e1988Sjohnlev 	    "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip),
9047c478bd9Sstevel@tonic-gate 	    rp->regspec_bustype, rp->regspec_addr, rp->regspec_size,
9057c478bd9Sstevel@tonic-gate 	    offset, len, mp->map_handlep);
9067c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
9077c478bd9Sstevel@tonic-gate 
9087c478bd9Sstevel@tonic-gate 	/*
9097c478bd9Sstevel@tonic-gate 	 * Apply any parent ranges at this level, if applicable.
9107c478bd9Sstevel@tonic-gate 	 * (This is where nexus specific regspec translation takes place.
9117c478bd9Sstevel@tonic-gate 	 * Use of this function is implicit agreement that translation is
9127c478bd9Sstevel@tonic-gate 	 * provided via ddi_apply_range.)
9137c478bd9Sstevel@tonic-gate 	 */
9147c478bd9Sstevel@tonic-gate 
9157c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
9167c478bd9Sstevel@tonic-gate 	ddi_map_debug("applying range of parent <%s> to child <%s>...\n",
9177c478bd9Sstevel@tonic-gate 	    ddi_get_name(dip), ddi_get_name(rdip));
9187c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
9197c478bd9Sstevel@tonic-gate 
9207c478bd9Sstevel@tonic-gate 	if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0)
9217c478bd9Sstevel@tonic-gate 		return (error);
9227c478bd9Sstevel@tonic-gate 
9237c478bd9Sstevel@tonic-gate 	switch (mp->map_op)  {
9247c478bd9Sstevel@tonic-gate 	case DDI_MO_MAP_LOCKED:
9257c478bd9Sstevel@tonic-gate 
9267c478bd9Sstevel@tonic-gate 		/*
9277c478bd9Sstevel@tonic-gate 		 * Set up the locked down kernel mapping to the regspec...
9287c478bd9Sstevel@tonic-gate 		 */
9297c478bd9Sstevel@tonic-gate 
9307c478bd9Sstevel@tonic-gate 		return (rootnex_map_regspec(mp, vaddrp));
9317c478bd9Sstevel@tonic-gate 
9327c478bd9Sstevel@tonic-gate 	case DDI_MO_UNMAP:
9337c478bd9Sstevel@tonic-gate 
9347c478bd9Sstevel@tonic-gate 		/*
9357c478bd9Sstevel@tonic-gate 		 * Release mapping...
9367c478bd9Sstevel@tonic-gate 		 */
9377c478bd9Sstevel@tonic-gate 
9387c478bd9Sstevel@tonic-gate 		return (rootnex_unmap_regspec(mp, vaddrp));
9397c478bd9Sstevel@tonic-gate 
9407c478bd9Sstevel@tonic-gate 	case DDI_MO_MAP_HANDLE:
9417c478bd9Sstevel@tonic-gate 
9427c478bd9Sstevel@tonic-gate 		return (rootnex_map_handle(mp));
9437c478bd9Sstevel@tonic-gate 
9447c478bd9Sstevel@tonic-gate 	default:
9457c478bd9Sstevel@tonic-gate 		return (DDI_ME_UNIMPLEMENTED);
9467c478bd9Sstevel@tonic-gate 	}
9477c478bd9Sstevel@tonic-gate }
9487c478bd9Sstevel@tonic-gate 
9497c478bd9Sstevel@tonic-gate 
9507c478bd9Sstevel@tonic-gate /*
95112f080e7Smrj  * rootnex_map_fault()
9527c478bd9Sstevel@tonic-gate  *
9537c478bd9Sstevel@tonic-gate  *	fault in mappings for requestors
9547c478bd9Sstevel@tonic-gate  */
9557c478bd9Sstevel@tonic-gate /*ARGSUSED*/
9567c478bd9Sstevel@tonic-gate static int
95712f080e7Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat,
95812f080e7Smrj     struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot,
95912f080e7Smrj     uint_t lock)
9607c478bd9Sstevel@tonic-gate {
9617c478bd9Sstevel@tonic-gate 
9627c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
9637c478bd9Sstevel@tonic-gate 	ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn);
9647c478bd9Sstevel@tonic-gate 	ddi_map_debug(" Seg <%s>\n",
9657c478bd9Sstevel@tonic-gate 	    seg->s_ops == &segdev_ops ? "segdev" :
9667c478bd9Sstevel@tonic-gate 	    seg == &kvseg ? "segkmem" : "NONE!");
9677c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
9687c478bd9Sstevel@tonic-gate 
9697c478bd9Sstevel@tonic-gate 	/*
9707c478bd9Sstevel@tonic-gate 	 * This is all terribly broken, but it is a start
9717c478bd9Sstevel@tonic-gate 	 *
9727c478bd9Sstevel@tonic-gate 	 * XXX	Note that this test means that segdev_ops
9737c478bd9Sstevel@tonic-gate 	 *	must be exported from seg_dev.c.
9747c478bd9Sstevel@tonic-gate 	 * XXX	What about devices with their own segment drivers?
9757c478bd9Sstevel@tonic-gate 	 */
9767c478bd9Sstevel@tonic-gate 	if (seg->s_ops == &segdev_ops) {
977843e1988Sjohnlev 		struct segdev_data *sdp = (struct segdev_data *)seg->s_data;
9787c478bd9Sstevel@tonic-gate 
9797c478bd9Sstevel@tonic-gate 		if (hat == NULL) {
9807c478bd9Sstevel@tonic-gate 			/*
9817c478bd9Sstevel@tonic-gate 			 * This is one plausible interpretation of
9827c478bd9Sstevel@tonic-gate 			 * a null hat i.e. use the first hat on the
9837c478bd9Sstevel@tonic-gate 			 * address space hat list which by convention is
9847c478bd9Sstevel@tonic-gate 			 * the hat of the system MMU.  At alternative
9857c478bd9Sstevel@tonic-gate 			 * would be to panic .. this might well be better ..
9867c478bd9Sstevel@tonic-gate 			 */
9877c478bd9Sstevel@tonic-gate 			ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock));
9887c478bd9Sstevel@tonic-gate 			hat = seg->s_as->a_hat;
9897c478bd9Sstevel@tonic-gate 			cmn_err(CE_NOTE, "rootnex_map_fault: nil hat");
9907c478bd9Sstevel@tonic-gate 		}
9917c478bd9Sstevel@tonic-gate 		hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr,
9927c478bd9Sstevel@tonic-gate 		    (lock ? HAT_LOAD_LOCK : HAT_LOAD));
9937c478bd9Sstevel@tonic-gate 	} else if (seg == &kvseg && dp == NULL) {
9947c478bd9Sstevel@tonic-gate 		hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot,
9957c478bd9Sstevel@tonic-gate 		    HAT_LOAD_LOCK);
9967c478bd9Sstevel@tonic-gate 	} else
9977c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
9987c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
9997c478bd9Sstevel@tonic-gate }
10007c478bd9Sstevel@tonic-gate 
10017c478bd9Sstevel@tonic-gate 
10027c478bd9Sstevel@tonic-gate /*
100312f080e7Smrj  * rootnex_map_regspec()
100412f080e7Smrj  *     we don't support mapping of I/O cards above 4Gb
10057c478bd9Sstevel@tonic-gate  */
10067c478bd9Sstevel@tonic-gate static int
100712f080e7Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp)
10087c478bd9Sstevel@tonic-gate {
1009843e1988Sjohnlev 	rootnex_addr_t rbase;
101012f080e7Smrj 	void *cvaddr;
101112f080e7Smrj 	uint_t npages, pgoffset;
101212f080e7Smrj 	struct regspec *rp;
101312f080e7Smrj 	ddi_acc_hdl_t *hp;
101412f080e7Smrj 	ddi_acc_impl_t *ap;
101512f080e7Smrj 	uint_t	hat_acc_flags;
1016843e1988Sjohnlev 	paddr_t pbase;
10177c478bd9Sstevel@tonic-gate 
101812f080e7Smrj 	rp = mp->map_obj.rp;
101912f080e7Smrj 	hp = mp->map_handlep;
102012f080e7Smrj 
102112f080e7Smrj #ifdef	DDI_MAP_DEBUG
102212f080e7Smrj 	ddi_map_debug(
102312f080e7Smrj 	    "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n",
102412f080e7Smrj 	    rp->regspec_bustype, rp->regspec_addr,
102512f080e7Smrj 	    rp->regspec_size, mp->map_handlep);
102612f080e7Smrj #endif	/* DDI_MAP_DEBUG */
10277c478bd9Sstevel@tonic-gate 
10287c478bd9Sstevel@tonic-gate 	/*
102912f080e7Smrj 	 * I/O or memory mapping
103012f080e7Smrj 	 *
103112f080e7Smrj 	 *	<bustype=0, addr=x, len=x>: memory
103212f080e7Smrj 	 *	<bustype=1, addr=x, len=x>: i/o
103312f080e7Smrj 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
10347c478bd9Sstevel@tonic-gate 	 */
103512f080e7Smrj 
103612f080e7Smrj 	if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) {
103712f080e7Smrj 		cmn_err(CE_WARN, "rootnex: invalid register spec"
103812f080e7Smrj 		    " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype,
103912f080e7Smrj 		    rp->regspec_addr, rp->regspec_size);
104012f080e7Smrj 		return (DDI_FAILURE);
10417c478bd9Sstevel@tonic-gate 	}
104212f080e7Smrj 
104312f080e7Smrj 	if (rp->regspec_bustype != 0) {
10447c478bd9Sstevel@tonic-gate 		/*
104512f080e7Smrj 		 * I/O space - needs a handle.
10467c478bd9Sstevel@tonic-gate 		 */
10477c478bd9Sstevel@tonic-gate 		if (hp == NULL) {
104812f080e7Smrj 			return (DDI_FAILURE);
10497c478bd9Sstevel@tonic-gate 		}
105012f080e7Smrj 		ap = (ddi_acc_impl_t *)hp->ah_platform_private;
105112f080e7Smrj 		ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE;
105212f080e7Smrj 		impl_acc_hdl_init(hp);
10537c478bd9Sstevel@tonic-gate 
105412f080e7Smrj 		if (mp->map_flags & DDI_MF_DEVICE_MAPPING) {
105512f080e7Smrj #ifdef  DDI_MAP_DEBUG
1056843e1988Sjohnlev 			ddi_map_debug("rootnex_map_regspec: mmap() "
1057843e1988Sjohnlev 			    "to I/O space is not supported.\n");
105812f080e7Smrj #endif  /* DDI_MAP_DEBUG */
105912f080e7Smrj 			return (DDI_ME_INVAL);
10607c478bd9Sstevel@tonic-gate 		} else {
10617c478bd9Sstevel@tonic-gate 			/*
106212f080e7Smrj 			 * 1275-compliant vs. compatibility i/o mapping
10637c478bd9Sstevel@tonic-gate 			 */
106412f080e7Smrj 			*vaddrp =
106512f080e7Smrj 			    (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ?
106612f080e7Smrj 			    ((caddr_t)(uintptr_t)rp->regspec_bustype) :
106712f080e7Smrj 			    ((caddr_t)(uintptr_t)rp->regspec_addr);
1068843e1988Sjohnlev #ifdef __xpv
1069843e1988Sjohnlev 			if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1070843e1988Sjohnlev 				hp->ah_pfn = xen_assign_pfn(
1071843e1988Sjohnlev 				    mmu_btop((ulong_t)rp->regspec_addr &
1072843e1988Sjohnlev 				    MMU_PAGEMASK));
1073843e1988Sjohnlev 			} else {
1074843e1988Sjohnlev 				hp->ah_pfn = mmu_btop(
1075843e1988Sjohnlev 				    (ulong_t)rp->regspec_addr & MMU_PAGEMASK);
1076843e1988Sjohnlev 			}
1077843e1988Sjohnlev #else
107800d0963fSdilpreet 			hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr &
1079843e1988Sjohnlev 			    MMU_PAGEMASK);
1080843e1988Sjohnlev #endif
108100d0963fSdilpreet 			hp->ah_pnum = mmu_btopr(rp->regspec_size +
108200d0963fSdilpreet 			    (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET);
10837c478bd9Sstevel@tonic-gate 		}
10847c478bd9Sstevel@tonic-gate 
108512f080e7Smrj #ifdef	DDI_MAP_DEBUG
108612f080e7Smrj 		ddi_map_debug(
108712f080e7Smrj 	    "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n",
108812f080e7Smrj 		    rp->regspec_size, *vaddrp);
108912f080e7Smrj #endif	/* DDI_MAP_DEBUG */
109012f080e7Smrj 		return (DDI_SUCCESS);
10917c478bd9Sstevel@tonic-gate 	}
10927c478bd9Sstevel@tonic-gate 
10937c478bd9Sstevel@tonic-gate 	/*
109412f080e7Smrj 	 * Memory space
109512f080e7Smrj 	 */
109612f080e7Smrj 
109712f080e7Smrj 	if (hp != NULL) {
109812f080e7Smrj 		/*
109912f080e7Smrj 		 * hat layer ignores
110012f080e7Smrj 		 * hp->ah_acc.devacc_attr_endian_flags.
110112f080e7Smrj 		 */
110212f080e7Smrj 		switch (hp->ah_acc.devacc_attr_dataorder) {
110312f080e7Smrj 		case DDI_STRICTORDER_ACC:
110412f080e7Smrj 			hat_acc_flags = HAT_STRICTORDER;
110512f080e7Smrj 			break;
110612f080e7Smrj 		case DDI_UNORDERED_OK_ACC:
110712f080e7Smrj 			hat_acc_flags = HAT_UNORDERED_OK;
110812f080e7Smrj 			break;
110912f080e7Smrj 		case DDI_MERGING_OK_ACC:
111012f080e7Smrj 			hat_acc_flags = HAT_MERGING_OK;
111112f080e7Smrj 			break;
111212f080e7Smrj 		case DDI_LOADCACHING_OK_ACC:
111312f080e7Smrj 			hat_acc_flags = HAT_LOADCACHING_OK;
111412f080e7Smrj 			break;
111512f080e7Smrj 		case DDI_STORECACHING_OK_ACC:
111612f080e7Smrj 			hat_acc_flags = HAT_STORECACHING_OK;
111712f080e7Smrj 			break;
111812f080e7Smrj 		}
111912f080e7Smrj 		ap = (ddi_acc_impl_t *)hp->ah_platform_private;
112012f080e7Smrj 		ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR;
112112f080e7Smrj 		impl_acc_hdl_init(hp);
112212f080e7Smrj 		hp->ah_hat_flags = hat_acc_flags;
112312f080e7Smrj 	} else {
112412f080e7Smrj 		hat_acc_flags = HAT_STRICTORDER;
112512f080e7Smrj 	}
112612f080e7Smrj 
1127843e1988Sjohnlev 	rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK);
1128843e1988Sjohnlev #ifdef __xpv
1129843e1988Sjohnlev 	/*
1130843e1988Sjohnlev 	 * If we're dom0, we're using a real device so we need to translate
1131843e1988Sjohnlev 	 * the MA to a PA.
1132843e1988Sjohnlev 	 */
1133843e1988Sjohnlev 	if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1134843e1988Sjohnlev 		pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase)));
1135843e1988Sjohnlev 	} else {
1136843e1988Sjohnlev 		pbase = rbase;
1137843e1988Sjohnlev 	}
1138843e1988Sjohnlev #else
1139843e1988Sjohnlev 	pbase = rbase;
1140843e1988Sjohnlev #endif
1141843e1988Sjohnlev 	pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET;
114212f080e7Smrj 
114312f080e7Smrj 	if (rp->regspec_size == 0) {
114412f080e7Smrj #ifdef  DDI_MAP_DEBUG
114512f080e7Smrj 		ddi_map_debug("rootnex_map_regspec: zero regspec_size\n");
114612f080e7Smrj #endif  /* DDI_MAP_DEBUG */
114712f080e7Smrj 		return (DDI_ME_INVAL);
114812f080e7Smrj 	}
114912f080e7Smrj 
115012f080e7Smrj 	if (mp->map_flags & DDI_MF_DEVICE_MAPPING) {
1151843e1988Sjohnlev 		/* extra cast to make gcc happy */
1152843e1988Sjohnlev 		*vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase));
115312f080e7Smrj 	} else {
115412f080e7Smrj 		npages = mmu_btopr(rp->regspec_size + pgoffset);
115512f080e7Smrj 
115612f080e7Smrj #ifdef	DDI_MAP_DEBUG
1157843e1988Sjohnlev 		ddi_map_debug("rootnex_map_regspec: Mapping %d pages "
1158843e1988Sjohnlev 		    "physical %llx", npages, pbase);
115912f080e7Smrj #endif	/* DDI_MAP_DEBUG */
116012f080e7Smrj 
116112f080e7Smrj 		cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP);
116212f080e7Smrj 		if (cvaddr == NULL)
116312f080e7Smrj 			return (DDI_ME_NORESOURCES);
116412f080e7Smrj 
116512f080e7Smrj 		/*
116612f080e7Smrj 		 * Now map in the pages we've allocated...
116712f080e7Smrj 		 */
1168843e1988Sjohnlev 		hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages),
1169843e1988Sjohnlev 		    mmu_btop(pbase), mp->map_prot | hat_acc_flags,
1170843e1988Sjohnlev 		    HAT_LOAD_LOCK);
117112f080e7Smrj 		*vaddrp = (caddr_t)cvaddr + pgoffset;
117200d0963fSdilpreet 
117300d0963fSdilpreet 		/* save away pfn and npages for FMA */
117400d0963fSdilpreet 		hp = mp->map_handlep;
117500d0963fSdilpreet 		if (hp) {
1176843e1988Sjohnlev 			hp->ah_pfn = mmu_btop(pbase);
117700d0963fSdilpreet 			hp->ah_pnum = npages;
117800d0963fSdilpreet 		}
117912f080e7Smrj 	}
118012f080e7Smrj 
118112f080e7Smrj #ifdef	DDI_MAP_DEBUG
118212f080e7Smrj 	ddi_map_debug("at virtual 0x%x\n", *vaddrp);
118312f080e7Smrj #endif	/* DDI_MAP_DEBUG */
118412f080e7Smrj 	return (DDI_SUCCESS);
118512f080e7Smrj }
118612f080e7Smrj 
118712f080e7Smrj 
118812f080e7Smrj /*
118912f080e7Smrj  * rootnex_unmap_regspec()
11907c478bd9Sstevel@tonic-gate  *
11917c478bd9Sstevel@tonic-gate  */
11927c478bd9Sstevel@tonic-gate static int
119312f080e7Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp)
11947c478bd9Sstevel@tonic-gate {
119512f080e7Smrj 	caddr_t addr = (caddr_t)*vaddrp;
119612f080e7Smrj 	uint_t npages, pgoffset;
119712f080e7Smrj 	struct regspec *rp;
11987c478bd9Sstevel@tonic-gate 
119912f080e7Smrj 	if (mp->map_flags & DDI_MF_DEVICE_MAPPING)
120012f080e7Smrj 		return (0);
12017c478bd9Sstevel@tonic-gate 
120212f080e7Smrj 	rp = mp->map_obj.rp;
12037c478bd9Sstevel@tonic-gate 
120412f080e7Smrj 	if (rp->regspec_size == 0) {
120512f080e7Smrj #ifdef  DDI_MAP_DEBUG
120612f080e7Smrj 		ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n");
120712f080e7Smrj #endif  /* DDI_MAP_DEBUG */
120812f080e7Smrj 		return (DDI_ME_INVAL);
12097c478bd9Sstevel@tonic-gate 	}
12107c478bd9Sstevel@tonic-gate 
12117c478bd9Sstevel@tonic-gate 	/*
121212f080e7Smrj 	 * I/O or memory mapping:
12137c478bd9Sstevel@tonic-gate 	 *
121412f080e7Smrj 	 *	<bustype=0, addr=x, len=x>: memory
121512f080e7Smrj 	 *	<bustype=1, addr=x, len=x>: i/o
121612f080e7Smrj 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
12177c478bd9Sstevel@tonic-gate 	 */
121812f080e7Smrj 	if (rp->regspec_bustype != 0) {
12197c478bd9Sstevel@tonic-gate 		/*
122012f080e7Smrj 		 * This is I/O space, which requires no particular
122112f080e7Smrj 		 * processing on unmap since it isn't mapped in the
122212f080e7Smrj 		 * first place.
12237c478bd9Sstevel@tonic-gate 		 */
12247c478bd9Sstevel@tonic-gate 		return (DDI_SUCCESS);
12257c478bd9Sstevel@tonic-gate 	}
12267c478bd9Sstevel@tonic-gate 
12277c478bd9Sstevel@tonic-gate 	/*
122812f080e7Smrj 	 * Memory space
12297c478bd9Sstevel@tonic-gate 	 */
123012f080e7Smrj 	pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET;
123112f080e7Smrj 	npages = mmu_btopr(rp->regspec_size + pgoffset);
123212f080e7Smrj 	hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK);
123312f080e7Smrj 	device_arena_free(addr - pgoffset, ptob(npages));
12347c478bd9Sstevel@tonic-gate 
12357c478bd9Sstevel@tonic-gate 	/*
123612f080e7Smrj 	 * Destroy the pointer - the mapping has logically gone
12377c478bd9Sstevel@tonic-gate 	 */
123812f080e7Smrj 	*vaddrp = NULL;
12397c478bd9Sstevel@tonic-gate 
12407c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
12417c478bd9Sstevel@tonic-gate }
12427c478bd9Sstevel@tonic-gate 
124312f080e7Smrj 
124412f080e7Smrj /*
124512f080e7Smrj  * rootnex_map_handle()
124612f080e7Smrj  *
124712f080e7Smrj  */
12487c478bd9Sstevel@tonic-gate static int
124912f080e7Smrj rootnex_map_handle(ddi_map_req_t *mp)
12507c478bd9Sstevel@tonic-gate {
1251843e1988Sjohnlev 	rootnex_addr_t rbase;
125212f080e7Smrj 	ddi_acc_hdl_t *hp;
125312f080e7Smrj 	uint_t pgoffset;
125412f080e7Smrj 	struct regspec *rp;
1255843e1988Sjohnlev 	paddr_t pbase;
12567c478bd9Sstevel@tonic-gate 
125712f080e7Smrj 	rp = mp->map_obj.rp;
12587c478bd9Sstevel@tonic-gate 
125912f080e7Smrj #ifdef	DDI_MAP_DEBUG
126012f080e7Smrj 	ddi_map_debug(
126112f080e7Smrj 	    "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n",
126212f080e7Smrj 	    rp->regspec_bustype, rp->regspec_addr,
126312f080e7Smrj 	    rp->regspec_size, mp->map_handlep);
126412f080e7Smrj #endif	/* DDI_MAP_DEBUG */
12657c478bd9Sstevel@tonic-gate 
12667c478bd9Sstevel@tonic-gate 	/*
126712f080e7Smrj 	 * I/O or memory mapping:
126812f080e7Smrj 	 *
126912f080e7Smrj 	 *	<bustype=0, addr=x, len=x>: memory
127012f080e7Smrj 	 *	<bustype=1, addr=x, len=x>: i/o
127112f080e7Smrj 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
12727c478bd9Sstevel@tonic-gate 	 */
127312f080e7Smrj 	if (rp->regspec_bustype != 0) {
127412f080e7Smrj 		/*
127512f080e7Smrj 		 * This refers to I/O space, and we don't support "mapping"
127612f080e7Smrj 		 * I/O space to a user.
127712f080e7Smrj 		 */
12787c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
12797c478bd9Sstevel@tonic-gate 	}
12807c478bd9Sstevel@tonic-gate 
12817c478bd9Sstevel@tonic-gate 	/*
128212f080e7Smrj 	 * Set up the hat_flags for the mapping.
12837c478bd9Sstevel@tonic-gate 	 */
128412f080e7Smrj 	hp = mp->map_handlep;
12857c478bd9Sstevel@tonic-gate 
128612f080e7Smrj 	switch (hp->ah_acc.devacc_attr_endian_flags) {
128712f080e7Smrj 	case DDI_NEVERSWAP_ACC:
128812f080e7Smrj 		hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER;
12897c478bd9Sstevel@tonic-gate 		break;
129012f080e7Smrj 	case DDI_STRUCTURE_LE_ACC:
129112f080e7Smrj 		hp->ah_hat_flags = HAT_STRUCTURE_LE;
12927c478bd9Sstevel@tonic-gate 		break;
129312f080e7Smrj 	case DDI_STRUCTURE_BE_ACC:
12947c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
12957c478bd9Sstevel@tonic-gate 	default:
129612f080e7Smrj 		return (DDI_REGS_ACC_CONFLICT);
12977c478bd9Sstevel@tonic-gate 	}
12987c478bd9Sstevel@tonic-gate 
129912f080e7Smrj 	switch (hp->ah_acc.devacc_attr_dataorder) {
130012f080e7Smrj 	case DDI_STRICTORDER_ACC:
13017c478bd9Sstevel@tonic-gate 		break;
130212f080e7Smrj 	case DDI_UNORDERED_OK_ACC:
130312f080e7Smrj 		hp->ah_hat_flags |= HAT_UNORDERED_OK;
13047c478bd9Sstevel@tonic-gate 		break;
130512f080e7Smrj 	case DDI_MERGING_OK_ACC:
130612f080e7Smrj 		hp->ah_hat_flags |= HAT_MERGING_OK;
13077c478bd9Sstevel@tonic-gate 		break;
130812f080e7Smrj 	case DDI_LOADCACHING_OK_ACC:
130912f080e7Smrj 		hp->ah_hat_flags |= HAT_LOADCACHING_OK;
131012f080e7Smrj 		break;
131112f080e7Smrj 	case DDI_STORECACHING_OK_ACC:
131212f080e7Smrj 		hp->ah_hat_flags |= HAT_STORECACHING_OK;
131312f080e7Smrj 		break;
13147c478bd9Sstevel@tonic-gate 	default:
13157c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
13167c478bd9Sstevel@tonic-gate 	}
13177c478bd9Sstevel@tonic-gate 
1318843e1988Sjohnlev 	rbase = (rootnex_addr_t)rp->regspec_addr &
1319843e1988Sjohnlev 	    (~(rootnex_addr_t)MMU_PAGEOFFSET);
1320843e1988Sjohnlev 	pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET;
13217c478bd9Sstevel@tonic-gate 
132212f080e7Smrj 	if (rp->regspec_size == 0)
132312f080e7Smrj 		return (DDI_ME_INVAL);
13247c478bd9Sstevel@tonic-gate 
1325843e1988Sjohnlev #ifdef __xpv
1326843e1988Sjohnlev 	/*
1327843e1988Sjohnlev 	 * If we're dom0, we're using a real device so we need to translate
1328843e1988Sjohnlev 	 * the MA to a PA.
1329843e1988Sjohnlev 	 */
1330843e1988Sjohnlev 	if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1331843e1988Sjohnlev 		pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) |
1332843e1988Sjohnlev 		    (rbase & MMU_PAGEOFFSET);
1333843e1988Sjohnlev 	} else {
1334843e1988Sjohnlev 		pbase = rbase;
1335843e1988Sjohnlev 	}
1336843e1988Sjohnlev #else
1337843e1988Sjohnlev 	pbase = rbase;
1338843e1988Sjohnlev #endif
1339843e1988Sjohnlev 
1340843e1988Sjohnlev 	hp->ah_pfn = mmu_btop(pbase);
134112f080e7Smrj 	hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset);
13427c478bd9Sstevel@tonic-gate 
13437c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
13447c478bd9Sstevel@tonic-gate }
13457c478bd9Sstevel@tonic-gate 
134612f080e7Smrj 
134712f080e7Smrj 
13487c478bd9Sstevel@tonic-gate /*
134912f080e7Smrj  * ************************
135012f080e7Smrj  *  interrupt related code
135112f080e7Smrj  * ************************
13527c478bd9Sstevel@tonic-gate  */
13537c478bd9Sstevel@tonic-gate 
13547c478bd9Sstevel@tonic-gate /*
135512f080e7Smrj  * rootnex_intr_ops()
13567c478bd9Sstevel@tonic-gate  *	bus_intr_op() function for interrupt support
13577c478bd9Sstevel@tonic-gate  */
13587c478bd9Sstevel@tonic-gate /* ARGSUSED */
13597c478bd9Sstevel@tonic-gate static int
13607c478bd9Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op,
13617c478bd9Sstevel@tonic-gate     ddi_intr_handle_impl_t *hdlp, void *result)
13627c478bd9Sstevel@tonic-gate {
13637c478bd9Sstevel@tonic-gate 	struct intrspec			*ispec;
13647c478bd9Sstevel@tonic-gate 	struct ddi_parent_private_data	*pdp;
13657c478bd9Sstevel@tonic-gate 
13667c478bd9Sstevel@tonic-gate 	DDI_INTR_NEXDBG((CE_CONT,
13677c478bd9Sstevel@tonic-gate 	    "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n",
13687c478bd9Sstevel@tonic-gate 	    (void *)pdip, (void *)rdip, intr_op, (void *)hdlp));
13697c478bd9Sstevel@tonic-gate 
13707c478bd9Sstevel@tonic-gate 	/* Process the interrupt operation */
13717c478bd9Sstevel@tonic-gate 	switch (intr_op) {
13727c478bd9Sstevel@tonic-gate 	case DDI_INTROP_GETCAP:
13737c478bd9Sstevel@tonic-gate 		/* First check with pcplusmp */
13747c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
13757c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13767c478bd9Sstevel@tonic-gate 
13777c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) {
13787c478bd9Sstevel@tonic-gate 			*(int *)result = 0;
13797c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13807c478bd9Sstevel@tonic-gate 		}
13817c478bd9Sstevel@tonic-gate 		break;
13827c478bd9Sstevel@tonic-gate 	case DDI_INTROP_SETCAP:
13837c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
13847c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13857c478bd9Sstevel@tonic-gate 
13867c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result))
13877c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13887c478bd9Sstevel@tonic-gate 		break;
13897c478bd9Sstevel@tonic-gate 	case DDI_INTROP_ALLOC:
13907c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
13917c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13927c478bd9Sstevel@tonic-gate 		hdlp->ih_pri = ispec->intrspec_pri;
13937c478bd9Sstevel@tonic-gate 		*(int *)result = hdlp->ih_scratch1;
13947c478bd9Sstevel@tonic-gate 		break;
13957c478bd9Sstevel@tonic-gate 	case DDI_INTROP_FREE:
13967c478bd9Sstevel@tonic-gate 		pdp = ddi_get_parent_data(rdip);
13977c478bd9Sstevel@tonic-gate 		/*
13987c478bd9Sstevel@tonic-gate 		 * Special case for 'pcic' driver' only.
13997c478bd9Sstevel@tonic-gate 		 * If an intrspec was created for it, clean it up here
14007c478bd9Sstevel@tonic-gate 		 * See detailed comments on this in the function
14017c478bd9Sstevel@tonic-gate 		 * rootnex_get_ispec().
14027c478bd9Sstevel@tonic-gate 		 */
14037c478bd9Sstevel@tonic-gate 		if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) {
14047c478bd9Sstevel@tonic-gate 			kmem_free(pdp->par_intr, sizeof (struct intrspec) *
14057c478bd9Sstevel@tonic-gate 			    pdp->par_nintr);
14067c478bd9Sstevel@tonic-gate 			/*
14077c478bd9Sstevel@tonic-gate 			 * Set it to zero; so that
14087c478bd9Sstevel@tonic-gate 			 * DDI framework doesn't free it again
14097c478bd9Sstevel@tonic-gate 			 */
14107c478bd9Sstevel@tonic-gate 			pdp->par_intr = NULL;
14117c478bd9Sstevel@tonic-gate 			pdp->par_nintr = 0;
14127c478bd9Sstevel@tonic-gate 		}
14137c478bd9Sstevel@tonic-gate 		break;
14147c478bd9Sstevel@tonic-gate 	case DDI_INTROP_GETPRI:
14157c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14167c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14177c478bd9Sstevel@tonic-gate 		*(int *)result = ispec->intrspec_pri;
14187c478bd9Sstevel@tonic-gate 		break;
14197c478bd9Sstevel@tonic-gate 	case DDI_INTROP_SETPRI:
14207c478bd9Sstevel@tonic-gate 		/* Validate the interrupt priority passed to us */
14217c478bd9Sstevel@tonic-gate 		if (*(int *)result > LOCK_LEVEL)
14227c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14237c478bd9Sstevel@tonic-gate 
14247c478bd9Sstevel@tonic-gate 		/* Ensure that PSM is all initialized and ispec is ok */
14257c478bd9Sstevel@tonic-gate 		if ((psm_intr_ops == NULL) ||
14267c478bd9Sstevel@tonic-gate 		    ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL))
14277c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14287c478bd9Sstevel@tonic-gate 
14297c478bd9Sstevel@tonic-gate 		/* Change the priority */
14307c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) ==
14317c478bd9Sstevel@tonic-gate 		    PSM_FAILURE)
14327c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14337c478bd9Sstevel@tonic-gate 
14347c478bd9Sstevel@tonic-gate 		/* update the ispec with the new priority */
14357c478bd9Sstevel@tonic-gate 		ispec->intrspec_pri =  *(int *)result;
14367c478bd9Sstevel@tonic-gate 		break;
14377c478bd9Sstevel@tonic-gate 	case DDI_INTROP_ADDISR:
14387c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14397c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14407c478bd9Sstevel@tonic-gate 		ispec->intrspec_func = hdlp->ih_cb_func;
14417c478bd9Sstevel@tonic-gate 		break;
14427c478bd9Sstevel@tonic-gate 	case DDI_INTROP_REMISR:
14437c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14447c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14457c478bd9Sstevel@tonic-gate 		ispec->intrspec_func = (uint_t (*)()) 0;
14467c478bd9Sstevel@tonic-gate 		break;
14477c478bd9Sstevel@tonic-gate 	case DDI_INTROP_ENABLE:
14487c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14497c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14507c478bd9Sstevel@tonic-gate 
14517c478bd9Sstevel@tonic-gate 		/* Call psmi to translate irq with the dip */
14527c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14537c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14547c478bd9Sstevel@tonic-gate 
14557a364d25Sschwartz 		((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
145686a9c507SGuoli Shu 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR,
145786a9c507SGuoli Shu 		    (int *)&hdlp->ih_vector) == PSM_FAILURE)
145886a9c507SGuoli Shu 			return (DDI_FAILURE);
14597c478bd9Sstevel@tonic-gate 
14607c478bd9Sstevel@tonic-gate 		/* Add the interrupt handler */
14617c478bd9Sstevel@tonic-gate 		if (!add_avintr((void *)hdlp, ispec->intrspec_pri,
14627c478bd9Sstevel@tonic-gate 		    hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector,
14637a364d25Sschwartz 		    hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip))
14647c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14657c478bd9Sstevel@tonic-gate 		break;
14667c478bd9Sstevel@tonic-gate 	case DDI_INTROP_DISABLE:
14677c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14687c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14697c478bd9Sstevel@tonic-gate 
14707c478bd9Sstevel@tonic-gate 		/* Call psm_ops() to translate irq with the dip */
14717c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14727c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14737c478bd9Sstevel@tonic-gate 
14747a364d25Sschwartz 		((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
14757c478bd9Sstevel@tonic-gate 		(void) (*psm_intr_ops)(rdip, hdlp,
14767c478bd9Sstevel@tonic-gate 		    PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector);
14777c478bd9Sstevel@tonic-gate 
14787c478bd9Sstevel@tonic-gate 		/* Remove the interrupt handler */
14797c478bd9Sstevel@tonic-gate 		rem_avintr((void *)hdlp, ispec->intrspec_pri,
14807c478bd9Sstevel@tonic-gate 		    hdlp->ih_cb_func, hdlp->ih_vector);
14817c478bd9Sstevel@tonic-gate 		break;
14827c478bd9Sstevel@tonic-gate 	case DDI_INTROP_SETMASK:
14837c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14847c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14857c478bd9Sstevel@tonic-gate 
14867c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL))
14877c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14887c478bd9Sstevel@tonic-gate 		break;
14897c478bd9Sstevel@tonic-gate 	case DDI_INTROP_CLRMASK:
14907c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14917c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14927c478bd9Sstevel@tonic-gate 
14937c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL))
14947c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14957c478bd9Sstevel@tonic-gate 		break;
14967c478bd9Sstevel@tonic-gate 	case DDI_INTROP_GETPENDING:
14977c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14987c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14997c478bd9Sstevel@tonic-gate 
15007c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING,
15017c478bd9Sstevel@tonic-gate 		    result)) {
15027c478bd9Sstevel@tonic-gate 			*(int *)result = 0;
15037c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
15047c478bd9Sstevel@tonic-gate 		}
15057c478bd9Sstevel@tonic-gate 		break;
1506a54f81fbSanish 	case DDI_INTROP_NAVAIL:
15077c478bd9Sstevel@tonic-gate 	case DDI_INTROP_NINTRS:
1508a54f81fbSanish 		*(int *)result = i_ddi_get_intx_nintrs(rdip);
1509a54f81fbSanish 		if (*(int *)result == 0) {
15107c478bd9Sstevel@tonic-gate 			/*
15117c478bd9Sstevel@tonic-gate 			 * Special case for 'pcic' driver' only. This driver
15127c478bd9Sstevel@tonic-gate 			 * driver is a child of 'isa' and 'rootnex' drivers.
15137c478bd9Sstevel@tonic-gate 			 *
15147c478bd9Sstevel@tonic-gate 			 * See detailed comments on this in the function
15157c478bd9Sstevel@tonic-gate 			 * rootnex_get_ispec().
15167c478bd9Sstevel@tonic-gate 			 *
15177c478bd9Sstevel@tonic-gate 			 * Children of 'pcic' send 'NINITR' request all the
15187c478bd9Sstevel@tonic-gate 			 * way to rootnex driver. But, the 'pdp->par_nintr'
15197c478bd9Sstevel@tonic-gate 			 * field may not initialized. So, we fake it here
15207c478bd9Sstevel@tonic-gate 			 * to return 1 (a la what PCMCIA nexus does).
15217c478bd9Sstevel@tonic-gate 			 */
15227c478bd9Sstevel@tonic-gate 			if (strcmp(ddi_get_name(rdip), "pcic") == 0)
15237c478bd9Sstevel@tonic-gate 				*(int *)result = 1;
1524a54f81fbSanish 			else
1525a54f81fbSanish 				return (DDI_FAILURE);
15267c478bd9Sstevel@tonic-gate 		}
15277c478bd9Sstevel@tonic-gate 		break;
15287c478bd9Sstevel@tonic-gate 	case DDI_INTROP_SUPPORTED_TYPES:
1529a54f81fbSanish 		*(int *)result = DDI_INTR_TYPE_FIXED;	/* Always ... */
15307c478bd9Sstevel@tonic-gate 		break;
15317c478bd9Sstevel@tonic-gate 	default:
15327c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
15337c478bd9Sstevel@tonic-gate 	}
15347c478bd9Sstevel@tonic-gate 
15357c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
15367c478bd9Sstevel@tonic-gate }
15377c478bd9Sstevel@tonic-gate 
15387c478bd9Sstevel@tonic-gate 
15397c478bd9Sstevel@tonic-gate /*
154012f080e7Smrj  * rootnex_get_ispec()
154112f080e7Smrj  *	convert an interrupt number to an interrupt specification.
154212f080e7Smrj  *	The interrupt number determines which interrupt spec will be
154312f080e7Smrj  *	returned if more than one exists.
154412f080e7Smrj  *
154512f080e7Smrj  *	Look into the parent private data area of the 'rdip' to find out
154612f080e7Smrj  *	the interrupt specification.  First check to make sure there is
154712f080e7Smrj  *	one that matchs "inumber" and then return a pointer to it.
154812f080e7Smrj  *
154912f080e7Smrj  *	Return NULL if one could not be found.
155012f080e7Smrj  *
155112f080e7Smrj  *	NOTE: This is needed for rootnex_intr_ops()
15527c478bd9Sstevel@tonic-gate  */
155312f080e7Smrj static struct intrspec *
155412f080e7Smrj rootnex_get_ispec(dev_info_t *rdip, int inum)
15557c478bd9Sstevel@tonic-gate {
155612f080e7Smrj 	struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip);
15577c478bd9Sstevel@tonic-gate 
15587c478bd9Sstevel@tonic-gate 	/*
155912f080e7Smrj 	 * Special case handling for drivers that provide their own
156012f080e7Smrj 	 * intrspec structures instead of relying on the DDI framework.
156112f080e7Smrj 	 *
156212f080e7Smrj 	 * A broken hardware driver in ON could potentially provide its
156312f080e7Smrj 	 * own intrspec structure, instead of relying on the hardware.
156412f080e7Smrj 	 * If these drivers are children of 'rootnex' then we need to
156512f080e7Smrj 	 * continue to provide backward compatibility to them here.
156612f080e7Smrj 	 *
156712f080e7Smrj 	 * Following check is a special case for 'pcic' driver which
156812f080e7Smrj 	 * was found to have broken hardwre andby provides its own intrspec.
156912f080e7Smrj 	 *
157012f080e7Smrj 	 * Verbatim comments from this driver are shown here:
157112f080e7Smrj 	 * "Don't use the ddi_add_intr since we don't have a
157212f080e7Smrj 	 * default intrspec in all cases."
157312f080e7Smrj 	 *
157412f080e7Smrj 	 * Since an 'ispec' may not be always created for it,
157512f080e7Smrj 	 * check for that and create one if so.
157612f080e7Smrj 	 *
157712f080e7Smrj 	 * NOTE: Currently 'pcic' is the only driver found to do this.
15787c478bd9Sstevel@tonic-gate 	 */
157912f080e7Smrj 	if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) {
158012f080e7Smrj 		pdp->par_nintr = 1;
158112f080e7Smrj 		pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) *
158212f080e7Smrj 		    pdp->par_nintr, KM_SLEEP);
158312f080e7Smrj 	}
158412f080e7Smrj 
158512f080e7Smrj 	/* Validate the interrupt number */
158612f080e7Smrj 	if (inum >= pdp->par_nintr)
158712f080e7Smrj 		return (NULL);
158812f080e7Smrj 
158912f080e7Smrj 	/* Get the interrupt structure pointer and return that */
159012f080e7Smrj 	return ((struct intrspec *)&pdp->par_intr[inum]);
159112f080e7Smrj }
159212f080e7Smrj 
159312f080e7Smrj 
159412f080e7Smrj /*
159512f080e7Smrj  * ******************
159612f080e7Smrj  *  dma related code
159712f080e7Smrj  * ******************
159812f080e7Smrj  */
159912f080e7Smrj 
160012f080e7Smrj /*ARGSUSED*/
160112f080e7Smrj static int
160220906b23SVikram Hegde rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip,
160320906b23SVikram Hegde     ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
160420906b23SVikram Hegde     ddi_dma_handle_t *handlep)
160512f080e7Smrj {
160612f080e7Smrj 	uint64_t maxsegmentsize_ll;
160712f080e7Smrj 	uint_t maxsegmentsize;
160812f080e7Smrj 	ddi_dma_impl_t *hp;
160912f080e7Smrj 	rootnex_dma_t *dma;
161012f080e7Smrj 	uint64_t count_max;
161112f080e7Smrj 	uint64_t seg;
161212f080e7Smrj 	int kmflag;
161312f080e7Smrj 	int e;
161412f080e7Smrj 
161512f080e7Smrj 
161612f080e7Smrj 	/* convert our sleep flags */
161712f080e7Smrj 	if (waitfp == DDI_DMA_SLEEP) {
161812f080e7Smrj 		kmflag = KM_SLEEP;
161912f080e7Smrj 	} else {
162012f080e7Smrj 		kmflag = KM_NOSLEEP;
162112f080e7Smrj 	}
162212f080e7Smrj 
162312f080e7Smrj 	/*
162412f080e7Smrj 	 * We try to do only one memory allocation here. We'll do a little
162512f080e7Smrj 	 * pointer manipulation later. If the bind ends up taking more than
162612f080e7Smrj 	 * our prealloc's space, we'll have to allocate more memory in the
162712f080e7Smrj 	 * bind operation. Not great, but much better than before and the
162812f080e7Smrj 	 * best we can do with the current bind interfaces.
162912f080e7Smrj 	 */
163012f080e7Smrj 	hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag);
163112f080e7Smrj 	if (hp == NULL) {
163212f080e7Smrj 		if (waitfp != DDI_DMA_DONTWAIT) {
163312f080e7Smrj 			ddi_set_callback(waitfp, arg,
163412f080e7Smrj 			    &rootnex_state->r_dvma_call_list_id);
163512f080e7Smrj 		}
163612f080e7Smrj 		return (DDI_DMA_NORESOURCES);
163712f080e7Smrj 	}
163812f080e7Smrj 
163912f080e7Smrj 	/* Do our pointer manipulation now, align the structures */
164012f080e7Smrj 	hp->dmai_private = (void *)(((uintptr_t)hp +
164112f080e7Smrj 	    (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7);
164212f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
164312f080e7Smrj 	dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma +
164412f080e7Smrj 	    sizeof (rootnex_dma_t) + 0x7) & ~0x7);
164512f080e7Smrj 
164612f080e7Smrj 	/* setup the handle */
164712f080e7Smrj 	rootnex_clean_dmahdl(hp);
1648567c0b92SStephen Hanson 	hp->dmai_error.err_fep = NULL;
1649567c0b92SStephen Hanson 	hp->dmai_error.err_cf = NULL;
165012f080e7Smrj 	dma->dp_dip = rdip;
165112f080e7Smrj 	dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo;
165212f080e7Smrj 	dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi;
165312f080e7Smrj 	hp->dmai_minxfer = attr->dma_attr_minxfer;
165412f080e7Smrj 	hp->dmai_burstsizes = attr->dma_attr_burstsizes;
165512f080e7Smrj 	hp->dmai_rdip = rdip;
165612f080e7Smrj 	hp->dmai_attr = *attr;
165712f080e7Smrj 
165812f080e7Smrj 	/* we don't need to worry about the SPL since we do a tryenter */
165912f080e7Smrj 	mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL);
166012f080e7Smrj 
166112f080e7Smrj 	/*
166212f080e7Smrj 	 * Figure out our maximum segment size. If the segment size is greater
166312f080e7Smrj 	 * than 4G, we will limit it to (4G - 1) since the max size of a dma
166412f080e7Smrj 	 * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and
166512f080e7Smrj 	 * dma_attr_count_max are size-1 type values.
166612f080e7Smrj 	 *
166712f080e7Smrj 	 * Maximum segment size is the largest physically contiguous chunk of
166812f080e7Smrj 	 * memory that we can return from a bind (i.e. the maximum size of a
166912f080e7Smrj 	 * single cookie).
167012f080e7Smrj 	 */
167112f080e7Smrj 
167212f080e7Smrj 	/* handle the rollover cases */
167312f080e7Smrj 	seg = attr->dma_attr_seg + 1;
167412f080e7Smrj 	if (seg < attr->dma_attr_seg) {
167512f080e7Smrj 		seg = attr->dma_attr_seg;
167612f080e7Smrj 	}
167712f080e7Smrj 	count_max = attr->dma_attr_count_max + 1;
167812f080e7Smrj 	if (count_max < attr->dma_attr_count_max) {
167912f080e7Smrj 		count_max = attr->dma_attr_count_max;
168012f080e7Smrj 	}
168112f080e7Smrj 
168212f080e7Smrj 	/*
168312f080e7Smrj 	 * granularity may or may not be a power of two. If it isn't, we can't
168412f080e7Smrj 	 * use a simple mask.
168512f080e7Smrj 	 */
168612f080e7Smrj 	if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) {
168712f080e7Smrj 		dma->dp_granularity_power_2 = B_FALSE;
168812f080e7Smrj 	} else {
168912f080e7Smrj 		dma->dp_granularity_power_2 = B_TRUE;
169012f080e7Smrj 	}
169112f080e7Smrj 
169212f080e7Smrj 	/*
169312f080e7Smrj 	 * maxxfer should be a whole multiple of granularity. If we're going to
169412f080e7Smrj 	 * break up a window because we're greater than maxxfer, we might as
169512f080e7Smrj 	 * well make sure it's maxxfer is a whole multiple so we don't have to
169612f080e7Smrj 	 * worry about triming the window later on for this case.
169712f080e7Smrj 	 */
169812f080e7Smrj 	if (attr->dma_attr_granular > 1) {
169912f080e7Smrj 		if (dma->dp_granularity_power_2) {
170012f080e7Smrj 			dma->dp_maxxfer = attr->dma_attr_maxxfer -
170112f080e7Smrj 			    (attr->dma_attr_maxxfer &
170212f080e7Smrj 			    (attr->dma_attr_granular - 1));
170312f080e7Smrj 		} else {
170412f080e7Smrj 			dma->dp_maxxfer = attr->dma_attr_maxxfer -
170512f080e7Smrj 			    (attr->dma_attr_maxxfer % attr->dma_attr_granular);
170612f080e7Smrj 		}
170712f080e7Smrj 	} else {
170812f080e7Smrj 		dma->dp_maxxfer = attr->dma_attr_maxxfer;
170912f080e7Smrj 	}
171012f080e7Smrj 
171112f080e7Smrj 	maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer);
171212f080e7Smrj 	maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max);
171312f080e7Smrj 	if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) {
171412f080e7Smrj 		maxsegmentsize = 0xFFFFFFFF;
171512f080e7Smrj 	} else {
171612f080e7Smrj 		maxsegmentsize = maxsegmentsize_ll;
171712f080e7Smrj 	}
171812f080e7Smrj 	dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize;
171912f080e7Smrj 	dma->dp_sglinfo.si_segmask = attr->dma_attr_seg;
172007c6692fSMark Johnson 	dma->dp_sglinfo.si_flags = attr->dma_attr_flags;
172112f080e7Smrj 
172212f080e7Smrj 	/* check the ddi_dma_attr arg to make sure it makes a little sense */
172312f080e7Smrj 	if (rootnex_alloc_check_parms) {
172412f080e7Smrj 		e = rootnex_valid_alloc_parms(attr, maxsegmentsize);
172512f080e7Smrj 		if (e != DDI_SUCCESS) {
172612f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]);
172712f080e7Smrj 			(void) rootnex_dma_freehdl(dip, rdip,
172812f080e7Smrj 			    (ddi_dma_handle_t)hp);
172912f080e7Smrj 			return (e);
173012f080e7Smrj 		}
173112f080e7Smrj 	}
173212f080e7Smrj 
173312f080e7Smrj 	*handlep = (ddi_dma_handle_t)hp;
173412f080e7Smrj 
17350b7ba611SMark Johnson 	ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
17360b7ba611SMark Johnson 	ROOTNEX_DPROBE1(rootnex__alloc__handle, uint64_t,
173712f080e7Smrj 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
173812f080e7Smrj 
173912f080e7Smrj 	return (DDI_SUCCESS);
174012f080e7Smrj }
174112f080e7Smrj 
174212f080e7Smrj 
174312f080e7Smrj /*
174420906b23SVikram Hegde  * rootnex_dma_allochdl()
174520906b23SVikram Hegde  *    called from ddi_dma_alloc_handle().
174612f080e7Smrj  */
174720906b23SVikram Hegde static int
174820906b23SVikram Hegde rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr,
174920906b23SVikram Hegde     int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep)
175020906b23SVikram Hegde {
1751567c0b92SStephen Hanson 	int retval;
17523a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
175320906b23SVikram Hegde 	uint_t error = ENOTSUP;
175420906b23SVikram Hegde 
175520906b23SVikram Hegde 	retval = iommulib_nex_open(rdip, &error);
175620906b23SVikram Hegde 
175720906b23SVikram Hegde 	if (retval != DDI_SUCCESS && error == ENOTSUP) {
175820906b23SVikram Hegde 		/* No IOMMU */
175920906b23SVikram Hegde 		return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg,
176020906b23SVikram Hegde 		    handlep));
176120906b23SVikram Hegde 	} else if (retval != DDI_SUCCESS) {
176220906b23SVikram Hegde 		return (DDI_FAILURE);
176320906b23SVikram Hegde 	}
176420906b23SVikram Hegde 
1765b51bbbf5SVikram Hegde 	ASSERT(IOMMU_USED(rdip));
176620906b23SVikram Hegde 
176720906b23SVikram Hegde 	/* has an IOMMU */
1768567c0b92SStephen Hanson 	retval = iommulib_nexdma_allochdl(dip, rdip, attr,
1769567c0b92SStephen Hanson 	    waitfp, arg, handlep);
177020906b23SVikram Hegde #else
1771567c0b92SStephen Hanson 	retval = rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg,
1772567c0b92SStephen Hanson 	    handlep);
177320906b23SVikram Hegde #endif
1774567c0b92SStephen Hanson 	if (retval == DDI_SUCCESS)
1775567c0b92SStephen Hanson 		ndi_fmc_insert(rdip, DMA_HANDLE, *handlep, NULL);
1776567c0b92SStephen Hanson 	return (retval);
177720906b23SVikram Hegde }
177820906b23SVikram Hegde 
177912f080e7Smrj /*ARGSUSED*/
178012f080e7Smrj static int
178120906b23SVikram Hegde rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip,
178220906b23SVikram Hegde     ddi_dma_handle_t handle)
178312f080e7Smrj {
178412f080e7Smrj 	ddi_dma_impl_t *hp;
178512f080e7Smrj 	rootnex_dma_t *dma;
178612f080e7Smrj 
178712f080e7Smrj 
178812f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
178912f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
179012f080e7Smrj 
179112f080e7Smrj 	/* unbind should have been called first */
179212f080e7Smrj 	ASSERT(!dma->dp_inuse);
179312f080e7Smrj 
179412f080e7Smrj 	mutex_destroy(&dma->dp_mutex);
179512f080e7Smrj 	kmem_cache_free(rootnex_state->r_dmahdl_cache, hp);
179612f080e7Smrj 
17970b7ba611SMark Johnson 	ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
17980b7ba611SMark Johnson 	ROOTNEX_DPROBE1(rootnex__free__handle, uint64_t,
179912f080e7Smrj 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
180012f080e7Smrj 
180112f080e7Smrj 	if (rootnex_state->r_dvma_call_list_id)
180212f080e7Smrj 		ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
180312f080e7Smrj 
180412f080e7Smrj 	return (DDI_SUCCESS);
180512f080e7Smrj }
180612f080e7Smrj 
180712f080e7Smrj /*
180820906b23SVikram Hegde  * rootnex_dma_freehdl()
180920906b23SVikram Hegde  *    called from ddi_dma_free_handle().
181012f080e7Smrj  */
181120906b23SVikram Hegde static int
181220906b23SVikram Hegde rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle)
181320906b23SVikram Hegde {
1814567c0b92SStephen Hanson 	ndi_fmc_remove(rdip, DMA_HANDLE, handle);
18153a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
1816b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
181720906b23SVikram Hegde 		return (iommulib_nexdma_freehdl(dip, rdip, handle));
181820906b23SVikram Hegde 	}
181920906b23SVikram Hegde #endif
182020906b23SVikram Hegde 	return (rootnex_coredma_freehdl(dip, rdip, handle));
182120906b23SVikram Hegde }
182220906b23SVikram Hegde 
182312f080e7Smrj /*ARGSUSED*/
182412f080e7Smrj static int
182520906b23SVikram Hegde rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
182620906b23SVikram Hegde     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
182720906b23SVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t *ccountp)
182812f080e7Smrj {
182912f080e7Smrj 	rootnex_sglinfo_t *sinfo;
183012f080e7Smrj 	ddi_dma_attr_t *attr;
183112f080e7Smrj 	ddi_dma_impl_t *hp;
183212f080e7Smrj 	rootnex_dma_t *dma;
183312f080e7Smrj 	int kmflag;
183412f080e7Smrj 	int e;
183512f080e7Smrj 
183612f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
183712f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
183812f080e7Smrj 	sinfo = &dma->dp_sglinfo;
183912f080e7Smrj 	attr = &hp->dmai_attr;
184012f080e7Smrj 
184194f1124eSVikram Hegde 	if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
184294f1124eSVikram Hegde 		dma->dp_sleep_flags = KM_SLEEP;
184394f1124eSVikram Hegde 	} else {
184494f1124eSVikram Hegde 		dma->dp_sleep_flags = KM_NOSLEEP;
184594f1124eSVikram Hegde 	}
184694f1124eSVikram Hegde 
184712f080e7Smrj 	hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS;
184812f080e7Smrj 
184912f080e7Smrj 	/*
185012f080e7Smrj 	 * This is useful for debugging a driver. Not as useful in a production
185112f080e7Smrj 	 * system. The only time this will fail is if you have a driver bug.
185212f080e7Smrj 	 */
185312f080e7Smrj 	if (rootnex_bind_check_inuse) {
185412f080e7Smrj 		/*
185512f080e7Smrj 		 * No one else should ever have this lock unless someone else
185612f080e7Smrj 		 * is trying to use this handle. So contention on the lock
185712f080e7Smrj 		 * is the same as inuse being set.
185812f080e7Smrj 		 */
185912f080e7Smrj 		e = mutex_tryenter(&dma->dp_mutex);
186012f080e7Smrj 		if (e == 0) {
186112f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
186212f080e7Smrj 			return (DDI_DMA_INUSE);
186312f080e7Smrj 		}
186412f080e7Smrj 		if (dma->dp_inuse) {
186512f080e7Smrj 			mutex_exit(&dma->dp_mutex);
186612f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
186712f080e7Smrj 			return (DDI_DMA_INUSE);
186812f080e7Smrj 		}
186912f080e7Smrj 		dma->dp_inuse = B_TRUE;
187012f080e7Smrj 		mutex_exit(&dma->dp_mutex);
187112f080e7Smrj 	}
187212f080e7Smrj 
187312f080e7Smrj 	/* check the ddi_dma_attr arg to make sure it makes a little sense */
187412f080e7Smrj 	if (rootnex_bind_check_parms) {
187512f080e7Smrj 		e = rootnex_valid_bind_parms(dmareq, attr);
187612f080e7Smrj 		if (e != DDI_SUCCESS) {
187712f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
187812f080e7Smrj 			rootnex_clean_dmahdl(hp);
187912f080e7Smrj 			return (e);
188012f080e7Smrj 		}
188112f080e7Smrj 	}
188212f080e7Smrj 
188312f080e7Smrj 	/* save away the original bind info */
188412f080e7Smrj 	dma->dp_dma = dmareq->dmar_object;
188512f080e7Smrj 
18863a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
18873a634bfcSVikram Hegde 	e = immu_map_sgl(hp, dmareq, rootnex_prealloc_cookies, rdip);
188886c1f4dcSVikram Hegde 	switch (e) {
18893a634bfcSVikram Hegde 	case DDI_DMA_MAPPED:
18903a634bfcSVikram Hegde 		goto out;
18913a634bfcSVikram Hegde 	case DDI_DMA_USE_PHYSICAL:
18923a634bfcSVikram Hegde 		break;
18933a634bfcSVikram Hegde 	case DDI_DMA_PARTIAL:
18943a634bfcSVikram Hegde 		ddi_err(DER_PANIC, rdip, "Partial DVMA map");
18953a634bfcSVikram Hegde 		e = DDI_DMA_NORESOURCES;
18963a634bfcSVikram Hegde 		/*FALLTHROUGH*/
189786c1f4dcSVikram Hegde 	default:
18983a634bfcSVikram Hegde 		ddi_err(DER_MODE, rdip, "DVMA map failed");
18993a634bfcSVikram Hegde 		ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
190086c1f4dcSVikram Hegde 		rootnex_clean_dmahdl(hp);
19013a634bfcSVikram Hegde 		return (e);
190286c1f4dcSVikram Hegde 	}
190320906b23SVikram Hegde #endif
190486c1f4dcSVikram Hegde 
190512f080e7Smrj 	/*
190612f080e7Smrj 	 * Figure out a rough estimate of what maximum number of pages this
190712f080e7Smrj 	 * buffer could use (a high estimate of course).
190812f080e7Smrj 	 */
190912f080e7Smrj 	sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1;
191012f080e7Smrj 
191112f080e7Smrj 	/*
191212f080e7Smrj 	 * We'll use the pre-allocated cookies for any bind that will *always*
191312f080e7Smrj 	 * fit (more important to be consistent, we don't want to create
191412f080e7Smrj 	 * additional degenerate cases).
191512f080e7Smrj 	 */
191612f080e7Smrj 	if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) {
191712f080e7Smrj 		dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer;
191812f080e7Smrj 		dma->dp_need_to_free_cookie = B_FALSE;
191912f080e7Smrj 		DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip,
192012f080e7Smrj 		    uint_t, sinfo->si_max_pages);
192112f080e7Smrj 
192212f080e7Smrj 	/*
192312f080e7Smrj 	 * For anything larger than that, we'll go ahead and allocate the
192412f080e7Smrj 	 * maximum number of pages we expect to see. Hopefuly, we won't be
192512f080e7Smrj 	 * seeing this path in the fast path for high performance devices very
192612f080e7Smrj 	 * frequently.
192712f080e7Smrj 	 *
192812f080e7Smrj 	 * a ddi bind interface that allowed the driver to provide storage to
192912f080e7Smrj 	 * the bind interface would speed this case up.
193012f080e7Smrj 	 */
193112f080e7Smrj 	} else {
193212f080e7Smrj 		/* convert the sleep flags */
193312f080e7Smrj 		if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
193412f080e7Smrj 			kmflag =  KM_SLEEP;
193512f080e7Smrj 		} else {
193612f080e7Smrj 			kmflag =  KM_NOSLEEP;
193712f080e7Smrj 		}
193812f080e7Smrj 
193912f080e7Smrj 		/*
194012f080e7Smrj 		 * Save away how much memory we allocated. If we're doing a
194112f080e7Smrj 		 * nosleep, the alloc could fail...
194212f080e7Smrj 		 */
194312f080e7Smrj 		dma->dp_cookie_size = sinfo->si_max_pages *
194412f080e7Smrj 		    sizeof (ddi_dma_cookie_t);
194512f080e7Smrj 		dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag);
194612f080e7Smrj 		if (dma->dp_cookies == NULL) {
194712f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
194812f080e7Smrj 			rootnex_clean_dmahdl(hp);
194912f080e7Smrj 			return (DDI_DMA_NORESOURCES);
195012f080e7Smrj 		}
195112f080e7Smrj 		dma->dp_need_to_free_cookie = B_TRUE;
195212f080e7Smrj 		DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t,
195312f080e7Smrj 		    sinfo->si_max_pages);
195412f080e7Smrj 	}
195512f080e7Smrj 	hp->dmai_cookie = dma->dp_cookies;
195612f080e7Smrj 
195712f080e7Smrj 	/*
195812f080e7Smrj 	 * Get the real sgl. rootnex_get_sgl will fill in cookie array while
19593a634bfcSVikram Hegde 	 * looking at the constraints in the dma structure. It will then put
19603a634bfcSVikram Hegde 	 * some additional state about the sgl in the dma struct (i.e. is
19613a634bfcSVikram Hegde 	 * the sgl clean, or do we need to do some munging; how many pages
19623a634bfcSVikram Hegde 	 * need to be copied, etc.)
196312f080e7Smrj 	 */
196412f080e7Smrj 	rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies,
196512f080e7Smrj 	    &dma->dp_sglinfo);
196612f080e7Smrj 
19673a634bfcSVikram Hegde out:
196886c1f4dcSVikram Hegde 	ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages);
196912f080e7Smrj 	/* if we don't need a copy buffer, we don't need to sync */
197012f080e7Smrj 	if (sinfo->si_copybuf_req == 0) {
197112f080e7Smrj 		hp->dmai_rflags |= DMP_NOSYNC;
197212f080e7Smrj 	}
197312f080e7Smrj 
197412f080e7Smrj 	/*
197512f080e7Smrj 	 * if we don't need the copybuf and we don't need to do a partial,  we
197612f080e7Smrj 	 * hit the fast path. All the high performance devices should be trying
197712f080e7Smrj 	 * to hit this path. To hit this path, a device should be able to reach
197812f080e7Smrj 	 * all of memory, shouldn't try to bind more than it can transfer, and
197912f080e7Smrj 	 * the buffer shouldn't require more cookies than the driver/device can
198012f080e7Smrj 	 * handle [sgllen]).
198112f080e7Smrj 	 */
198212f080e7Smrj 	if ((sinfo->si_copybuf_req == 0) &&
198312f080e7Smrj 	    (sinfo->si_sgl_size <= attr->dma_attr_sgllen) &&
198412f080e7Smrj 	    (dma->dp_dma.dmao_size < dma->dp_maxxfer)) {
198512f080e7Smrj 		/*
198685c8e0e8Sstephh 		 * If the driver supports FMA, insert the handle in the FMA DMA
198785c8e0e8Sstephh 		 * handle cache.
198885c8e0e8Sstephh 		 */
1989567c0b92SStephen Hanson 		if (attr->dma_attr_flags & DDI_DMA_FLAGERR)
199085c8e0e8Sstephh 			hp->dmai_error.err_cf = rootnex_dma_check;
199185c8e0e8Sstephh 
199285c8e0e8Sstephh 		/*
199312f080e7Smrj 		 * copy out the first cookie and ccountp, set the cookie
199412f080e7Smrj 		 * pointer to the second cookie. The first cookie is passed
199512f080e7Smrj 		 * back on the stack. Additional cookies are accessed via
199612f080e7Smrj 		 * ddi_dma_nextcookie()
199712f080e7Smrj 		 */
199812f080e7Smrj 		*cookiep = dma->dp_cookies[0];
199912f080e7Smrj 		*ccountp = sinfo->si_sgl_size;
200012f080e7Smrj 		hp->dmai_cookie++;
200112f080e7Smrj 		hp->dmai_rflags &= ~DDI_DMA_PARTIAL;
20023a634bfcSVikram Hegde 		ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
20033a634bfcSVikram Hegde 		DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip,
20043a634bfcSVikram Hegde 		    uint64_t, rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS],
20053a634bfcSVikram Hegde 		    uint_t, dma->dp_dma.dmao_size);
20063a634bfcSVikram Hegde 
20073a634bfcSVikram Hegde 
200812f080e7Smrj 		return (DDI_DMA_MAPPED);
200912f080e7Smrj 	}
201012f080e7Smrj 
201112f080e7Smrj 	/*
201212f080e7Smrj 	 * go to the slow path, we may need to alloc more memory, create
201312f080e7Smrj 	 * multiple windows, and munge up a sgl to make the device happy.
201412f080e7Smrj 	 */
201512f080e7Smrj 	e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag);
201612f080e7Smrj 	if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) {
201712f080e7Smrj 		if (dma->dp_need_to_free_cookie) {
201812f080e7Smrj 			kmem_free(dma->dp_cookies, dma->dp_cookie_size);
201912f080e7Smrj 		}
202012f080e7Smrj 		ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
202112f080e7Smrj 		rootnex_clean_dmahdl(hp); /* must be after free cookie */
202212f080e7Smrj 		return (e);
202312f080e7Smrj 	}
202412f080e7Smrj 
202585c8e0e8Sstephh 	/*
202685c8e0e8Sstephh 	 * If the driver supports FMA, insert the handle in the FMA DMA handle
202785c8e0e8Sstephh 	 * cache.
202885c8e0e8Sstephh 	 */
2029567c0b92SStephen Hanson 	if (attr->dma_attr_flags & DDI_DMA_FLAGERR)
203085c8e0e8Sstephh 		hp->dmai_error.err_cf = rootnex_dma_check;
203185c8e0e8Sstephh 
203212f080e7Smrj 	/* if the first window uses the copy buffer, sync it for the device */
203312f080e7Smrj 	if ((dma->dp_window[dma->dp_current_win].wd_dosync) &&
203412f080e7Smrj 	    (hp->dmai_rflags & DDI_DMA_WRITE)) {
203594f1124eSVikram Hegde 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
203612f080e7Smrj 		    DDI_DMA_SYNC_FORDEV);
203712f080e7Smrj 	}
203812f080e7Smrj 
203912f080e7Smrj 	/*
204012f080e7Smrj 	 * copy out the first cookie and ccountp, set the cookie pointer to the
204112f080e7Smrj 	 * second cookie. Make sure the partial flag is set/cleared correctly.
204212f080e7Smrj 	 * If we have a partial map (i.e. multiple windows), the number of
204312f080e7Smrj 	 * cookies we return is the number of cookies in the first window.
204412f080e7Smrj 	 */
204512f080e7Smrj 	if (e == DDI_DMA_MAPPED) {
204612f080e7Smrj 		hp->dmai_rflags &= ~DDI_DMA_PARTIAL;
204712f080e7Smrj 		*ccountp = sinfo->si_sgl_size;
20483a634bfcSVikram Hegde 		hp->dmai_nwin = 1;
204912f080e7Smrj 	} else {
205012f080e7Smrj 		hp->dmai_rflags |= DDI_DMA_PARTIAL;
205112f080e7Smrj 		*ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt;
205212f080e7Smrj 		ASSERT(hp->dmai_nwin <= dma->dp_max_win);
205312f080e7Smrj 	}
205412f080e7Smrj 	*cookiep = dma->dp_cookies[0];
205512f080e7Smrj 	hp->dmai_cookie++;
205612f080e7Smrj 
20570b7ba611SMark Johnson 	ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
20580b7ba611SMark Johnson 	ROOTNEX_DPROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t,
205912f080e7Smrj 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t,
206012f080e7Smrj 	    dma->dp_dma.dmao_size);
206112f080e7Smrj 	return (e);
206212f080e7Smrj }
206312f080e7Smrj 
206412f080e7Smrj /*
206520906b23SVikram Hegde  * rootnex_dma_bindhdl()
206620906b23SVikram Hegde  *    called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle().
206712f080e7Smrj  */
206820906b23SVikram Hegde static int
206920906b23SVikram Hegde rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
207020906b23SVikram Hegde     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
207120906b23SVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t *ccountp)
207220906b23SVikram Hegde {
20733a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
2074b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
207520906b23SVikram Hegde 		return (iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq,
207620906b23SVikram Hegde 		    cookiep, ccountp));
207720906b23SVikram Hegde 	}
207820906b23SVikram Hegde #endif
207920906b23SVikram Hegde 	return (rootnex_coredma_bindhdl(dip, rdip, handle, dmareq,
208020906b23SVikram Hegde 	    cookiep, ccountp));
208120906b23SVikram Hegde }
208220906b23SVikram Hegde 
20833a634bfcSVikram Hegde 
20843a634bfcSVikram Hegde 
208512f080e7Smrj /*ARGSUSED*/
208612f080e7Smrj static int
208720906b23SVikram Hegde rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
208812f080e7Smrj     ddi_dma_handle_t handle)
208912f080e7Smrj {
209012f080e7Smrj 	ddi_dma_impl_t *hp;
209112f080e7Smrj 	rootnex_dma_t *dma;
209212f080e7Smrj 	int e;
209312f080e7Smrj 
209412f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
209512f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
209612f080e7Smrj 
209712f080e7Smrj 	/* make sure the buffer wasn't free'd before calling unbind */
209812f080e7Smrj 	if (rootnex_unbind_verify_buffer) {
209912f080e7Smrj 		e = rootnex_verify_buffer(dma);
210012f080e7Smrj 		if (e != DDI_SUCCESS) {
210112f080e7Smrj 			ASSERT(0);
210212f080e7Smrj 			return (DDI_FAILURE);
210312f080e7Smrj 		}
210412f080e7Smrj 	}
210512f080e7Smrj 
210612f080e7Smrj 	/* sync the current window before unbinding the buffer */
210712f080e7Smrj 	if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync &&
210812f080e7Smrj 	    (hp->dmai_rflags & DDI_DMA_READ)) {
210994f1124eSVikram Hegde 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
211012f080e7Smrj 		    DDI_DMA_SYNC_FORCPU);
211112f080e7Smrj 	}
211212f080e7Smrj 
211312f080e7Smrj 	/*
211412f080e7Smrj 	 * cleanup and copy buffer or window state. if we didn't use the copy
211512f080e7Smrj 	 * buffer or windows, there won't be much to do :-)
211612f080e7Smrj 	 */
211712f080e7Smrj 	rootnex_teardown_copybuf(dma);
211812f080e7Smrj 	rootnex_teardown_windows(dma);
211912f080e7Smrj 
21203a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
212112f080e7Smrj 	/*
21223a634bfcSVikram Hegde 	 * Clean up the page tables and free the dvma
212386c1f4dcSVikram Hegde 	 */
21243a634bfcSVikram Hegde 	e = immu_unmap_sgl(hp, rdip);
21253a634bfcSVikram Hegde 	if (e != DDI_DMA_USE_PHYSICAL && e != DDI_SUCCESS) {
21263a634bfcSVikram Hegde 		return (e);
212786c1f4dcSVikram Hegde 	}
212820906b23SVikram Hegde #endif
212986c1f4dcSVikram Hegde 
213086c1f4dcSVikram Hegde 	/*
213112f080e7Smrj 	 * If we had to allocate space to for the worse case sgl (it didn't
213212f080e7Smrj 	 * fit into our pre-allocate buffer), free that up now
213312f080e7Smrj 	 */
213412f080e7Smrj 	if (dma->dp_need_to_free_cookie) {
213512f080e7Smrj 		kmem_free(dma->dp_cookies, dma->dp_cookie_size);
213612f080e7Smrj 	}
213712f080e7Smrj 
213812f080e7Smrj 	/*
213912f080e7Smrj 	 * clean up the handle so it's ready for the next bind (i.e. if the
214012f080e7Smrj 	 * handle is reused).
214112f080e7Smrj 	 */
214212f080e7Smrj 	rootnex_clean_dmahdl(hp);
2143567c0b92SStephen Hanson 	hp->dmai_error.err_cf = NULL;
214412f080e7Smrj 
214512f080e7Smrj 	if (rootnex_state->r_dvma_call_list_id)
214612f080e7Smrj 		ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
214712f080e7Smrj 
21480b7ba611SMark Johnson 	ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
21490b7ba611SMark Johnson 	ROOTNEX_DPROBE1(rootnex__unbind, uint64_t,
215012f080e7Smrj 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
215112f080e7Smrj 
215212f080e7Smrj 	return (DDI_SUCCESS);
215312f080e7Smrj }
215412f080e7Smrj 
215520906b23SVikram Hegde /*
215620906b23SVikram Hegde  * rootnex_dma_unbindhdl()
215720906b23SVikram Hegde  *    called from ddi_dma_unbind_handle()
215820906b23SVikram Hegde  */
215920906b23SVikram Hegde /*ARGSUSED*/
216020906b23SVikram Hegde static int
216120906b23SVikram Hegde rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
216220906b23SVikram Hegde     ddi_dma_handle_t handle)
216320906b23SVikram Hegde {
21643a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
2165b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
216620906b23SVikram Hegde 		return (iommulib_nexdma_unbindhdl(dip, rdip, handle));
216720906b23SVikram Hegde 	}
216820906b23SVikram Hegde #endif
216920906b23SVikram Hegde 	return (rootnex_coredma_unbindhdl(dip, rdip, handle));
217020906b23SVikram Hegde }
217120906b23SVikram Hegde 
21723a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
217394f1124eSVikram Hegde 
217494f1124eSVikram Hegde static int
217594f1124eSVikram Hegde rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle)
217694f1124eSVikram Hegde {
217794f1124eSVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
217894f1124eSVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
217994f1124eSVikram Hegde 
218094f1124eSVikram Hegde 	if (dma->dp_sleep_flags != KM_SLEEP &&
218194f1124eSVikram Hegde 	    dma->dp_sleep_flags != KM_NOSLEEP)
218294f1124eSVikram Hegde 		cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle");
218394f1124eSVikram Hegde 	return (dma->dp_sleep_flags);
218494f1124eSVikram Hegde }
218520906b23SVikram Hegde /*ARGSUSED*/
218620906b23SVikram Hegde static void
218720906b23SVikram Hegde rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle)
218820906b23SVikram Hegde {
218920906b23SVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
219020906b23SVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
219194f1124eSVikram Hegde 	rootnex_window_t *window;
219220906b23SVikram Hegde 
219394f1124eSVikram Hegde 	if (dma->dp_window) {
219494f1124eSVikram Hegde 		window = &dma->dp_window[dma->dp_current_win];
219594f1124eSVikram Hegde 		hp->dmai_cookie = window->wd_first_cookie;
219694f1124eSVikram Hegde 	} else {
219794f1124eSVikram Hegde 		hp->dmai_cookie = dma->dp_cookies;
219894f1124eSVikram Hegde 	}
219920906b23SVikram Hegde 	hp->dmai_cookie++;
220020906b23SVikram Hegde }
220120906b23SVikram Hegde 
220220906b23SVikram Hegde /*ARGSUSED*/
220320906b23SVikram Hegde static int
220420906b23SVikram Hegde rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
220594f1124eSVikram Hegde     ddi_dma_cookie_t **cookiepp, uint_t *ccountp)
220620906b23SVikram Hegde {
220794f1124eSVikram Hegde 	int i;
220894f1124eSVikram Hegde 	int km_flags;
220920906b23SVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
221020906b23SVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
221194f1124eSVikram Hegde 	rootnex_window_t *window;
221294f1124eSVikram Hegde 	ddi_dma_cookie_t *cp;
221394f1124eSVikram Hegde 	ddi_dma_cookie_t *cookie;
221420906b23SVikram Hegde 
221594f1124eSVikram Hegde 	ASSERT(*cookiepp == NULL);
221694f1124eSVikram Hegde 	ASSERT(*ccountp == 0);
221720906b23SVikram Hegde 
221894f1124eSVikram Hegde 	if (dma->dp_window) {
221994f1124eSVikram Hegde 		window = &dma->dp_window[dma->dp_current_win];
222094f1124eSVikram Hegde 		cp = window->wd_first_cookie;
222194f1124eSVikram Hegde 		*ccountp = window->wd_cookie_cnt;
222220906b23SVikram Hegde 	} else {
222394f1124eSVikram Hegde 		cp = dma->dp_cookies;
222420906b23SVikram Hegde 		*ccountp = dma->dp_sglinfo.si_sgl_size;
222520906b23SVikram Hegde 	}
222620906b23SVikram Hegde 
222794f1124eSVikram Hegde 	km_flags = rootnex_coredma_get_sleep_flags(handle);
222894f1124eSVikram Hegde 	cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags);
222994f1124eSVikram Hegde 	if (cookie == NULL) {
223094f1124eSVikram Hegde 		return (DDI_DMA_NORESOURCES);
223194f1124eSVikram Hegde 	}
223294f1124eSVikram Hegde 
223394f1124eSVikram Hegde 	for (i = 0; i < *ccountp; i++) {
223494f1124eSVikram Hegde 		cookie[i].dmac_notused = cp[i].dmac_notused;
223594f1124eSVikram Hegde 		cookie[i].dmac_type = cp[i].dmac_type;
223694f1124eSVikram Hegde 		cookie[i].dmac_address = cp[i].dmac_address;
223794f1124eSVikram Hegde 		cookie[i].dmac_size = cp[i].dmac_size;
223894f1124eSVikram Hegde 	}
223994f1124eSVikram Hegde 
224094f1124eSVikram Hegde 	*cookiepp = cookie;
224120906b23SVikram Hegde 
224220906b23SVikram Hegde 	return (DDI_SUCCESS);
224320906b23SVikram Hegde }
224494f1124eSVikram Hegde 
224594f1124eSVikram Hegde /*ARGSUSED*/
224694f1124eSVikram Hegde static int
224794f1124eSVikram Hegde rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
224894f1124eSVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t ccount)
224994f1124eSVikram Hegde {
225094f1124eSVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
225194f1124eSVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
225294f1124eSVikram Hegde 	rootnex_window_t *window;
225394f1124eSVikram Hegde 	ddi_dma_cookie_t *cur_cookiep;
225494f1124eSVikram Hegde 
225594f1124eSVikram Hegde 	ASSERT(cookiep);
225694f1124eSVikram Hegde 	ASSERT(ccount != 0);
225794f1124eSVikram Hegde 	ASSERT(dma->dp_need_to_switch_cookies == B_FALSE);
225894f1124eSVikram Hegde 
225994f1124eSVikram Hegde 	if (dma->dp_window) {
226094f1124eSVikram Hegde 		window = &dma->dp_window[dma->dp_current_win];
226194f1124eSVikram Hegde 		dma->dp_saved_cookies = window->wd_first_cookie;
226294f1124eSVikram Hegde 		window->wd_first_cookie = cookiep;
226394f1124eSVikram Hegde 		ASSERT(ccount == window->wd_cookie_cnt);
226494f1124eSVikram Hegde 		cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies)
226594f1124eSVikram Hegde 		    + window->wd_first_cookie;
226694f1124eSVikram Hegde 	} else {
226794f1124eSVikram Hegde 		dma->dp_saved_cookies = dma->dp_cookies;
226894f1124eSVikram Hegde 		dma->dp_cookies = cookiep;
226994f1124eSVikram Hegde 		ASSERT(ccount == dma->dp_sglinfo.si_sgl_size);
227094f1124eSVikram Hegde 		cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies)
227194f1124eSVikram Hegde 		    + dma->dp_cookies;
227294f1124eSVikram Hegde 	}
227394f1124eSVikram Hegde 
227494f1124eSVikram Hegde 	dma->dp_need_to_switch_cookies = B_TRUE;
227594f1124eSVikram Hegde 	hp->dmai_cookie = cur_cookiep;
227694f1124eSVikram Hegde 
227794f1124eSVikram Hegde 	return (DDI_SUCCESS);
227894f1124eSVikram Hegde }
227994f1124eSVikram Hegde 
228094f1124eSVikram Hegde /*ARGSUSED*/
228194f1124eSVikram Hegde static int
228294f1124eSVikram Hegde rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle)
228394f1124eSVikram Hegde {
228494f1124eSVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
228594f1124eSVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
228694f1124eSVikram Hegde 	rootnex_window_t *window;
228794f1124eSVikram Hegde 	ddi_dma_cookie_t *cur_cookiep;
228894f1124eSVikram Hegde 	ddi_dma_cookie_t *cookie_array;
228994f1124eSVikram Hegde 	uint_t ccount;
229094f1124eSVikram Hegde 
229194f1124eSVikram Hegde 	/* check if cookies have not been switched */
229294f1124eSVikram Hegde 	if (dma->dp_need_to_switch_cookies == B_FALSE)
229394f1124eSVikram Hegde 		return (DDI_SUCCESS);
229494f1124eSVikram Hegde 
229594f1124eSVikram Hegde 	ASSERT(dma->dp_saved_cookies);
229694f1124eSVikram Hegde 
229794f1124eSVikram Hegde 	if (dma->dp_window) {
229894f1124eSVikram Hegde 		window = &dma->dp_window[dma->dp_current_win];
229994f1124eSVikram Hegde 		cookie_array = window->wd_first_cookie;
230094f1124eSVikram Hegde 		window->wd_first_cookie = dma->dp_saved_cookies;
230194f1124eSVikram Hegde 		dma->dp_saved_cookies = NULL;
230294f1124eSVikram Hegde 		ccount = window->wd_cookie_cnt;
230394f1124eSVikram Hegde 		cur_cookiep = (hp->dmai_cookie - cookie_array)
230494f1124eSVikram Hegde 		    + window->wd_first_cookie;
230594f1124eSVikram Hegde 	} else {
230694f1124eSVikram Hegde 		cookie_array = dma->dp_cookies;
230794f1124eSVikram Hegde 		dma->dp_cookies = dma->dp_saved_cookies;
230894f1124eSVikram Hegde 		dma->dp_saved_cookies = NULL;
230994f1124eSVikram Hegde 		ccount = dma->dp_sglinfo.si_sgl_size;
231094f1124eSVikram Hegde 		cur_cookiep = (hp->dmai_cookie - cookie_array)
231194f1124eSVikram Hegde 		    + dma->dp_cookies;
231294f1124eSVikram Hegde 	}
231394f1124eSVikram Hegde 
231494f1124eSVikram Hegde 	kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount);
231594f1124eSVikram Hegde 
231694f1124eSVikram Hegde 	hp->dmai_cookie = cur_cookiep;
231794f1124eSVikram Hegde 
231894f1124eSVikram Hegde 	dma->dp_need_to_switch_cookies = B_FALSE;
231994f1124eSVikram Hegde 
232094f1124eSVikram Hegde 	return (DDI_SUCCESS);
232194f1124eSVikram Hegde }
232294f1124eSVikram Hegde 
23235dfdb46bSVikram Hegde #endif
232412f080e7Smrj 
232512f080e7Smrj /*
232612f080e7Smrj  * rootnex_verify_buffer()
232712f080e7Smrj  *   verify buffer wasn't free'd
232812f080e7Smrj  */
232912f080e7Smrj static int
233012f080e7Smrj rootnex_verify_buffer(rootnex_dma_t *dma)
233112f080e7Smrj {
233212f080e7Smrj 	page_t **pplist;
233312f080e7Smrj 	caddr_t vaddr;
233412f080e7Smrj 	uint_t pcnt;
233512f080e7Smrj 	uint_t poff;
233612f080e7Smrj 	page_t *pp;
233700d0963fSdilpreet 	char b;
233812f080e7Smrj 	int i;
233912f080e7Smrj 
234012f080e7Smrj 	/* Figure out how many pages this buffer occupies */
234112f080e7Smrj 	if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) {
234212f080e7Smrj 		poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET;
234312f080e7Smrj 	} else {
234412f080e7Smrj 		vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr;
234512f080e7Smrj 		poff = (uintptr_t)vaddr & MMU_PAGEOFFSET;
234612f080e7Smrj 	}
234712f080e7Smrj 	pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff);
234812f080e7Smrj 
234912f080e7Smrj 	switch (dma->dp_dma.dmao_type) {
235012f080e7Smrj 	case DMA_OTYP_PAGES:
235112f080e7Smrj 		/*
235212f080e7Smrj 		 * for a linked list of pp's walk through them to make sure
235312f080e7Smrj 		 * they're locked and not free.
235412f080e7Smrj 		 */
235512f080e7Smrj 		pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp;
235612f080e7Smrj 		for (i = 0; i < pcnt; i++) {
235712f080e7Smrj 			if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) {
235812f080e7Smrj 				return (DDI_FAILURE);
235912f080e7Smrj 			}
23607c478bd9Sstevel@tonic-gate 			pp = pp->p_next;
23617c478bd9Sstevel@tonic-gate 		}
23627c478bd9Sstevel@tonic-gate 		break;
236312f080e7Smrj 
23647c478bd9Sstevel@tonic-gate 	case DMA_OTYP_VADDR:
23657c478bd9Sstevel@tonic-gate 	case DMA_OTYP_BUFVADDR:
236612f080e7Smrj 		pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv;
236712f080e7Smrj 		/*
236812f080e7Smrj 		 * for an array of pp's walk through them to make sure they're
236912f080e7Smrj 		 * not free. It's possible that they may not be locked.
237012f080e7Smrj 		 */
237112f080e7Smrj 		if (pplist) {
237212f080e7Smrj 			for (i = 0; i < pcnt; i++) {
237312f080e7Smrj 				if (PP_ISFREE(pplist[i])) {
237412f080e7Smrj 					return (DDI_FAILURE);
237512f080e7Smrj 				}
237612f080e7Smrj 			}
237712f080e7Smrj 
237812f080e7Smrj 		/* For a virtual address, try to peek at each page */
237912f080e7Smrj 		} else {
238012f080e7Smrj 			if (dma->dp_sglinfo.si_asp == &kas) {
238112f080e7Smrj 				for (i = 0; i < pcnt; i++) {
238200d0963fSdilpreet 					if (ddi_peek8(NULL, vaddr, &b) ==
238300d0963fSdilpreet 					    DDI_FAILURE)
238412f080e7Smrj 						return (DDI_FAILURE);
238500d0963fSdilpreet 					vaddr += MMU_PAGESIZE;
238612f080e7Smrj 				}
238712f080e7Smrj 			}
238812f080e7Smrj 		}
238912f080e7Smrj 		break;
239012f080e7Smrj 
239112f080e7Smrj 	default:
239212f080e7Smrj 		ASSERT(0);
239312f080e7Smrj 		break;
239412f080e7Smrj 	}
239512f080e7Smrj 
239612f080e7Smrj 	return (DDI_SUCCESS);
239712f080e7Smrj }
239812f080e7Smrj 
239912f080e7Smrj 
240012f080e7Smrj /*
240112f080e7Smrj  * rootnex_clean_dmahdl()
240212f080e7Smrj  *    Clean the dma handle. This should be called on a handle alloc and an
240312f080e7Smrj  *    unbind handle. Set the handle state to the default settings.
240412f080e7Smrj  */
240512f080e7Smrj static void
240612f080e7Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp)
240712f080e7Smrj {
240812f080e7Smrj 	rootnex_dma_t *dma;
240912f080e7Smrj 
241012f080e7Smrj 
241112f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
241212f080e7Smrj 
241312f080e7Smrj 	hp->dmai_nwin = 0;
241412f080e7Smrj 	dma->dp_current_cookie = 0;
241512f080e7Smrj 	dma->dp_copybuf_size = 0;
241612f080e7Smrj 	dma->dp_window = NULL;
241712f080e7Smrj 	dma->dp_cbaddr = NULL;
241812f080e7Smrj 	dma->dp_inuse = B_FALSE;
241912f080e7Smrj 	dma->dp_need_to_free_cookie = B_FALSE;
242094f1124eSVikram Hegde 	dma->dp_need_to_switch_cookies = B_FALSE;
242194f1124eSVikram Hegde 	dma->dp_saved_cookies = NULL;
242294f1124eSVikram Hegde 	dma->dp_sleep_flags = KM_PANIC;
242312f080e7Smrj 	dma->dp_need_to_free_window = B_FALSE;
242412f080e7Smrj 	dma->dp_partial_required = B_FALSE;
242512f080e7Smrj 	dma->dp_trim_required = B_FALSE;
242612f080e7Smrj 	dma->dp_sglinfo.si_copybuf_req = 0;
242712f080e7Smrj #if !defined(__amd64)
242812f080e7Smrj 	dma->dp_cb_remaping = B_FALSE;
242912f080e7Smrj 	dma->dp_kva = NULL;
243012f080e7Smrj #endif
243112f080e7Smrj 
243212f080e7Smrj 	/* FMA related initialization */
243312f080e7Smrj 	hp->dmai_fault = 0;
243412f080e7Smrj 	hp->dmai_fault_check = NULL;
243512f080e7Smrj 	hp->dmai_fault_notify = NULL;
243612f080e7Smrj 	hp->dmai_error.err_ena = 0;
243712f080e7Smrj 	hp->dmai_error.err_status = DDI_FM_OK;
243812f080e7Smrj 	hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED;
243912f080e7Smrj 	hp->dmai_error.err_ontrap = NULL;
244012f080e7Smrj }
244112f080e7Smrj 
244212f080e7Smrj 
244312f080e7Smrj /*
244412f080e7Smrj  * rootnex_valid_alloc_parms()
244512f080e7Smrj  *    Called in ddi_dma_alloc_handle path to validate its parameters.
244612f080e7Smrj  */
244712f080e7Smrj static int
244812f080e7Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize)
244912f080e7Smrj {
245012f080e7Smrj 	if ((attr->dma_attr_seg < MMU_PAGEOFFSET) ||
245112f080e7Smrj 	    (attr->dma_attr_count_max < MMU_PAGEOFFSET) ||
245212f080e7Smrj 	    (attr->dma_attr_granular > MMU_PAGESIZE) ||
245312f080e7Smrj 	    (attr->dma_attr_maxxfer < MMU_PAGESIZE)) {
245412f080e7Smrj 		return (DDI_DMA_BADATTR);
245512f080e7Smrj 	}
245612f080e7Smrj 
245712f080e7Smrj 	if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) {
245812f080e7Smrj 		return (DDI_DMA_BADATTR);
245912f080e7Smrj 	}
246012f080e7Smrj 
246112f080e7Smrj 	if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET ||
246212f080e7Smrj 	    MMU_PAGESIZE & (attr->dma_attr_granular - 1) ||
246312f080e7Smrj 	    attr->dma_attr_sgllen <= 0) {
246412f080e7Smrj 		return (DDI_DMA_BADATTR);
246512f080e7Smrj 	}
246612f080e7Smrj 
246712f080e7Smrj 	/* We should be able to DMA into every byte offset in a page */
246812f080e7Smrj 	if (maxsegmentsize < MMU_PAGESIZE) {
246912f080e7Smrj 		return (DDI_DMA_BADATTR);
247012f080e7Smrj 	}
247112f080e7Smrj 
247207c6692fSMark Johnson 	/* if we're bouncing on seg, seg must be <= addr_hi */
247307c6692fSMark Johnson 	if ((attr->dma_attr_flags & _DDI_DMA_BOUNCE_ON_SEG) &&
247407c6692fSMark Johnson 	    (attr->dma_attr_seg > attr->dma_attr_addr_hi)) {
247507c6692fSMark Johnson 		return (DDI_DMA_BADATTR);
247607c6692fSMark Johnson 	}
247712f080e7Smrj 	return (DDI_SUCCESS);
247812f080e7Smrj }
247912f080e7Smrj 
248012f080e7Smrj /*
248112f080e7Smrj  * rootnex_valid_bind_parms()
248212f080e7Smrj  *    Called in ddi_dma_*_bind_handle path to validate its parameters.
248312f080e7Smrj  */
248412f080e7Smrj /* ARGSUSED */
248512f080e7Smrj static int
248612f080e7Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr)
248712f080e7Smrj {
248812f080e7Smrj #if !defined(__amd64)
248912f080e7Smrj 	/*
249012f080e7Smrj 	 * we only support up to a 2G-1 transfer size on 32-bit kernels so
249112f080e7Smrj 	 * we can track the offset for the obsoleted interfaces.
249212f080e7Smrj 	 */
249312f080e7Smrj 	if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) {
249412f080e7Smrj 		return (DDI_DMA_TOOBIG);
249512f080e7Smrj 	}
249612f080e7Smrj #endif
249712f080e7Smrj 
249812f080e7Smrj 	return (DDI_SUCCESS);
249912f080e7Smrj }
250012f080e7Smrj 
250112f080e7Smrj 
250212f080e7Smrj /*
250307c6692fSMark Johnson  * rootnex_need_bounce_seg()
250407c6692fSMark Johnson  *    check to see if the buffer lives on both side of the seg.
250507c6692fSMark Johnson  */
250607c6692fSMark Johnson static boolean_t
250707c6692fSMark Johnson rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object, rootnex_sglinfo_t *sglinfo)
250807c6692fSMark Johnson {
250907c6692fSMark Johnson 	ddi_dma_atyp_t buftype;
251007c6692fSMark Johnson 	rootnex_addr_t raddr;
251107c6692fSMark Johnson 	boolean_t lower_addr;
251207c6692fSMark Johnson 	boolean_t upper_addr;
251307c6692fSMark Johnson 	uint64_t offset;
251407c6692fSMark Johnson 	page_t **pplist;
251507c6692fSMark Johnson 	uint64_t paddr;
251607c6692fSMark Johnson 	uint32_t psize;
251707c6692fSMark Johnson 	uint32_t size;
251807c6692fSMark Johnson 	caddr_t vaddr;
251907c6692fSMark Johnson 	uint_t pcnt;
252007c6692fSMark Johnson 	page_t *pp;
252107c6692fSMark Johnson 
252207c6692fSMark Johnson 
252307c6692fSMark Johnson 	/* shortcuts */
252407c6692fSMark Johnson 	pplist = dmar_object->dmao_obj.virt_obj.v_priv;
252507c6692fSMark Johnson 	vaddr = dmar_object->dmao_obj.virt_obj.v_addr;
252607c6692fSMark Johnson 	buftype = dmar_object->dmao_type;
252707c6692fSMark Johnson 	size = dmar_object->dmao_size;
252807c6692fSMark Johnson 
252907c6692fSMark Johnson 	lower_addr = B_FALSE;
253007c6692fSMark Johnson 	upper_addr = B_FALSE;
253107c6692fSMark Johnson 	pcnt = 0;
253207c6692fSMark Johnson 
253307c6692fSMark Johnson 	/*
253407c6692fSMark Johnson 	 * Process the first page to handle the initial offset of the buffer.
253507c6692fSMark Johnson 	 * We'll use the base address we get later when we loop through all
253607c6692fSMark Johnson 	 * the pages.
253707c6692fSMark Johnson 	 */
253807c6692fSMark Johnson 	if (buftype == DMA_OTYP_PAGES) {
253907c6692fSMark Johnson 		pp = dmar_object->dmao_obj.pp_obj.pp_pp;
254007c6692fSMark Johnson 		offset =  dmar_object->dmao_obj.pp_obj.pp_offset &
254107c6692fSMark Johnson 		    MMU_PAGEOFFSET;
254207c6692fSMark Johnson 		paddr = pfn_to_pa(pp->p_pagenum) + offset;
254307c6692fSMark Johnson 		psize = MIN(size, (MMU_PAGESIZE - offset));
254407c6692fSMark Johnson 		pp = pp->p_next;
254507c6692fSMark Johnson 		sglinfo->si_asp = NULL;
254607c6692fSMark Johnson 	} else if (pplist != NULL) {
254707c6692fSMark Johnson 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
254807c6692fSMark Johnson 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
254907c6692fSMark Johnson 		if (sglinfo->si_asp == NULL) {
255007c6692fSMark Johnson 			sglinfo->si_asp = &kas;
255107c6692fSMark Johnson 		}
255207c6692fSMark Johnson 		paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
255307c6692fSMark Johnson 		paddr += offset;
255407c6692fSMark Johnson 		psize = MIN(size, (MMU_PAGESIZE - offset));
255507c6692fSMark Johnson 		pcnt++;
255607c6692fSMark Johnson 	} else {
255707c6692fSMark Johnson 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
255807c6692fSMark Johnson 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
255907c6692fSMark Johnson 		if (sglinfo->si_asp == NULL) {
256007c6692fSMark Johnson 			sglinfo->si_asp = &kas;
256107c6692fSMark Johnson 		}
256207c6692fSMark Johnson 		paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr));
256307c6692fSMark Johnson 		paddr += offset;
256407c6692fSMark Johnson 		psize = MIN(size, (MMU_PAGESIZE - offset));
256507c6692fSMark Johnson 		vaddr += psize;
256607c6692fSMark Johnson 	}
256707c6692fSMark Johnson 
256807c6692fSMark Johnson #ifdef __xpv
256907c6692fSMark Johnson 	/*
257007c6692fSMark Johnson 	 * If we're dom0, we're using a real device so we need to load
257107c6692fSMark Johnson 	 * the cookies with MFNs instead of PFNs.
257207c6692fSMark Johnson 	 */
257307c6692fSMark Johnson 	raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
257407c6692fSMark Johnson #else
257507c6692fSMark Johnson 	raddr = paddr;
257607c6692fSMark Johnson #endif
257707c6692fSMark Johnson 
257807c6692fSMark Johnson 	if ((raddr + psize) > sglinfo->si_segmask) {
257907c6692fSMark Johnson 		upper_addr = B_TRUE;
258007c6692fSMark Johnson 	} else {
258107c6692fSMark Johnson 		lower_addr = B_TRUE;
258207c6692fSMark Johnson 	}
258307c6692fSMark Johnson 	size -= psize;
258407c6692fSMark Johnson 
258507c6692fSMark Johnson 	/*
258607c6692fSMark Johnson 	 * Walk through the rest of the pages in the buffer. Track to see
258707c6692fSMark Johnson 	 * if we have pages on both sides of the segment boundary.
258807c6692fSMark Johnson 	 */
258907c6692fSMark Johnson 	while (size > 0) {
259007c6692fSMark Johnson 		/* partial or full page */
259107c6692fSMark Johnson 		psize = MIN(size, MMU_PAGESIZE);
259207c6692fSMark Johnson 
259307c6692fSMark Johnson 		if (buftype == DMA_OTYP_PAGES) {
259407c6692fSMark Johnson 			/* get the paddr from the page_t */
259507c6692fSMark Johnson 			ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
259607c6692fSMark Johnson 			paddr = pfn_to_pa(pp->p_pagenum);
259707c6692fSMark Johnson 			pp = pp->p_next;
259807c6692fSMark Johnson 		} else if (pplist != NULL) {
259907c6692fSMark Johnson 			/* index into the array of page_t's to get the paddr */
260007c6692fSMark Johnson 			ASSERT(!PP_ISFREE(pplist[pcnt]));
260107c6692fSMark Johnson 			paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
260207c6692fSMark Johnson 			pcnt++;
260307c6692fSMark Johnson 		} else {
260407c6692fSMark Johnson 			/* call into the VM to get the paddr */
260507c6692fSMark Johnson 			paddr =  pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat,
260607c6692fSMark Johnson 			    vaddr));
260707c6692fSMark Johnson 			vaddr += psize;
260807c6692fSMark Johnson 		}
260907c6692fSMark Johnson 
261007c6692fSMark Johnson #ifdef __xpv
261107c6692fSMark Johnson 		/*
261207c6692fSMark Johnson 		 * If we're dom0, we're using a real device so we need to load
261307c6692fSMark Johnson 		 * the cookies with MFNs instead of PFNs.
261407c6692fSMark Johnson 		 */
261507c6692fSMark Johnson 		raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
261607c6692fSMark Johnson #else
261707c6692fSMark Johnson 		raddr = paddr;
261807c6692fSMark Johnson #endif
261907c6692fSMark Johnson 
262007c6692fSMark Johnson 		if ((raddr + psize) > sglinfo->si_segmask) {
262107c6692fSMark Johnson 			upper_addr = B_TRUE;
262207c6692fSMark Johnson 		} else {
262307c6692fSMark Johnson 			lower_addr = B_TRUE;
262407c6692fSMark Johnson 		}
262507c6692fSMark Johnson 		/*
262607c6692fSMark Johnson 		 * if the buffer lives both above and below the segment
262707c6692fSMark Johnson 		 * boundary, or the current page is the page immediately
262807c6692fSMark Johnson 		 * after the segment, we will use a copy/bounce buffer for
262907c6692fSMark Johnson 		 * all pages > seg.
263007c6692fSMark Johnson 		 */
263107c6692fSMark Johnson 		if ((lower_addr && upper_addr) ||
263207c6692fSMark Johnson 		    (raddr == (sglinfo->si_segmask + 1))) {
263307c6692fSMark Johnson 			return (B_TRUE);
263407c6692fSMark Johnson 		}
263507c6692fSMark Johnson 
263607c6692fSMark Johnson 		size -= psize;
263707c6692fSMark Johnson 	}
263807c6692fSMark Johnson 
263907c6692fSMark Johnson 	return (B_FALSE);
264007c6692fSMark Johnson }
264107c6692fSMark Johnson 
264207c6692fSMark Johnson 
264307c6692fSMark Johnson /*
264412f080e7Smrj  * rootnex_get_sgl()
264512f080e7Smrj  *    Called in bind fastpath to get the sgl. Most of this will be replaced
264612f080e7Smrj  *    with a call to the vm layer when vm2.0 comes around...
264712f080e7Smrj  */
264812f080e7Smrj static void
264912f080e7Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl,
265012f080e7Smrj     rootnex_sglinfo_t *sglinfo)
265112f080e7Smrj {
265212f080e7Smrj 	ddi_dma_atyp_t buftype;
2653843e1988Sjohnlev 	rootnex_addr_t raddr;
265412f080e7Smrj 	uint64_t last_page;
265512f080e7Smrj 	uint64_t offset;
265612f080e7Smrj 	uint64_t addrhi;
265712f080e7Smrj 	uint64_t addrlo;
265812f080e7Smrj 	uint64_t maxseg;
265912f080e7Smrj 	page_t **pplist;
266012f080e7Smrj 	uint64_t paddr;
266112f080e7Smrj 	uint32_t psize;
266212f080e7Smrj 	uint32_t size;
266312f080e7Smrj 	caddr_t vaddr;
266412f080e7Smrj 	uint_t pcnt;
266512f080e7Smrj 	page_t *pp;
266612f080e7Smrj 	uint_t cnt;
266712f080e7Smrj 
266812f080e7Smrj 
266912f080e7Smrj 	/* shortcuts */
267012f080e7Smrj 	pplist = dmar_object->dmao_obj.virt_obj.v_priv;
267112f080e7Smrj 	vaddr = dmar_object->dmao_obj.virt_obj.v_addr;
267212f080e7Smrj 	maxseg = sglinfo->si_max_cookie_size;
267312f080e7Smrj 	buftype = dmar_object->dmao_type;
267412f080e7Smrj 	addrhi = sglinfo->si_max_addr;
267512f080e7Smrj 	addrlo = sglinfo->si_min_addr;
267612f080e7Smrj 	size = dmar_object->dmao_size;
267712f080e7Smrj 
267812f080e7Smrj 	pcnt = 0;
267912f080e7Smrj 	cnt = 0;
268012f080e7Smrj 
268107c6692fSMark Johnson 
268207c6692fSMark Johnson 	/*
268307c6692fSMark Johnson 	 * check to see if we need to use the copy buffer for pages over
268407c6692fSMark Johnson 	 * the segment attr.
268507c6692fSMark Johnson 	 */
268607c6692fSMark Johnson 	sglinfo->si_bounce_on_seg = B_FALSE;
268707c6692fSMark Johnson 	if (sglinfo->si_flags & _DDI_DMA_BOUNCE_ON_SEG) {
268807c6692fSMark Johnson 		sglinfo->si_bounce_on_seg = rootnex_need_bounce_seg(
268907c6692fSMark Johnson 		    dmar_object, sglinfo);
269007c6692fSMark Johnson 	}
269107c6692fSMark Johnson 
269212f080e7Smrj 	/*
269312f080e7Smrj 	 * if we were passed down a linked list of pages, i.e. pointer to
269412f080e7Smrj 	 * page_t, use this to get our physical address and buf offset.
269512f080e7Smrj 	 */
269612f080e7Smrj 	if (buftype == DMA_OTYP_PAGES) {
269712f080e7Smrj 		pp = dmar_object->dmao_obj.pp_obj.pp_pp;
269812f080e7Smrj 		ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
269912f080e7Smrj 		offset =  dmar_object->dmao_obj.pp_obj.pp_offset &
270012f080e7Smrj 		    MMU_PAGEOFFSET;
2701843e1988Sjohnlev 		paddr = pfn_to_pa(pp->p_pagenum) + offset;
270212f080e7Smrj 		psize = MIN(size, (MMU_PAGESIZE - offset));
270312f080e7Smrj 		pp = pp->p_next;
270412f080e7Smrj 		sglinfo->si_asp = NULL;
270512f080e7Smrj 
270612f080e7Smrj 	/*
270712f080e7Smrj 	 * We weren't passed down a linked list of pages, but if we were passed
270812f080e7Smrj 	 * down an array of pages, use this to get our physical address and buf
270912f080e7Smrj 	 * offset.
271012f080e7Smrj 	 */
271112f080e7Smrj 	} else if (pplist != NULL) {
271212f080e7Smrj 		ASSERT((buftype == DMA_OTYP_VADDR) ||
271312f080e7Smrj 		    (buftype == DMA_OTYP_BUFVADDR));
271412f080e7Smrj 
271512f080e7Smrj 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
271612f080e7Smrj 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
271712f080e7Smrj 		if (sglinfo->si_asp == NULL) {
271812f080e7Smrj 			sglinfo->si_asp = &kas;
271912f080e7Smrj 		}
272012f080e7Smrj 
272112f080e7Smrj 		ASSERT(!PP_ISFREE(pplist[pcnt]));
2722843e1988Sjohnlev 		paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
272312f080e7Smrj 		paddr += offset;
272412f080e7Smrj 		psize = MIN(size, (MMU_PAGESIZE - offset));
272512f080e7Smrj 		pcnt++;
272612f080e7Smrj 
272712f080e7Smrj 	/*
272812f080e7Smrj 	 * All we have is a virtual address, we'll need to call into the VM
272912f080e7Smrj 	 * to get the physical address.
273012f080e7Smrj 	 */
273112f080e7Smrj 	} else {
273212f080e7Smrj 		ASSERT((buftype == DMA_OTYP_VADDR) ||
273312f080e7Smrj 		    (buftype == DMA_OTYP_BUFVADDR));
273412f080e7Smrj 
273512f080e7Smrj 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
273612f080e7Smrj 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
273712f080e7Smrj 		if (sglinfo->si_asp == NULL) {
273812f080e7Smrj 			sglinfo->si_asp = &kas;
273912f080e7Smrj 		}
274012f080e7Smrj 
2741843e1988Sjohnlev 		paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr));
274212f080e7Smrj 		paddr += offset;
274312f080e7Smrj 		psize = MIN(size, (MMU_PAGESIZE - offset));
274412f080e7Smrj 		vaddr += psize;
274512f080e7Smrj 	}
274612f080e7Smrj 
2747843e1988Sjohnlev #ifdef __xpv
2748843e1988Sjohnlev 	/*
2749843e1988Sjohnlev 	 * If we're dom0, we're using a real device so we need to load
2750843e1988Sjohnlev 	 * the cookies with MFNs instead of PFNs.
2751843e1988Sjohnlev 	 */
2752843e1988Sjohnlev 	raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
2753843e1988Sjohnlev #else
2754843e1988Sjohnlev 	raddr = paddr;
2755843e1988Sjohnlev #endif
2756843e1988Sjohnlev 
275712f080e7Smrj 	/*
275812f080e7Smrj 	 * Setup the first cookie with the physical address of the page and the
275912f080e7Smrj 	 * size of the page (which takes into account the initial offset into
276012f080e7Smrj 	 * the page.
276112f080e7Smrj 	 */
2762843e1988Sjohnlev 	sgl[cnt].dmac_laddress = raddr;
276312f080e7Smrj 	sgl[cnt].dmac_size = psize;
276412f080e7Smrj 	sgl[cnt].dmac_type = 0;
276512f080e7Smrj 
276612f080e7Smrj 	/*
276712f080e7Smrj 	 * Save away the buffer offset into the page. We'll need this later in
276812f080e7Smrj 	 * the copy buffer code to help figure out the page index within the
276912f080e7Smrj 	 * buffer and the offset into the current page.
277012f080e7Smrj 	 */
277112f080e7Smrj 	sglinfo->si_buf_offset = offset;
277212f080e7Smrj 
277312f080e7Smrj 	/*
277407c6692fSMark Johnson 	 * If we are using the copy buffer for anything over the segment
277507c6692fSMark Johnson 	 * boundary, and this page is over the segment boundary.
277607c6692fSMark Johnson 	 *   OR
277707c6692fSMark Johnson 	 * if the DMA engine can't reach the physical address.
277812f080e7Smrj 	 */
277907c6692fSMark Johnson 	if (((sglinfo->si_bounce_on_seg) &&
278007c6692fSMark Johnson 	    ((raddr + psize) > sglinfo->si_segmask)) ||
278107c6692fSMark Johnson 	    ((raddr < addrlo) || ((raddr + psize) > addrhi))) {
278207c6692fSMark Johnson 		/*
278307c6692fSMark Johnson 		 * Increase how much copy buffer we use. We always increase by
278407c6692fSMark Johnson 		 * pagesize so we don't have to worry about converting offsets.
278507c6692fSMark Johnson 		 * Set a flag in the cookies dmac_type to indicate that it uses
278607c6692fSMark Johnson 		 * the copy buffer. If this isn't the last cookie, go to the
278707c6692fSMark Johnson 		 * next cookie (since we separate each page which uses the copy
278807c6692fSMark Johnson 		 * buffer in case the copy buffer is not physically contiguous.
278907c6692fSMark Johnson 		 */
279012f080e7Smrj 		sglinfo->si_copybuf_req += MMU_PAGESIZE;
279112f080e7Smrj 		sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF;
279212f080e7Smrj 		if ((cnt + 1) < sglinfo->si_max_pages) {
279312f080e7Smrj 			cnt++;
279412f080e7Smrj 			sgl[cnt].dmac_laddress = 0;
279512f080e7Smrj 			sgl[cnt].dmac_size = 0;
279612f080e7Smrj 			sgl[cnt].dmac_type = 0;
279712f080e7Smrj 		}
279812f080e7Smrj 	}
279912f080e7Smrj 
280012f080e7Smrj 	/*
280112f080e7Smrj 	 * save this page's physical address so we can figure out if the next
280212f080e7Smrj 	 * page is physically contiguous. Keep decrementing size until we are
280312f080e7Smrj 	 * done with the buffer.
280412f080e7Smrj 	 */
2805843e1988Sjohnlev 	last_page = raddr & MMU_PAGEMASK;
280612f080e7Smrj 	size -= psize;
280712f080e7Smrj 
280812f080e7Smrj 	while (size > 0) {
280912f080e7Smrj 		/* Get the size for this page (i.e. partial or full page) */
281012f080e7Smrj 		psize = MIN(size, MMU_PAGESIZE);
281112f080e7Smrj 
281212f080e7Smrj 		if (buftype == DMA_OTYP_PAGES) {
281312f080e7Smrj 			/* get the paddr from the page_t */
281412f080e7Smrj 			ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
2815843e1988Sjohnlev 			paddr = pfn_to_pa(pp->p_pagenum);
281612f080e7Smrj 			pp = pp->p_next;
281712f080e7Smrj 		} else if (pplist != NULL) {
281812f080e7Smrj 			/* index into the array of page_t's to get the paddr */
281912f080e7Smrj 			ASSERT(!PP_ISFREE(pplist[pcnt]));
2820843e1988Sjohnlev 			paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
282112f080e7Smrj 			pcnt++;
282212f080e7Smrj 		} else {
282312f080e7Smrj 			/* call into the VM to get the paddr */
2824843e1988Sjohnlev 			paddr =  pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat,
282512f080e7Smrj 			    vaddr));
282612f080e7Smrj 			vaddr += psize;
282712f080e7Smrj 		}
282812f080e7Smrj 
2829843e1988Sjohnlev #ifdef __xpv
2830843e1988Sjohnlev 		/*
2831843e1988Sjohnlev 		 * If we're dom0, we're using a real device so we need to load
2832843e1988Sjohnlev 		 * the cookies with MFNs instead of PFNs.
2833843e1988Sjohnlev 		 */
2834843e1988Sjohnlev 		raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
2835843e1988Sjohnlev #else
2836843e1988Sjohnlev 		raddr = paddr;
2837843e1988Sjohnlev #endif
283807c6692fSMark Johnson 
283907c6692fSMark Johnson 		/*
284007c6692fSMark Johnson 		 * If we are using the copy buffer for anything over the
284107c6692fSMark Johnson 		 * segment boundary, and this page is over the segment
284207c6692fSMark Johnson 		 * boundary.
284307c6692fSMark Johnson 		 *   OR
284407c6692fSMark Johnson 		 * if the DMA engine can't reach the physical address.
284507c6692fSMark Johnson 		 */
284607c6692fSMark Johnson 		if (((sglinfo->si_bounce_on_seg) &&
284707c6692fSMark Johnson 		    ((raddr + psize) > sglinfo->si_segmask)) ||
284807c6692fSMark Johnson 		    ((raddr < addrlo) || ((raddr + psize) > addrhi))) {
284907c6692fSMark Johnson 
285012f080e7Smrj 			sglinfo->si_copybuf_req += MMU_PAGESIZE;
285112f080e7Smrj 
285212f080e7Smrj 			/*
285312f080e7Smrj 			 * if there is something in the current cookie, go to
285412f080e7Smrj 			 * the next one. We only want one page in a cookie which
285512f080e7Smrj 			 * uses the copybuf since the copybuf doesn't have to
285612f080e7Smrj 			 * be physically contiguous.
285712f080e7Smrj 			 */
285812f080e7Smrj 			if (sgl[cnt].dmac_size != 0) {
285912f080e7Smrj 				cnt++;
286012f080e7Smrj 			}
2861843e1988Sjohnlev 			sgl[cnt].dmac_laddress = raddr;
286212f080e7Smrj 			sgl[cnt].dmac_size = psize;
286312f080e7Smrj #if defined(__amd64)
286412f080e7Smrj 			sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF;
286512f080e7Smrj #else
286612f080e7Smrj 			/*
286712f080e7Smrj 			 * save the buf offset for 32-bit kernel. used in the
286812f080e7Smrj 			 * obsoleted interfaces.
286912f080e7Smrj 			 */
287012f080e7Smrj 			sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF |
287112f080e7Smrj 			    (dmar_object->dmao_size - size);
287212f080e7Smrj #endif
287312f080e7Smrj 			/* if this isn't the last cookie, go to the next one */
287412f080e7Smrj 			if ((cnt + 1) < sglinfo->si_max_pages) {
287512f080e7Smrj 				cnt++;
287612f080e7Smrj 				sgl[cnt].dmac_laddress = 0;
287712f080e7Smrj 				sgl[cnt].dmac_size = 0;
287812f080e7Smrj 				sgl[cnt].dmac_type = 0;
287912f080e7Smrj 			}
288012f080e7Smrj 
288112f080e7Smrj 		/*
288212f080e7Smrj 		 * this page didn't need the copy buffer, if it's not physically
288312f080e7Smrj 		 * contiguous, or it would put us over a segment boundary, or it
288412f080e7Smrj 		 * puts us over the max cookie size, or the current sgl doesn't
288512f080e7Smrj 		 * have anything in it.
288612f080e7Smrj 		 */
2887843e1988Sjohnlev 		} else if (((last_page + MMU_PAGESIZE) != raddr) ||
2888843e1988Sjohnlev 		    !(raddr & sglinfo->si_segmask) ||
288912f080e7Smrj 		    ((sgl[cnt].dmac_size + psize) > maxseg) ||
289012f080e7Smrj 		    (sgl[cnt].dmac_size == 0)) {
289112f080e7Smrj 			/*
289212f080e7Smrj 			 * if we're not already in a new cookie, go to the next
289312f080e7Smrj 			 * cookie.
289412f080e7Smrj 			 */
289512f080e7Smrj 			if (sgl[cnt].dmac_size != 0) {
289612f080e7Smrj 				cnt++;
289712f080e7Smrj 			}
289812f080e7Smrj 
289912f080e7Smrj 			/* save the cookie information */
2900843e1988Sjohnlev 			sgl[cnt].dmac_laddress = raddr;
290112f080e7Smrj 			sgl[cnt].dmac_size = psize;
290212f080e7Smrj #if defined(__amd64)
290312f080e7Smrj 			sgl[cnt].dmac_type = 0;
290412f080e7Smrj #else
290512f080e7Smrj 			/*
290612f080e7Smrj 			 * save the buf offset for 32-bit kernel. used in the
290712f080e7Smrj 			 * obsoleted interfaces.
290812f080e7Smrj 			 */
290912f080e7Smrj 			sgl[cnt].dmac_type = dmar_object->dmao_size - size;
291012f080e7Smrj #endif
291112f080e7Smrj 
291212f080e7Smrj 		/*
291312f080e7Smrj 		 * this page didn't need the copy buffer, it is physically
291412f080e7Smrj 		 * contiguous with the last page, and it's <= the max cookie
291512f080e7Smrj 		 * size.
291612f080e7Smrj 		 */
291712f080e7Smrj 		} else {
291812f080e7Smrj 			sgl[cnt].dmac_size += psize;
291912f080e7Smrj 
292012f080e7Smrj 			/*
292112f080e7Smrj 			 * if this exactly ==  the maximum cookie size, and
292212f080e7Smrj 			 * it isn't the last cookie, go to the next cookie.
292312f080e7Smrj 			 */
292412f080e7Smrj 			if (((sgl[cnt].dmac_size + psize) == maxseg) &&
292512f080e7Smrj 			    ((cnt + 1) < sglinfo->si_max_pages)) {
292612f080e7Smrj 				cnt++;
292712f080e7Smrj 				sgl[cnt].dmac_laddress = 0;
292812f080e7Smrj 				sgl[cnt].dmac_size = 0;
292912f080e7Smrj 				sgl[cnt].dmac_type = 0;
293012f080e7Smrj 			}
293112f080e7Smrj 		}
293212f080e7Smrj 
293312f080e7Smrj 		/*
293412f080e7Smrj 		 * save this page's physical address so we can figure out if the
293512f080e7Smrj 		 * next page is physically contiguous. Keep decrementing size
293612f080e7Smrj 		 * until we are done with the buffer.
293712f080e7Smrj 		 */
2938843e1988Sjohnlev 		last_page = raddr;
293912f080e7Smrj 		size -= psize;
294012f080e7Smrj 	}
294112f080e7Smrj 
294212f080e7Smrj 	/* we're done, save away how many cookies the sgl has */
294312f080e7Smrj 	if (sgl[cnt].dmac_size == 0) {
294412f080e7Smrj 		ASSERT(cnt < sglinfo->si_max_pages);
294512f080e7Smrj 		sglinfo->si_sgl_size = cnt;
294612f080e7Smrj 	} else {
294712f080e7Smrj 		sglinfo->si_sgl_size = cnt + 1;
294812f080e7Smrj 	}
294912f080e7Smrj }
295012f080e7Smrj 
295112f080e7Smrj /*
295212f080e7Smrj  * rootnex_bind_slowpath()
295312f080e7Smrj  *    Call in the bind path if the calling driver can't use the sgl without
295412f080e7Smrj  *    modifying it. We either need to use the copy buffer and/or we will end up
295512f080e7Smrj  *    with a partial bind.
295612f080e7Smrj  */
295712f080e7Smrj static int
295812f080e7Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
295912f080e7Smrj     rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag)
296012f080e7Smrj {
296112f080e7Smrj 	rootnex_sglinfo_t *sinfo;
296212f080e7Smrj 	rootnex_window_t *window;
296312f080e7Smrj 	ddi_dma_cookie_t *cookie;
296412f080e7Smrj 	size_t copybuf_used;
296512f080e7Smrj 	size_t dmac_size;
296612f080e7Smrj 	boolean_t partial;
296712f080e7Smrj 	off_t cur_offset;
296812f080e7Smrj 	page_t *cur_pp;
296912f080e7Smrj 	major_t mnum;
297012f080e7Smrj 	int e;
297112f080e7Smrj 	int i;
297212f080e7Smrj 
297312f080e7Smrj 
297412f080e7Smrj 	sinfo = &dma->dp_sglinfo;
297512f080e7Smrj 	copybuf_used = 0;
297612f080e7Smrj 	partial = B_FALSE;
297712f080e7Smrj 
297812f080e7Smrj 	/*
297912f080e7Smrj 	 * If we're using the copybuf, set the copybuf state in dma struct.
298012f080e7Smrj 	 * Needs to be first since it sets the copy buffer size.
298112f080e7Smrj 	 */
298212f080e7Smrj 	if (sinfo->si_copybuf_req != 0) {
298312f080e7Smrj 		e = rootnex_setup_copybuf(hp, dmareq, dma, attr);
298412f080e7Smrj 		if (e != DDI_SUCCESS) {
298512f080e7Smrj 			return (e);
298612f080e7Smrj 		}
298712f080e7Smrj 	} else {
298812f080e7Smrj 		dma->dp_copybuf_size = 0;
298912f080e7Smrj 	}
299012f080e7Smrj 
299112f080e7Smrj 	/*
299212f080e7Smrj 	 * Figure out if we need to do a partial mapping. If so, figure out
299312f080e7Smrj 	 * if we need to trim the buffers when we munge the sgl.
299412f080e7Smrj 	 */
299512f080e7Smrj 	if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) ||
299612f080e7Smrj 	    (dma->dp_dma.dmao_size > dma->dp_maxxfer) ||
299712f080e7Smrj 	    (attr->dma_attr_sgllen < sinfo->si_sgl_size)) {
299812f080e7Smrj 		dma->dp_partial_required = B_TRUE;
299912f080e7Smrj 		if (attr->dma_attr_granular != 1) {
300012f080e7Smrj 			dma->dp_trim_required = B_TRUE;
300112f080e7Smrj 		}
300212f080e7Smrj 	} else {
300312f080e7Smrj 		dma->dp_partial_required = B_FALSE;
300412f080e7Smrj 		dma->dp_trim_required = B_FALSE;
300512f080e7Smrj 	}
300612f080e7Smrj 
300712f080e7Smrj 	/* If we need to do a partial bind, make sure the driver supports it */
300812f080e7Smrj 	if (dma->dp_partial_required &&
300912f080e7Smrj 	    !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) {
301012f080e7Smrj 
301112f080e7Smrj 		mnum = ddi_driver_major(dma->dp_dip);
301212f080e7Smrj 		/*
301312f080e7Smrj 		 * patchable which allows us to print one warning per major
301412f080e7Smrj 		 * number.
301512f080e7Smrj 		 */
301612f080e7Smrj 		if ((rootnex_bind_warn) &&
301712f080e7Smrj 		    ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) {
301812f080e7Smrj 			rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING;
301912f080e7Smrj 			cmn_err(CE_WARN, "!%s: coding error detected, the "
302012f080e7Smrj 			    "driver is using ddi_dma_attr(9S) incorrectly. "
302112f080e7Smrj 			    "There is a small risk of data corruption in "
302212f080e7Smrj 			    "particular with large I/Os. The driver should be "
302312f080e7Smrj 			    "replaced with a corrected version for proper "
302412f080e7Smrj 			    "system operation. To disable this warning, add "
302512f080e7Smrj 			    "'set rootnex:rootnex_bind_warn=0' to "
302612f080e7Smrj 			    "/etc/system(4).", ddi_driver_name(dma->dp_dip));
302712f080e7Smrj 		}
302812f080e7Smrj 		return (DDI_DMA_TOOBIG);
302912f080e7Smrj 	}
303012f080e7Smrj 
303112f080e7Smrj 	/*
303212f080e7Smrj 	 * we might need multiple windows, setup state to handle them. In this
303312f080e7Smrj 	 * code path, we will have at least one window.
303412f080e7Smrj 	 */
303512f080e7Smrj 	e = rootnex_setup_windows(hp, dma, attr, kmflag);
303612f080e7Smrj 	if (e != DDI_SUCCESS) {
303712f080e7Smrj 		rootnex_teardown_copybuf(dma);
303812f080e7Smrj 		return (e);
303912f080e7Smrj 	}
304012f080e7Smrj 
304112f080e7Smrj 	window = &dma->dp_window[0];
304212f080e7Smrj 	cookie = &dma->dp_cookies[0];
304312f080e7Smrj 	cur_offset = 0;
304412f080e7Smrj 	rootnex_init_win(hp, dma, window, cookie, cur_offset);
304512f080e7Smrj 	if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) {
304612f080e7Smrj 		cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp;
304712f080e7Smrj 	}
304812f080e7Smrj 
304912f080e7Smrj 	/* loop though all the cookies we got back from get_sgl() */
305012f080e7Smrj 	for (i = 0; i < sinfo->si_sgl_size; i++) {
305112f080e7Smrj 		/*
305212f080e7Smrj 		 * If we're using the copy buffer, check this cookie and setup
305312f080e7Smrj 		 * its associated copy buffer state. If this cookie uses the
305412f080e7Smrj 		 * copy buffer, make sure we sync this window during dma_sync.
305512f080e7Smrj 		 */
305612f080e7Smrj 		if (dma->dp_copybuf_size > 0) {
305712f080e7Smrj 			rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie,
305812f080e7Smrj 			    cur_offset, &copybuf_used, &cur_pp);
305912f080e7Smrj 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
306012f080e7Smrj 				window->wd_dosync = B_TRUE;
306112f080e7Smrj 			}
306212f080e7Smrj 		}
306312f080e7Smrj 
306412f080e7Smrj 		/*
306512f080e7Smrj 		 * save away the cookie size, since it could be modified in
306612f080e7Smrj 		 * the windowing code.
306712f080e7Smrj 		 */
306812f080e7Smrj 		dmac_size = cookie->dmac_size;
306912f080e7Smrj 
307012f080e7Smrj 		/* if we went over max copybuf size */
307112f080e7Smrj 		if (dma->dp_copybuf_size &&
307212f080e7Smrj 		    (copybuf_used > dma->dp_copybuf_size)) {
307312f080e7Smrj 			partial = B_TRUE;
307412f080e7Smrj 			e = rootnex_copybuf_window_boundary(hp, dma, &window,
307512f080e7Smrj 			    cookie, cur_offset, &copybuf_used);
307612f080e7Smrj 			if (e != DDI_SUCCESS) {
307712f080e7Smrj 				rootnex_teardown_copybuf(dma);
307812f080e7Smrj 				rootnex_teardown_windows(dma);
307912f080e7Smrj 				return (e);
308012f080e7Smrj 			}
308112f080e7Smrj 
308212f080e7Smrj 			/*
308312f080e7Smrj 			 * if the coookie uses the copy buffer, make sure the
308412f080e7Smrj 			 * new window we just moved to is set to sync.
308512f080e7Smrj 			 */
308612f080e7Smrj 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
308712f080e7Smrj 				window->wd_dosync = B_TRUE;
308812f080e7Smrj 			}
308912f080e7Smrj 			DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *,
309012f080e7Smrj 			    dma->dp_dip);
309112f080e7Smrj 
309212f080e7Smrj 		/* if the cookie cnt == max sgllen, move to the next window */
309312f080e7Smrj 		} else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) {
309412f080e7Smrj 			partial = B_TRUE;
309512f080e7Smrj 			ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen);
309612f080e7Smrj 			e = rootnex_sgllen_window_boundary(hp, dma, &window,
309712f080e7Smrj 			    cookie, attr, cur_offset);
309812f080e7Smrj 			if (e != DDI_SUCCESS) {
309912f080e7Smrj 				rootnex_teardown_copybuf(dma);
310012f080e7Smrj 				rootnex_teardown_windows(dma);
310112f080e7Smrj 				return (e);
310212f080e7Smrj 			}
310312f080e7Smrj 
310412f080e7Smrj 			/*
310512f080e7Smrj 			 * if the coookie uses the copy buffer, make sure the
310612f080e7Smrj 			 * new window we just moved to is set to sync.
310712f080e7Smrj 			 */
310812f080e7Smrj 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
310912f080e7Smrj 				window->wd_dosync = B_TRUE;
311012f080e7Smrj 			}
311112f080e7Smrj 			DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *,
311212f080e7Smrj 			    dma->dp_dip);
311312f080e7Smrj 
311412f080e7Smrj 		/* else if we will be over maxxfer */
311512f080e7Smrj 		} else if ((window->wd_size + dmac_size) >
311612f080e7Smrj 		    dma->dp_maxxfer) {
311712f080e7Smrj 			partial = B_TRUE;
311812f080e7Smrj 			e = rootnex_maxxfer_window_boundary(hp, dma, &window,
311912f080e7Smrj 			    cookie);
312012f080e7Smrj 			if (e != DDI_SUCCESS) {
312112f080e7Smrj 				rootnex_teardown_copybuf(dma);
312212f080e7Smrj 				rootnex_teardown_windows(dma);
312312f080e7Smrj 				return (e);
312412f080e7Smrj 			}
312512f080e7Smrj 
312612f080e7Smrj 			/*
312712f080e7Smrj 			 * if the coookie uses the copy buffer, make sure the
312812f080e7Smrj 			 * new window we just moved to is set to sync.
312912f080e7Smrj 			 */
313012f080e7Smrj 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
313112f080e7Smrj 				window->wd_dosync = B_TRUE;
313212f080e7Smrj 			}
313312f080e7Smrj 			DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *,
313412f080e7Smrj 			    dma->dp_dip);
313512f080e7Smrj 
313612f080e7Smrj 		/* else this cookie fits in the current window */
313712f080e7Smrj 		} else {
313812f080e7Smrj 			window->wd_cookie_cnt++;
313912f080e7Smrj 			window->wd_size += dmac_size;
314012f080e7Smrj 		}
314112f080e7Smrj 
314212f080e7Smrj 		/* track our offset into the buffer, go to the next cookie */
314312f080e7Smrj 		ASSERT(dmac_size <= dma->dp_dma.dmao_size);
314412f080e7Smrj 		ASSERT(cookie->dmac_size <= dmac_size);
314512f080e7Smrj 		cur_offset += dmac_size;
314612f080e7Smrj 		cookie++;
314712f080e7Smrj 	}
314812f080e7Smrj 
314912f080e7Smrj 	/* if we ended up with a zero sized window in the end, clean it up */
315012f080e7Smrj 	if (window->wd_size == 0) {
315112f080e7Smrj 		hp->dmai_nwin--;
315212f080e7Smrj 		window--;
315312f080e7Smrj 	}
315412f080e7Smrj 
315512f080e7Smrj 	ASSERT(window->wd_trim.tr_trim_last == B_FALSE);
315612f080e7Smrj 
315712f080e7Smrj 	if (!partial) {
315812f080e7Smrj 		return (DDI_DMA_MAPPED);
315912f080e7Smrj 	}
316012f080e7Smrj 
316112f080e7Smrj 	ASSERT(dma->dp_partial_required);
316212f080e7Smrj 	return (DDI_DMA_PARTIAL_MAP);
316312f080e7Smrj }
316412f080e7Smrj 
316512f080e7Smrj 
316612f080e7Smrj /*
316712f080e7Smrj  * rootnex_setup_copybuf()
316812f080e7Smrj  *    Called in bind slowpath. Figures out if we're going to use the copy
316912f080e7Smrj  *    buffer, and if we do, sets up the basic state to handle it.
317012f080e7Smrj  */
317112f080e7Smrj static int
317212f080e7Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
317312f080e7Smrj     rootnex_dma_t *dma, ddi_dma_attr_t *attr)
317412f080e7Smrj {
317512f080e7Smrj 	rootnex_sglinfo_t *sinfo;
317612f080e7Smrj 	ddi_dma_attr_t lattr;
317712f080e7Smrj 	size_t max_copybuf;
317812f080e7Smrj 	int cansleep;
317912f080e7Smrj 	int e;
318012f080e7Smrj #if !defined(__amd64)
318112f080e7Smrj 	int vmflag;
318212f080e7Smrj #endif
318312f080e7Smrj 
318412f080e7Smrj 
318512f080e7Smrj 	sinfo = &dma->dp_sglinfo;
318612f080e7Smrj 
318736945f79Smrj 	/* read this first so it's consistent through the routine  */
318836945f79Smrj 	max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK;
318912f080e7Smrj 
319012f080e7Smrj 	/* We need to call into the rootnex on ddi_dma_sync() */
319112f080e7Smrj 	hp->dmai_rflags &= ~DMP_NOSYNC;
319212f080e7Smrj 
319312f080e7Smrj 	/* make sure the copybuf size <= the max size */
319412f080e7Smrj 	dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf);
319512f080e7Smrj 	ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0);
319612f080e7Smrj 
319712f080e7Smrj #if !defined(__amd64)
319812f080e7Smrj 	/*
319912f080e7Smrj 	 * if we don't have kva space to copy to/from, allocate the KVA space
320012f080e7Smrj 	 * now. We only do this for the 32-bit kernel. We use seg kpm space for
320112f080e7Smrj 	 * the 64-bit kernel.
320212f080e7Smrj 	 */
320312f080e7Smrj 	if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) ||
320412f080e7Smrj 	    (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) {
320512f080e7Smrj 
320612f080e7Smrj 		/* convert the sleep flags */
320712f080e7Smrj 		if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
320812f080e7Smrj 			vmflag = VM_SLEEP;
320912f080e7Smrj 		} else {
321012f080e7Smrj 			vmflag = VM_NOSLEEP;
321112f080e7Smrj 		}
321212f080e7Smrj 
321312f080e7Smrj 		/* allocate Kernel VA space that we can bcopy to/from */
321412f080e7Smrj 		dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size,
321512f080e7Smrj 		    vmflag);
321612f080e7Smrj 		if (dma->dp_kva == NULL) {
321712f080e7Smrj 			return (DDI_DMA_NORESOURCES);
321812f080e7Smrj 		}
321912f080e7Smrj 	}
322012f080e7Smrj #endif
322112f080e7Smrj 
322212f080e7Smrj 	/* convert the sleep flags */
322312f080e7Smrj 	if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
322412f080e7Smrj 		cansleep = 1;
322512f080e7Smrj 	} else {
322612f080e7Smrj 		cansleep = 0;
322712f080e7Smrj 	}
322812f080e7Smrj 
322912f080e7Smrj 	/*
3230d21b39ddSmrj 	 * Allocate the actual copy buffer. This needs to fit within the DMA
3231d21b39ddSmrj 	 * engine limits, so we can't use kmem_alloc... We don't need
3232d21b39ddSmrj 	 * contiguous memory (sgllen) since we will be forcing windows on
3233d21b39ddSmrj 	 * sgllen anyway.
323412f080e7Smrj 	 */
323512f080e7Smrj 	lattr = *attr;
323612f080e7Smrj 	lattr.dma_attr_align = MMU_PAGESIZE;
3237d21b39ddSmrj 	/*
3238d21b39ddSmrj 	 * this should be < 0 to indicate no limit, but due to a bug in
3239d21b39ddSmrj 	 * the rootnex, we'll set it to the maximum positive int.
3240d21b39ddSmrj 	 */
3241d21b39ddSmrj 	lattr.dma_attr_sgllen = 0x7fffffff;
324207c6692fSMark Johnson 	/*
324307c6692fSMark Johnson 	 * if we're using the copy buffer because of seg, use that for our
324407c6692fSMark Johnson 	 * upper address limit.
324507c6692fSMark Johnson 	 */
324607c6692fSMark Johnson 	if (sinfo->si_bounce_on_seg) {
324707c6692fSMark Johnson 		lattr.dma_attr_addr_hi = lattr.dma_attr_seg;
324807c6692fSMark Johnson 	}
324912f080e7Smrj 	e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep,
325012f080e7Smrj 	    0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL);
325112f080e7Smrj 	if (e != DDI_SUCCESS) {
325212f080e7Smrj #if !defined(__amd64)
325312f080e7Smrj 		if (dma->dp_kva != NULL) {
325412f080e7Smrj 			vmem_free(heap_arena, dma->dp_kva,
325512f080e7Smrj 			    dma->dp_copybuf_size);
325612f080e7Smrj 		}
325712f080e7Smrj #endif
325812f080e7Smrj 		return (DDI_DMA_NORESOURCES);
325912f080e7Smrj 	}
326012f080e7Smrj 
326112f080e7Smrj 	DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip,
326212f080e7Smrj 	    size_t, dma->dp_copybuf_size);
326312f080e7Smrj 
326412f080e7Smrj 	return (DDI_SUCCESS);
326512f080e7Smrj }
326612f080e7Smrj 
326712f080e7Smrj 
326812f080e7Smrj /*
326912f080e7Smrj  * rootnex_setup_windows()
327012f080e7Smrj  *    Called in bind slowpath to setup the window state. We always have windows
327112f080e7Smrj  *    in the slowpath. Even if the window count = 1.
327212f080e7Smrj  */
327312f080e7Smrj static int
327412f080e7Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
327512f080e7Smrj     ddi_dma_attr_t *attr, int kmflag)
327612f080e7Smrj {
327712f080e7Smrj 	rootnex_window_t *windowp;
327812f080e7Smrj 	rootnex_sglinfo_t *sinfo;
327912f080e7Smrj 	size_t copy_state_size;
328012f080e7Smrj 	size_t win_state_size;
328112f080e7Smrj 	size_t state_available;
328212f080e7Smrj 	size_t space_needed;
328312f080e7Smrj 	uint_t copybuf_win;
328412f080e7Smrj 	uint_t maxxfer_win;
328512f080e7Smrj 	size_t space_used;
328612f080e7Smrj 	uint_t sglwin;
328712f080e7Smrj 
328812f080e7Smrj 
328912f080e7Smrj 	sinfo = &dma->dp_sglinfo;
329012f080e7Smrj 
329112f080e7Smrj 	dma->dp_current_win = 0;
329212f080e7Smrj 	hp->dmai_nwin = 0;
329312f080e7Smrj 
329412f080e7Smrj 	/* If we don't need to do a partial, we only have one window */
329512f080e7Smrj 	if (!dma->dp_partial_required) {
329612f080e7Smrj 		dma->dp_max_win = 1;
329712f080e7Smrj 
329812f080e7Smrj 	/*
329912f080e7Smrj 	 * we need multiple windows, need to figure out the worse case number
330012f080e7Smrj 	 * of windows.
330112f080e7Smrj 	 */
33027c478bd9Sstevel@tonic-gate 	} else {
33037c478bd9Sstevel@tonic-gate 		/*
330412f080e7Smrj 		 * if we need windows because we need more copy buffer that
330512f080e7Smrj 		 * we allow, the worse case number of windows we could need
330612f080e7Smrj 		 * here would be (copybuf space required / copybuf space that
330712f080e7Smrj 		 * we have) plus one for remainder, and plus 2 to handle the
330812f080e7Smrj 		 * extra pages on the trim for the first and last pages of the
330912f080e7Smrj 		 * buffer (a page is the minimum window size so under the right
331012f080e7Smrj 		 * attr settings, you could have a window for each page).
331112f080e7Smrj 		 * The last page will only be hit here if the size is not a
331212f080e7Smrj 		 * multiple of the granularity (which theoretically shouldn't
331312f080e7Smrj 		 * be the case but never has been enforced, so we could have
331412f080e7Smrj 		 * broken things without it).
33157c478bd9Sstevel@tonic-gate 		 */
331612f080e7Smrj 		if (sinfo->si_copybuf_req > dma->dp_copybuf_size) {
331712f080e7Smrj 			ASSERT(dma->dp_copybuf_size > 0);
331812f080e7Smrj 			copybuf_win = (sinfo->si_copybuf_req /
331912f080e7Smrj 			    dma->dp_copybuf_size) + 1 + 2;
33207c478bd9Sstevel@tonic-gate 		} else {
332112f080e7Smrj 			copybuf_win = 0;
33227c478bd9Sstevel@tonic-gate 		}
332312f080e7Smrj 
332412f080e7Smrj 		/*
332512f080e7Smrj 		 * if we need windows because we have more cookies than the H/W
332612f080e7Smrj 		 * can handle, the number of windows we would need here would
3327*b57cd2d3SMark Johnson 		 * be (cookie count / cookies count H/W supports minus 1[for
3328*b57cd2d3SMark Johnson 		 * trim]) plus one for remainder.
332912f080e7Smrj 		 */
333012f080e7Smrj 		if (attr->dma_attr_sgllen < sinfo->si_sgl_size) {
3331*b57cd2d3SMark Johnson 			sglwin = (sinfo->si_sgl_size /
3332*b57cd2d3SMark Johnson 			    (attr->dma_attr_sgllen - 1)) + 1;
33337c478bd9Sstevel@tonic-gate 		} else {
333412f080e7Smrj 			sglwin = 0;
33357c478bd9Sstevel@tonic-gate 		}
333612f080e7Smrj 
333712f080e7Smrj 		/*
333812f080e7Smrj 		 * if we need windows because we're binding more memory than the
333912f080e7Smrj 		 * H/W can transfer at once, the number of windows we would need
334012f080e7Smrj 		 * here would be (xfer count / max xfer H/W supports) plus one
334112f080e7Smrj 		 * for remainder, and plus 2 to handle the extra pages on the
334212f080e7Smrj 		 * trim (see above comment about trim)
334312f080e7Smrj 		 */
334412f080e7Smrj 		if (dma->dp_dma.dmao_size > dma->dp_maxxfer) {
334512f080e7Smrj 			maxxfer_win = (dma->dp_dma.dmao_size /
334612f080e7Smrj 			    dma->dp_maxxfer) + 1 + 2;
334712f080e7Smrj 		} else {
334812f080e7Smrj 			maxxfer_win = 0;
33497c478bd9Sstevel@tonic-gate 		}
335012f080e7Smrj 		dma->dp_max_win =  copybuf_win + sglwin + maxxfer_win;
335112f080e7Smrj 		ASSERT(dma->dp_max_win > 0);
335212f080e7Smrj 	}
335312f080e7Smrj 	win_state_size = dma->dp_max_win * sizeof (rootnex_window_t);
335412f080e7Smrj 
335512f080e7Smrj 	/*
335612f080e7Smrj 	 * Get space for window and potential copy buffer state. Before we
335712f080e7Smrj 	 * go and allocate memory, see if we can get away with using what's
335812f080e7Smrj 	 * left in the pre-allocted state or the dynamically allocated sgl.
335912f080e7Smrj 	 */
336012f080e7Smrj 	space_used = (uintptr_t)(sinfo->si_sgl_size *
336112f080e7Smrj 	    sizeof (ddi_dma_cookie_t));
336212f080e7Smrj 
336312f080e7Smrj 	/* if we dynamically allocated space for the cookies */
336412f080e7Smrj 	if (dma->dp_need_to_free_cookie) {
336512f080e7Smrj 		/* if we have more space in the pre-allocted buffer, use it */
336612f080e7Smrj 		ASSERT(space_used <= dma->dp_cookie_size);
336712f080e7Smrj 		if ((dma->dp_cookie_size - space_used) <=
336812f080e7Smrj 		    rootnex_state->r_prealloc_size) {
336912f080e7Smrj 			state_available = rootnex_state->r_prealloc_size;
337012f080e7Smrj 			windowp = (rootnex_window_t *)dma->dp_prealloc_buffer;
337112f080e7Smrj 
337212f080e7Smrj 		/*
337312f080e7Smrj 		 * else, we have more free space in the dynamically allocated
337412f080e7Smrj 		 * buffer, i.e. the buffer wasn't worse case fragmented so we
337512f080e7Smrj 		 * didn't need a lot of cookies.
337612f080e7Smrj 		 */
337712f080e7Smrj 		} else {
337812f080e7Smrj 			state_available = dma->dp_cookie_size - space_used;
337912f080e7Smrj 			windowp = (rootnex_window_t *)
338012f080e7Smrj 			    &dma->dp_cookies[sinfo->si_sgl_size];
338112f080e7Smrj 		}
338212f080e7Smrj 
338312f080e7Smrj 	/* we used the pre-alloced buffer */
338412f080e7Smrj 	} else {
338512f080e7Smrj 		ASSERT(space_used <= rootnex_state->r_prealloc_size);
338612f080e7Smrj 		state_available = rootnex_state->r_prealloc_size - space_used;
338712f080e7Smrj 		windowp = (rootnex_window_t *)
338812f080e7Smrj 		    &dma->dp_cookies[sinfo->si_sgl_size];
338912f080e7Smrj 	}
339012f080e7Smrj 
339112f080e7Smrj 	/*
339212f080e7Smrj 	 * figure out how much state we need to track the copy buffer. Add an
339312f080e7Smrj 	 * addition 8 bytes for pointer alignemnt later.
339412f080e7Smrj 	 */
339512f080e7Smrj 	if (dma->dp_copybuf_size > 0) {
339612f080e7Smrj 		copy_state_size = sinfo->si_max_pages *
339712f080e7Smrj 		    sizeof (rootnex_pgmap_t);
339812f080e7Smrj 	} else {
339912f080e7Smrj 		copy_state_size = 0;
340012f080e7Smrj 	}
340112f080e7Smrj 	/* add an additional 8 bytes for pointer alignment */
340212f080e7Smrj 	space_needed = win_state_size + copy_state_size + 0x8;
340312f080e7Smrj 
340412f080e7Smrj 	/* if we have enough space already, use it */
340512f080e7Smrj 	if (state_available >= space_needed) {
340612f080e7Smrj 		dma->dp_window = windowp;
340712f080e7Smrj 		dma->dp_need_to_free_window = B_FALSE;
340812f080e7Smrj 
340912f080e7Smrj 	/* not enough space, need to allocate more. */
341012f080e7Smrj 	} else {
341112f080e7Smrj 		dma->dp_window = kmem_alloc(space_needed, kmflag);
341212f080e7Smrj 		if (dma->dp_window == NULL) {
341312f080e7Smrj 			return (DDI_DMA_NORESOURCES);
341412f080e7Smrj 		}
341512f080e7Smrj 		dma->dp_need_to_free_window = B_TRUE;
341612f080e7Smrj 		dma->dp_window_size = space_needed;
341712f080e7Smrj 		DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *,
341812f080e7Smrj 		    dma->dp_dip, size_t, space_needed);
341912f080e7Smrj 	}
342012f080e7Smrj 
342112f080e7Smrj 	/*
342212f080e7Smrj 	 * we allocate copy buffer state and window state at the same time.
342312f080e7Smrj 	 * setup our copy buffer state pointers. Make sure it's aligned.
342412f080e7Smrj 	 */
342512f080e7Smrj 	if (dma->dp_copybuf_size > 0) {
342612f080e7Smrj 		dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t)
342712f080e7Smrj 		    &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7);
342812f080e7Smrj 
342912f080e7Smrj #if !defined(__amd64)
343012f080e7Smrj 		/*
343112f080e7Smrj 		 * make sure all pm_mapped, pm_vaddr, and pm_pp are set to
343212f080e7Smrj 		 * false/NULL. Should be quicker to bzero vs loop and set.
343312f080e7Smrj 		 */
343412f080e7Smrj 		bzero(dma->dp_pgmap, copy_state_size);
343512f080e7Smrj #endif
343612f080e7Smrj 	} else {
343712f080e7Smrj 		dma->dp_pgmap = NULL;
343812f080e7Smrj 	}
343912f080e7Smrj 
344012f080e7Smrj 	return (DDI_SUCCESS);
344112f080e7Smrj }
344212f080e7Smrj 
344312f080e7Smrj 
344412f080e7Smrj /*
344512f080e7Smrj  * rootnex_teardown_copybuf()
344612f080e7Smrj  *    cleans up after rootnex_setup_copybuf()
344712f080e7Smrj  */
344812f080e7Smrj static void
344912f080e7Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma)
345012f080e7Smrj {
345112f080e7Smrj #if !defined(__amd64)
345212f080e7Smrj 	int i;
345312f080e7Smrj 
345412f080e7Smrj 	/*
345512f080e7Smrj 	 * if we allocated kernel heap VMEM space, go through all the pages and
345612f080e7Smrj 	 * map out any of the ones that we're mapped into the kernel heap VMEM
345712f080e7Smrj 	 * arena. Then free the VMEM space.
345812f080e7Smrj 	 */
345912f080e7Smrj 	if (dma->dp_kva != NULL) {
346012f080e7Smrj 		for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) {
346112f080e7Smrj 			if (dma->dp_pgmap[i].pm_mapped) {
346212f080e7Smrj 				hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr,
346312f080e7Smrj 				    MMU_PAGESIZE, HAT_UNLOAD);
346412f080e7Smrj 				dma->dp_pgmap[i].pm_mapped = B_FALSE;
346512f080e7Smrj 			}
346612f080e7Smrj 		}
346712f080e7Smrj 
346812f080e7Smrj 		vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size);
346912f080e7Smrj 	}
347012f080e7Smrj 
347112f080e7Smrj #endif
347212f080e7Smrj 
347312f080e7Smrj 	/* if we allocated a copy buffer, free it */
347412f080e7Smrj 	if (dma->dp_cbaddr != NULL) {
34757b93957cSeota 		i_ddi_mem_free(dma->dp_cbaddr, NULL);
347612f080e7Smrj 	}
347712f080e7Smrj }
347812f080e7Smrj 
347912f080e7Smrj 
348012f080e7Smrj /*
348112f080e7Smrj  * rootnex_teardown_windows()
348212f080e7Smrj  *    cleans up after rootnex_setup_windows()
348312f080e7Smrj  */
348412f080e7Smrj static void
348512f080e7Smrj rootnex_teardown_windows(rootnex_dma_t *dma)
348612f080e7Smrj {
348712f080e7Smrj 	/*
348812f080e7Smrj 	 * if we had to allocate window state on the last bind (because we
348912f080e7Smrj 	 * didn't have enough pre-allocated space in the handle), free it.
349012f080e7Smrj 	 */
349112f080e7Smrj 	if (dma->dp_need_to_free_window) {
349212f080e7Smrj 		kmem_free(dma->dp_window, dma->dp_window_size);
349312f080e7Smrj 	}
349412f080e7Smrj }
349512f080e7Smrj 
349612f080e7Smrj 
349712f080e7Smrj /*
349812f080e7Smrj  * rootnex_init_win()
349912f080e7Smrj  *    Called in bind slow path during creation of a new window. Initializes
350012f080e7Smrj  *    window state to default values.
350112f080e7Smrj  */
350212f080e7Smrj /*ARGSUSED*/
350312f080e7Smrj static void
350412f080e7Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
350512f080e7Smrj     rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset)
350612f080e7Smrj {
350712f080e7Smrj 	hp->dmai_nwin++;
350812f080e7Smrj 	window->wd_dosync = B_FALSE;
350912f080e7Smrj 	window->wd_offset = cur_offset;
351012f080e7Smrj 	window->wd_size = 0;
351112f080e7Smrj 	window->wd_first_cookie = cookie;
351212f080e7Smrj 	window->wd_cookie_cnt = 0;
351312f080e7Smrj 	window->wd_trim.tr_trim_first = B_FALSE;
351412f080e7Smrj 	window->wd_trim.tr_trim_last = B_FALSE;
351512f080e7Smrj 	window->wd_trim.tr_first_copybuf_win = B_FALSE;
351612f080e7Smrj 	window->wd_trim.tr_last_copybuf_win = B_FALSE;
351712f080e7Smrj #if !defined(__amd64)
351812f080e7Smrj 	window->wd_remap_copybuf = dma->dp_cb_remaping;
351912f080e7Smrj #endif
352012f080e7Smrj }
352112f080e7Smrj 
352212f080e7Smrj 
352312f080e7Smrj /*
352412f080e7Smrj  * rootnex_setup_cookie()
352512f080e7Smrj  *    Called in the bind slow path when the sgl uses the copy buffer. If any of
352612f080e7Smrj  *    the sgl uses the copy buffer, we need to go through each cookie, figure
352712f080e7Smrj  *    out if it uses the copy buffer, and if it does, save away everything we'll
352812f080e7Smrj  *    need during sync.
352912f080e7Smrj  */
353012f080e7Smrj static void
353112f080e7Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma,
353212f080e7Smrj     ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used,
353312f080e7Smrj     page_t **cur_pp)
353412f080e7Smrj {
353512f080e7Smrj 	boolean_t copybuf_sz_power_2;
353612f080e7Smrj 	rootnex_sglinfo_t *sinfo;
3537843e1988Sjohnlev 	paddr_t paddr;
353812f080e7Smrj 	uint_t pidx;
353912f080e7Smrj 	uint_t pcnt;
354012f080e7Smrj 	off_t poff;
354112f080e7Smrj #if defined(__amd64)
354212f080e7Smrj 	pfn_t pfn;
354312f080e7Smrj #else
354412f080e7Smrj 	page_t **pplist;
354512f080e7Smrj #endif
354612f080e7Smrj 
354712f080e7Smrj 	sinfo = &dma->dp_sglinfo;
354812f080e7Smrj 
354912f080e7Smrj 	/*
355012f080e7Smrj 	 * Calculate the page index relative to the start of the buffer. The
355112f080e7Smrj 	 * index to the current page for our buffer is the offset into the
355212f080e7Smrj 	 * first page of the buffer plus our current offset into the buffer
355312f080e7Smrj 	 * itself, shifted of course...
355412f080e7Smrj 	 */
355512f080e7Smrj 	pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT;
355612f080e7Smrj 	ASSERT(pidx < sinfo->si_max_pages);
355712f080e7Smrj 
355812f080e7Smrj 	/* if this cookie uses the copy buffer */
355912f080e7Smrj 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
356012f080e7Smrj 		/*
356112f080e7Smrj 		 * NOTE: we know that since this cookie uses the copy buffer, it
356212f080e7Smrj 		 * is <= MMU_PAGESIZE.
356312f080e7Smrj 		 */
356412f080e7Smrj 
356512f080e7Smrj 		/*
356612f080e7Smrj 		 * get the offset into the page. For the 64-bit kernel, get the
356712f080e7Smrj 		 * pfn which we'll use with seg kpm.
356812f080e7Smrj 		 */
3569843e1988Sjohnlev 		poff = cookie->dmac_laddress & MMU_PAGEOFFSET;
357012f080e7Smrj #if defined(__amd64)
3571843e1988Sjohnlev 		/* mfn_to_pfn() is a NOP on i86pc */
3572843e1988Sjohnlev 		pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT);
3573843e1988Sjohnlev #endif /* __amd64 */
357412f080e7Smrj 
357512f080e7Smrj 		/* figure out if the copybuf size is a power of 2 */
357612f080e7Smrj 		if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) {
357712f080e7Smrj 			copybuf_sz_power_2 = B_FALSE;
357812f080e7Smrj 		} else {
357912f080e7Smrj 			copybuf_sz_power_2 = B_TRUE;
358012f080e7Smrj 		}
358112f080e7Smrj 
358212f080e7Smrj 		/* This page uses the copy buffer */
358312f080e7Smrj 		dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE;
358412f080e7Smrj 
358512f080e7Smrj 		/*
358612f080e7Smrj 		 * save the copy buffer KVA that we'll use with this page.
358712f080e7Smrj 		 * if we still fit within the copybuf, it's a simple add.
358812f080e7Smrj 		 * otherwise, we need to wrap over using & or % accordingly.
358912f080e7Smrj 		 */
359012f080e7Smrj 		if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) {
359112f080e7Smrj 			dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr +
359212f080e7Smrj 			    *copybuf_used;
359312f080e7Smrj 		} else {
359412f080e7Smrj 			if (copybuf_sz_power_2) {
359512f080e7Smrj 				dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)(
359612f080e7Smrj 				    (uintptr_t)dma->dp_cbaddr +
359712f080e7Smrj 				    (*copybuf_used &
359812f080e7Smrj 				    (dma->dp_copybuf_size - 1)));
359912f080e7Smrj 			} else {
360012f080e7Smrj 				dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)(
360112f080e7Smrj 				    (uintptr_t)dma->dp_cbaddr +
360212f080e7Smrj 				    (*copybuf_used % dma->dp_copybuf_size));
360312f080e7Smrj 			}
360412f080e7Smrj 		}
360512f080e7Smrj 
360612f080e7Smrj 		/*
360712f080e7Smrj 		 * over write the cookie physical address with the address of
360812f080e7Smrj 		 * the physical address of the copy buffer page that we will
360912f080e7Smrj 		 * use.
361012f080e7Smrj 		 */
3611843e1988Sjohnlev 		paddr = pfn_to_pa(hat_getpfnum(kas.a_hat,
361212f080e7Smrj 		    dma->dp_pgmap[pidx].pm_cbaddr)) + poff;
361312f080e7Smrj 
3614843e1988Sjohnlev #ifdef __xpv
3615843e1988Sjohnlev 		/*
3616843e1988Sjohnlev 		 * If we're dom0, we're using a real device so we need to load
3617843e1988Sjohnlev 		 * the cookies with MAs instead of PAs.
3618843e1988Sjohnlev 		 */
3619843e1988Sjohnlev 		cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
3620843e1988Sjohnlev #else
3621843e1988Sjohnlev 		cookie->dmac_laddress = paddr;
3622843e1988Sjohnlev #endif
3623843e1988Sjohnlev 
362412f080e7Smrj 		/* if we have a kernel VA, it's easy, just save that address */
362512f080e7Smrj 		if ((dmar_object->dmao_type != DMA_OTYP_PAGES) &&
362612f080e7Smrj 		    (sinfo->si_asp == &kas)) {
362712f080e7Smrj 			/*
362812f080e7Smrj 			 * save away the page aligned virtual address of the
362912f080e7Smrj 			 * driver buffer. Offsets are handled in the sync code.
363012f080e7Smrj 			 */
363112f080e7Smrj 			dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t)
363212f080e7Smrj 			    dmar_object->dmao_obj.virt_obj.v_addr + cur_offset)
363312f080e7Smrj 			    & MMU_PAGEMASK);
363412f080e7Smrj #if !defined(__amd64)
363512f080e7Smrj 			/*
363612f080e7Smrj 			 * we didn't need to, and will never need to map this
363712f080e7Smrj 			 * page.
363812f080e7Smrj 			 */
363912f080e7Smrj 			dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
364012f080e7Smrj #endif
364112f080e7Smrj 
364212f080e7Smrj 		/* we don't have a kernel VA. We need one for the bcopy. */
364312f080e7Smrj 		} else {
364412f080e7Smrj #if defined(__amd64)
364512f080e7Smrj 			/*
364612f080e7Smrj 			 * for the 64-bit kernel, it's easy. We use seg kpm to
364712f080e7Smrj 			 * get a Kernel VA for the corresponding pfn.
364812f080e7Smrj 			 */
364912f080e7Smrj 			dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn);
365012f080e7Smrj #else
365112f080e7Smrj 			/*
365212f080e7Smrj 			 * for the 32-bit kernel, this is a pain. First we'll
365312f080e7Smrj 			 * save away the page_t or user VA for this page. This
365412f080e7Smrj 			 * is needed in rootnex_dma_win() when we switch to a
365512f080e7Smrj 			 * new window which requires us to re-map the copy
365612f080e7Smrj 			 * buffer.
365712f080e7Smrj 			 */
365812f080e7Smrj 			pplist = dmar_object->dmao_obj.virt_obj.v_priv;
365912f080e7Smrj 			if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
366012f080e7Smrj 				dma->dp_pgmap[pidx].pm_pp = *cur_pp;
366112f080e7Smrj 				dma->dp_pgmap[pidx].pm_vaddr = NULL;
366212f080e7Smrj 			} else if (pplist != NULL) {
366312f080e7Smrj 				dma->dp_pgmap[pidx].pm_pp = pplist[pidx];
366412f080e7Smrj 				dma->dp_pgmap[pidx].pm_vaddr = NULL;
366512f080e7Smrj 			} else {
366612f080e7Smrj 				dma->dp_pgmap[pidx].pm_pp = NULL;
366712f080e7Smrj 				dma->dp_pgmap[pidx].pm_vaddr = (caddr_t)
366812f080e7Smrj 				    (((uintptr_t)
366912f080e7Smrj 				    dmar_object->dmao_obj.virt_obj.v_addr +
367012f080e7Smrj 				    cur_offset) & MMU_PAGEMASK);
367112f080e7Smrj 			}
367212f080e7Smrj 
367312f080e7Smrj 			/*
367412f080e7Smrj 			 * save away the page aligned virtual address which was
367512f080e7Smrj 			 * allocated from the kernel heap arena (taking into
367612f080e7Smrj 			 * account if we need more copy buffer than we alloced
367712f080e7Smrj 			 * and use multiple windows to handle this, i.e. &,%).
367812f080e7Smrj 			 * NOTE: there isn't and physical memory backing up this
367912f080e7Smrj 			 * virtual address space currently.
368012f080e7Smrj 			 */
368112f080e7Smrj 			if ((*copybuf_used + MMU_PAGESIZE) <=
368212f080e7Smrj 			    dma->dp_copybuf_size) {
368312f080e7Smrj 				dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
368412f080e7Smrj 				    (((uintptr_t)dma->dp_kva + *copybuf_used) &
368512f080e7Smrj 				    MMU_PAGEMASK);
368612f080e7Smrj 			} else {
368712f080e7Smrj 				if (copybuf_sz_power_2) {
368812f080e7Smrj 					dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
368912f080e7Smrj 					    (((uintptr_t)dma->dp_kva +
369012f080e7Smrj 					    (*copybuf_used &
369112f080e7Smrj 					    (dma->dp_copybuf_size - 1))) &
369212f080e7Smrj 					    MMU_PAGEMASK);
369312f080e7Smrj 				} else {
369412f080e7Smrj 					dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
369512f080e7Smrj 					    (((uintptr_t)dma->dp_kva +
369612f080e7Smrj 					    (*copybuf_used %
369712f080e7Smrj 					    dma->dp_copybuf_size)) &
369812f080e7Smrj 					    MMU_PAGEMASK);
369912f080e7Smrj 				}
370012f080e7Smrj 			}
370112f080e7Smrj 
370212f080e7Smrj 			/*
370312f080e7Smrj 			 * if we haven't used up the available copy buffer yet,
370412f080e7Smrj 			 * map the kva to the physical page.
370512f080e7Smrj 			 */
370612f080e7Smrj 			if (!dma->dp_cb_remaping && ((*copybuf_used +
370712f080e7Smrj 			    MMU_PAGESIZE) <= dma->dp_copybuf_size)) {
370812f080e7Smrj 				dma->dp_pgmap[pidx].pm_mapped = B_TRUE;
370912f080e7Smrj 				if (dma->dp_pgmap[pidx].pm_pp != NULL) {
371012f080e7Smrj 					i86_pp_map(dma->dp_pgmap[pidx].pm_pp,
371112f080e7Smrj 					    dma->dp_pgmap[pidx].pm_kaddr);
371212f080e7Smrj 				} else {
371312f080e7Smrj 					i86_va_map(dma->dp_pgmap[pidx].pm_vaddr,
371412f080e7Smrj 					    sinfo->si_asp,
371512f080e7Smrj 					    dma->dp_pgmap[pidx].pm_kaddr);
371612f080e7Smrj 				}
371712f080e7Smrj 
371812f080e7Smrj 			/*
371912f080e7Smrj 			 * we've used up the available copy buffer, this page
372012f080e7Smrj 			 * will have to be mapped during rootnex_dma_win() when
372112f080e7Smrj 			 * we switch to a new window which requires a re-map
372212f080e7Smrj 			 * the copy buffer. (32-bit kernel only)
372312f080e7Smrj 			 */
372412f080e7Smrj 			} else {
372512f080e7Smrj 				dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
372612f080e7Smrj 			}
372712f080e7Smrj #endif
372812f080e7Smrj 			/* go to the next page_t */
372912f080e7Smrj 			if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
373012f080e7Smrj 				*cur_pp = (*cur_pp)->p_next;
373112f080e7Smrj 			}
373212f080e7Smrj 		}
373312f080e7Smrj 
373412f080e7Smrj 		/* add to the copy buffer count */
373512f080e7Smrj 		*copybuf_used += MMU_PAGESIZE;
373612f080e7Smrj 
373712f080e7Smrj 	/*
373812f080e7Smrj 	 * This cookie doesn't use the copy buffer. Walk through the pages this
373912f080e7Smrj 	 * cookie occupies to reflect this.
374012f080e7Smrj 	 */
374112f080e7Smrj 	} else {
374212f080e7Smrj 		/*
374312f080e7Smrj 		 * figure out how many pages the cookie occupies. We need to
374412f080e7Smrj 		 * use the original page offset of the buffer and the cookies
374512f080e7Smrj 		 * offset in the buffer to do this.
374612f080e7Smrj 		 */
374712f080e7Smrj 		poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET;
374812f080e7Smrj 		pcnt = mmu_btopr(cookie->dmac_size + poff);
374912f080e7Smrj 
375012f080e7Smrj 		while (pcnt > 0) {
375112f080e7Smrj #if !defined(__amd64)
375212f080e7Smrj 			/*
375312f080e7Smrj 			 * the 32-bit kernel doesn't have seg kpm, so we need
375412f080e7Smrj 			 * to map in the driver buffer (if it didn't come down
375512f080e7Smrj 			 * with a kernel VA) on the fly. Since this page doesn't
375612f080e7Smrj 			 * use the copy buffer, it's not, or will it ever, have
375712f080e7Smrj 			 * to be mapped in.
375812f080e7Smrj 			 */
375912f080e7Smrj 			dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
376012f080e7Smrj #endif
376112f080e7Smrj 			dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE;
376212f080e7Smrj 
376312f080e7Smrj 			/*
376412f080e7Smrj 			 * we need to update pidx and cur_pp or we'll loose
376512f080e7Smrj 			 * track of where we are.
376612f080e7Smrj 			 */
376712f080e7Smrj 			if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
376812f080e7Smrj 				*cur_pp = (*cur_pp)->p_next;
376912f080e7Smrj 			}
377012f080e7Smrj 			pidx++;
377112f080e7Smrj 			pcnt--;
377212f080e7Smrj 		}
377312f080e7Smrj 	}
377412f080e7Smrj }
377512f080e7Smrj 
377612f080e7Smrj 
377712f080e7Smrj /*
377812f080e7Smrj  * rootnex_sgllen_window_boundary()
377912f080e7Smrj  *    Called in the bind slow path when the next cookie causes us to exceed (in
378012f080e7Smrj  *    this case == since we start at 0 and sgllen starts at 1) the maximum sgl
378112f080e7Smrj  *    length supported by the DMA H/W.
378212f080e7Smrj  */
378312f080e7Smrj static int
378412f080e7Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
378512f080e7Smrj     rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr,
378612f080e7Smrj     off_t cur_offset)
378712f080e7Smrj {
378812f080e7Smrj 	off_t new_offset;
378912f080e7Smrj 	size_t trim_sz;
379012f080e7Smrj 	off_t coffset;
379112f080e7Smrj 
379212f080e7Smrj 
379312f080e7Smrj 	/*
379412f080e7Smrj 	 * if we know we'll never have to trim, it's pretty easy. Just move to
379512f080e7Smrj 	 * the next window and init it. We're done.
379612f080e7Smrj 	 */
379712f080e7Smrj 	if (!dma->dp_trim_required) {
379812f080e7Smrj 		(*windowp)++;
379912f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
380012f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
380112f080e7Smrj 		(*windowp)->wd_size = cookie->dmac_size;
380212f080e7Smrj 		return (DDI_SUCCESS);
380312f080e7Smrj 	}
380412f080e7Smrj 
380512f080e7Smrj 	/* figure out how much we need to trim from the window */
380612f080e7Smrj 	ASSERT(attr->dma_attr_granular != 0);
380712f080e7Smrj 	if (dma->dp_granularity_power_2) {
380812f080e7Smrj 		trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1);
380912f080e7Smrj 	} else {
381012f080e7Smrj 		trim_sz = (*windowp)->wd_size % attr->dma_attr_granular;
381112f080e7Smrj 	}
381212f080e7Smrj 
381312f080e7Smrj 	/* The window's a whole multiple of granularity. We're done */
381412f080e7Smrj 	if (trim_sz == 0) {
381512f080e7Smrj 		(*windowp)++;
381612f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
381712f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
381812f080e7Smrj 		(*windowp)->wd_size = cookie->dmac_size;
381912f080e7Smrj 		return (DDI_SUCCESS);
382012f080e7Smrj 	}
382112f080e7Smrj 
382212f080e7Smrj 	/*
382312f080e7Smrj 	 * The window's not a whole multiple of granularity, since we know this
382412f080e7Smrj 	 * is due to the sgllen, we need to go back to the last cookie and trim
382512f080e7Smrj 	 * that one, add the left over part of the old cookie into the new
382612f080e7Smrj 	 * window, and then add in the new cookie into the new window.
382712f080e7Smrj 	 */
382812f080e7Smrj 
382912f080e7Smrj 	/*
383012f080e7Smrj 	 * make sure the driver isn't making us do something bad... Trimming and
383112f080e7Smrj 	 * sgllen == 1 don't go together.
383212f080e7Smrj 	 */
383312f080e7Smrj 	if (attr->dma_attr_sgllen == 1) {
383412f080e7Smrj 		return (DDI_DMA_NOMAPPING);
383512f080e7Smrj 	}
383612f080e7Smrj 
383712f080e7Smrj 	/*
383812f080e7Smrj 	 * first, setup the current window to account for the trim. Need to go
383912f080e7Smrj 	 * back to the last cookie for this.
384012f080e7Smrj 	 */
384112f080e7Smrj 	cookie--;
384212f080e7Smrj 	(*windowp)->wd_trim.tr_trim_last = B_TRUE;
384312f080e7Smrj 	(*windowp)->wd_trim.tr_last_cookie = cookie;
3844843e1988Sjohnlev 	(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
384512f080e7Smrj 	ASSERT(cookie->dmac_size > trim_sz);
384612f080e7Smrj 	(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
384712f080e7Smrj 	(*windowp)->wd_size -= trim_sz;
384812f080e7Smrj 
384912f080e7Smrj 	/* save the buffer offsets for the next window */
385012f080e7Smrj 	coffset = cookie->dmac_size - trim_sz;
385112f080e7Smrj 	new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
385212f080e7Smrj 
385312f080e7Smrj 	/*
385412f080e7Smrj 	 * set this now in case this is the first window. all other cases are
385512f080e7Smrj 	 * set in dma_win()
385612f080e7Smrj 	 */
385712f080e7Smrj 	cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
385812f080e7Smrj 
385912f080e7Smrj 	/*
386012f080e7Smrj 	 * initialize the next window using what's left over in the previous
386112f080e7Smrj 	 * cookie.
386212f080e7Smrj 	 */
386312f080e7Smrj 	(*windowp)++;
386412f080e7Smrj 	rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
386512f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
386612f080e7Smrj 	(*windowp)->wd_trim.tr_trim_first = B_TRUE;
3867843e1988Sjohnlev 	(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset;
386812f080e7Smrj 	(*windowp)->wd_trim.tr_first_size = trim_sz;
386912f080e7Smrj 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
387012f080e7Smrj 		(*windowp)->wd_dosync = B_TRUE;
387112f080e7Smrj 	}
387212f080e7Smrj 
387312f080e7Smrj 	/*
387412f080e7Smrj 	 * now go back to the current cookie and add it to the new window. set
387512f080e7Smrj 	 * the new window size to the what was left over from the previous
387612f080e7Smrj 	 * cookie and what's in the current cookie.
387712f080e7Smrj 	 */
387812f080e7Smrj 	cookie++;
387912f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
388012f080e7Smrj 	(*windowp)->wd_size = trim_sz + cookie->dmac_size;
388112f080e7Smrj 
388212f080e7Smrj 	/*
388312f080e7Smrj 	 * trim plus the next cookie could put us over maxxfer (a cookie can be
388412f080e7Smrj 	 * a max size of maxxfer). Handle that case.
388512f080e7Smrj 	 */
388612f080e7Smrj 	if ((*windowp)->wd_size > dma->dp_maxxfer) {
388712f080e7Smrj 		/*
388812f080e7Smrj 		 * maxxfer is already a whole multiple of granularity, and this
388912f080e7Smrj 		 * trim will be <= the previous trim (since a cookie can't be
389012f080e7Smrj 		 * larger than maxxfer). Make things simple here.
389112f080e7Smrj 		 */
389212f080e7Smrj 		trim_sz = (*windowp)->wd_size - dma->dp_maxxfer;
389312f080e7Smrj 		(*windowp)->wd_trim.tr_trim_last = B_TRUE;
389412f080e7Smrj 		(*windowp)->wd_trim.tr_last_cookie = cookie;
3895843e1988Sjohnlev 		(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
389612f080e7Smrj 		(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
389712f080e7Smrj 		(*windowp)->wd_size -= trim_sz;
389812f080e7Smrj 		ASSERT((*windowp)->wd_size == dma->dp_maxxfer);
389912f080e7Smrj 
390012f080e7Smrj 		/* save the buffer offsets for the next window */
390112f080e7Smrj 		coffset = cookie->dmac_size - trim_sz;
390212f080e7Smrj 		new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
390312f080e7Smrj 
390412f080e7Smrj 		/* setup the next window */
390512f080e7Smrj 		(*windowp)++;
390612f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
390712f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
390812f080e7Smrj 		(*windowp)->wd_trim.tr_trim_first = B_TRUE;
3909843e1988Sjohnlev 		(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress +
391012f080e7Smrj 		    coffset;
391112f080e7Smrj 		(*windowp)->wd_trim.tr_first_size = trim_sz;
391212f080e7Smrj 	}
391312f080e7Smrj 
391412f080e7Smrj 	return (DDI_SUCCESS);
391512f080e7Smrj }
391612f080e7Smrj 
391712f080e7Smrj 
391812f080e7Smrj /*
391912f080e7Smrj  * rootnex_copybuf_window_boundary()
392012f080e7Smrj  *    Called in bind slowpath when we get to a window boundary because we used
392112f080e7Smrj  *    up all the copy buffer that we have.
392212f080e7Smrj  */
392312f080e7Smrj static int
392412f080e7Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
392512f080e7Smrj     rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset,
392612f080e7Smrj     size_t *copybuf_used)
392712f080e7Smrj {
392812f080e7Smrj 	rootnex_sglinfo_t *sinfo;
392912f080e7Smrj 	off_t new_offset;
393012f080e7Smrj 	size_t trim_sz;
3931843e1988Sjohnlev 	paddr_t paddr;
393212f080e7Smrj 	off_t coffset;
393312f080e7Smrj 	uint_t pidx;
393412f080e7Smrj 	off_t poff;
393512f080e7Smrj 
393612f080e7Smrj 
393712f080e7Smrj 	sinfo = &dma->dp_sglinfo;
393812f080e7Smrj 
393912f080e7Smrj 	/*
394012f080e7Smrj 	 * the copy buffer should be a whole multiple of page size. We know that
394112f080e7Smrj 	 * this cookie is <= MMU_PAGESIZE.
394212f080e7Smrj 	 */
394312f080e7Smrj 	ASSERT(cookie->dmac_size <= MMU_PAGESIZE);
394412f080e7Smrj 
394512f080e7Smrj 	/*
394612f080e7Smrj 	 * from now on, all new windows in this bind need to be re-mapped during
394712f080e7Smrj 	 * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf
394812f080e7Smrj 	 * space...
394912f080e7Smrj 	 */
395012f080e7Smrj #if !defined(__amd64)
395112f080e7Smrj 	dma->dp_cb_remaping = B_TRUE;
395212f080e7Smrj #endif
395312f080e7Smrj 
395412f080e7Smrj 	/* reset copybuf used */
395512f080e7Smrj 	*copybuf_used = 0;
395612f080e7Smrj 
395712f080e7Smrj 	/*
395812f080e7Smrj 	 * if we don't have to trim (since granularity is set to 1), go to the
395912f080e7Smrj 	 * next window and add the current cookie to it. We know the current
396012f080e7Smrj 	 * cookie uses the copy buffer since we're in this code path.
396112f080e7Smrj 	 */
396212f080e7Smrj 	if (!dma->dp_trim_required) {
396312f080e7Smrj 		(*windowp)++;
396412f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
396512f080e7Smrj 
396612f080e7Smrj 		/* Add this cookie to the new window */
396712f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
396812f080e7Smrj 		(*windowp)->wd_size += cookie->dmac_size;
396912f080e7Smrj 		*copybuf_used += MMU_PAGESIZE;
397012f080e7Smrj 		return (DDI_SUCCESS);
397112f080e7Smrj 	}
397212f080e7Smrj 
397312f080e7Smrj 	/*
397412f080e7Smrj 	 * *** may need to trim, figure it out.
397512f080e7Smrj 	 */
397612f080e7Smrj 
397712f080e7Smrj 	/* figure out how much we need to trim from the window */
397812f080e7Smrj 	if (dma->dp_granularity_power_2) {
397912f080e7Smrj 		trim_sz = (*windowp)->wd_size &
398012f080e7Smrj 		    (hp->dmai_attr.dma_attr_granular - 1);
398112f080e7Smrj 	} else {
398212f080e7Smrj 		trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular;
398312f080e7Smrj 	}
398412f080e7Smrj 
398512f080e7Smrj 	/*
398612f080e7Smrj 	 * if the window's a whole multiple of granularity, go to the next
398712f080e7Smrj 	 * window, init it, then add in the current cookie. We know the current
398812f080e7Smrj 	 * cookie uses the copy buffer since we're in this code path.
398912f080e7Smrj 	 */
399012f080e7Smrj 	if (trim_sz == 0) {
399112f080e7Smrj 		(*windowp)++;
399212f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
399312f080e7Smrj 
399412f080e7Smrj 		/* Add this cookie to the new window */
399512f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
399612f080e7Smrj 		(*windowp)->wd_size += cookie->dmac_size;
399712f080e7Smrj 		*copybuf_used += MMU_PAGESIZE;
399812f080e7Smrj 		return (DDI_SUCCESS);
399912f080e7Smrj 	}
400012f080e7Smrj 
400112f080e7Smrj 	/*
400212f080e7Smrj 	 * *** We figured it out, we definitly need to trim
400312f080e7Smrj 	 */
400412f080e7Smrj 
400512f080e7Smrj 	/*
400612f080e7Smrj 	 * make sure the driver isn't making us do something bad...
400712f080e7Smrj 	 * Trimming and sgllen == 1 don't go together.
400812f080e7Smrj 	 */
400912f080e7Smrj 	if (hp->dmai_attr.dma_attr_sgllen == 1) {
401012f080e7Smrj 		return (DDI_DMA_NOMAPPING);
401112f080e7Smrj 	}
401212f080e7Smrj 
401312f080e7Smrj 	/*
401412f080e7Smrj 	 * first, setup the current window to account for the trim. Need to go
401512f080e7Smrj 	 * back to the last cookie for this. Some of the last cookie will be in
401612f080e7Smrj 	 * the current window, and some of the last cookie will be in the new
401712f080e7Smrj 	 * window. All of the current cookie will be in the new window.
401812f080e7Smrj 	 */
401912f080e7Smrj 	cookie--;
402012f080e7Smrj 	(*windowp)->wd_trim.tr_trim_last = B_TRUE;
402112f080e7Smrj 	(*windowp)->wd_trim.tr_last_cookie = cookie;
4022843e1988Sjohnlev 	(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
402312f080e7Smrj 	ASSERT(cookie->dmac_size > trim_sz);
402412f080e7Smrj 	(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
402512f080e7Smrj 	(*windowp)->wd_size -= trim_sz;
402612f080e7Smrj 
402712f080e7Smrj 	/*
402812f080e7Smrj 	 * we're trimming the last cookie (not the current cookie). So that
402912f080e7Smrj 	 * last cookie may have or may not have been using the copy buffer (
403012f080e7Smrj 	 * we know the cookie passed in uses the copy buffer since we're in
403112f080e7Smrj 	 * this code path).
403212f080e7Smrj 	 *
403312f080e7Smrj 	 * If the last cookie doesn't use the copy buffer, nothing special to
403412f080e7Smrj 	 * do. However, if it does uses the copy buffer, it will be both the
403512f080e7Smrj 	 * last page in the current window and the first page in the next
403612f080e7Smrj 	 * window. Since we are reusing the copy buffer (and KVA space on the
403712f080e7Smrj 	 * 32-bit kernel), this page will use the end of the copy buffer in the
403812f080e7Smrj 	 * current window, and the start of the copy buffer in the next window.
403912f080e7Smrj 	 * Track that info... The cookie physical address was already set to
404012f080e7Smrj 	 * the copy buffer physical address in setup_cookie..
404112f080e7Smrj 	 */
404212f080e7Smrj 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
404312f080e7Smrj 		pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset +
404412f080e7Smrj 		    (*windowp)->wd_size) >> MMU_PAGESHIFT;
404512f080e7Smrj 		(*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE;
404612f080e7Smrj 		(*windowp)->wd_trim.tr_last_pidx = pidx;
404712f080e7Smrj 		(*windowp)->wd_trim.tr_last_cbaddr =
404812f080e7Smrj 		    dma->dp_pgmap[pidx].pm_cbaddr;
404912f080e7Smrj #if !defined(__amd64)
405012f080e7Smrj 		(*windowp)->wd_trim.tr_last_kaddr =
405112f080e7Smrj 		    dma->dp_pgmap[pidx].pm_kaddr;
405212f080e7Smrj #endif
405312f080e7Smrj 	}
405412f080e7Smrj 
405512f080e7Smrj 	/* save the buffer offsets for the next window */
405612f080e7Smrj 	coffset = cookie->dmac_size - trim_sz;
405712f080e7Smrj 	new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
405812f080e7Smrj 
405912f080e7Smrj 	/*
406012f080e7Smrj 	 * set this now in case this is the first window. all other cases are
406112f080e7Smrj 	 * set in dma_win()
406212f080e7Smrj 	 */
406312f080e7Smrj 	cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
406412f080e7Smrj 
406512f080e7Smrj 	/*
406612f080e7Smrj 	 * initialize the next window using what's left over in the previous
406712f080e7Smrj 	 * cookie.
406812f080e7Smrj 	 */
406912f080e7Smrj 	(*windowp)++;
407012f080e7Smrj 	rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
407112f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
407212f080e7Smrj 	(*windowp)->wd_trim.tr_trim_first = B_TRUE;
4073843e1988Sjohnlev 	(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset;
407412f080e7Smrj 	(*windowp)->wd_trim.tr_first_size = trim_sz;
407512f080e7Smrj 
407612f080e7Smrj 	/*
407712f080e7Smrj 	 * again, we're tracking if the last cookie uses the copy buffer.
407812f080e7Smrj 	 * read the comment above for more info on why we need to track
407912f080e7Smrj 	 * additional state.
408012f080e7Smrj 	 *
408112f080e7Smrj 	 * For the first cookie in the new window, we need reset the physical
408212f080e7Smrj 	 * address to DMA into to the start of the copy buffer plus any
408312f080e7Smrj 	 * initial page offset which may be present.
408412f080e7Smrj 	 */
408512f080e7Smrj 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
408612f080e7Smrj 		(*windowp)->wd_dosync = B_TRUE;
408712f080e7Smrj 		(*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE;
408812f080e7Smrj 		(*windowp)->wd_trim.tr_first_pidx = pidx;
408912f080e7Smrj 		(*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr;
409012f080e7Smrj 		poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET;
4091843e1988Sjohnlev 
4092843e1988Sjohnlev 		paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) +
4093843e1988Sjohnlev 		    poff;
4094843e1988Sjohnlev #ifdef __xpv
4095843e1988Sjohnlev 		/*
4096843e1988Sjohnlev 		 * If we're dom0, we're using a real device so we need to load
4097843e1988Sjohnlev 		 * the cookies with MAs instead of PAs.
4098843e1988Sjohnlev 		 */
4099843e1988Sjohnlev 		(*windowp)->wd_trim.tr_first_paddr =
4100843e1988Sjohnlev 		    ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
4101843e1988Sjohnlev #else
4102843e1988Sjohnlev 		(*windowp)->wd_trim.tr_first_paddr = paddr;
4103843e1988Sjohnlev #endif
4104843e1988Sjohnlev 
410512f080e7Smrj #if !defined(__amd64)
410612f080e7Smrj 		(*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva;
410712f080e7Smrj #endif
410812f080e7Smrj 		/* account for the cookie copybuf usage in the new window */
410912f080e7Smrj 		*copybuf_used += MMU_PAGESIZE;
411012f080e7Smrj 
411112f080e7Smrj 		/*
411212f080e7Smrj 		 * every piece of code has to have a hack, and here is this
411312f080e7Smrj 		 * ones :-)
411412f080e7Smrj 		 *
411512f080e7Smrj 		 * There is a complex interaction between setup_cookie and the
411612f080e7Smrj 		 * copybuf window boundary. The complexity had to be in either
411712f080e7Smrj 		 * the maxxfer window, or the copybuf window, and I chose the
411812f080e7Smrj 		 * copybuf code.
411912f080e7Smrj 		 *
412012f080e7Smrj 		 * So in this code path, we have taken the last cookie,
412112f080e7Smrj 		 * virtually broken it in half due to the trim, and it happens
412212f080e7Smrj 		 * to use the copybuf which further complicates life. At the
412312f080e7Smrj 		 * same time, we have already setup the current cookie, which
412412f080e7Smrj 		 * is now wrong. More background info: the current cookie uses
412512f080e7Smrj 		 * the copybuf, so it is only a page long max. So we need to
412612f080e7Smrj 		 * fix the current cookies copy buffer address, physical
412712f080e7Smrj 		 * address, and kva for the 32-bit kernel. We due this by
412812f080e7Smrj 		 * bumping them by page size (of course, we can't due this on
412912f080e7Smrj 		 * the physical address since the copy buffer may not be
413012f080e7Smrj 		 * physically contiguous).
413112f080e7Smrj 		 */
413212f080e7Smrj 		cookie++;
413312f080e7Smrj 		dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE;
4134843e1988Sjohnlev 		poff = cookie->dmac_laddress & MMU_PAGEOFFSET;
4135843e1988Sjohnlev 
4136843e1988Sjohnlev 		paddr = pfn_to_pa(hat_getpfnum(kas.a_hat,
413712f080e7Smrj 		    dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff;
4138843e1988Sjohnlev #ifdef __xpv
4139843e1988Sjohnlev 		/*
4140843e1988Sjohnlev 		 * If we're dom0, we're using a real device so we need to load
4141843e1988Sjohnlev 		 * the cookies with MAs instead of PAs.
4142843e1988Sjohnlev 		 */
4143843e1988Sjohnlev 		cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
4144843e1988Sjohnlev #else
4145843e1988Sjohnlev 		cookie->dmac_laddress = paddr;
4146843e1988Sjohnlev #endif
4147843e1988Sjohnlev 
414812f080e7Smrj #if !defined(__amd64)
414912f080e7Smrj 		ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE);
415012f080e7Smrj 		dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE;
415112f080e7Smrj #endif
415212f080e7Smrj 	} else {
415312f080e7Smrj 		/* go back to the current cookie */
415412f080e7Smrj 		cookie++;
415512f080e7Smrj 	}
415612f080e7Smrj 
415712f080e7Smrj 	/*
415812f080e7Smrj 	 * add the current cookie to the new window. set the new window size to
415912f080e7Smrj 	 * the what was left over from the previous cookie and what's in the
416012f080e7Smrj 	 * current cookie.
416112f080e7Smrj 	 */
416212f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
416312f080e7Smrj 	(*windowp)->wd_size = trim_sz + cookie->dmac_size;
416412f080e7Smrj 	ASSERT((*windowp)->wd_size < dma->dp_maxxfer);
416512f080e7Smrj 
416612f080e7Smrj 	/*
416712f080e7Smrj 	 * we know that the cookie passed in always uses the copy buffer. We
416812f080e7Smrj 	 * wouldn't be here if it didn't.
416912f080e7Smrj 	 */
417012f080e7Smrj 	*copybuf_used += MMU_PAGESIZE;
417112f080e7Smrj 
417212f080e7Smrj 	return (DDI_SUCCESS);
417312f080e7Smrj }
417412f080e7Smrj 
417512f080e7Smrj 
417612f080e7Smrj /*
417712f080e7Smrj  * rootnex_maxxfer_window_boundary()
417812f080e7Smrj  *    Called in bind slowpath when we get to a window boundary because we will
417912f080e7Smrj  *    go over maxxfer.
418012f080e7Smrj  */
418112f080e7Smrj static int
418212f080e7Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
418312f080e7Smrj     rootnex_window_t **windowp, ddi_dma_cookie_t *cookie)
418412f080e7Smrj {
418512f080e7Smrj 	size_t dmac_size;
418612f080e7Smrj 	off_t new_offset;
418712f080e7Smrj 	size_t trim_sz;
418812f080e7Smrj 	off_t coffset;
418912f080e7Smrj 
419012f080e7Smrj 
419112f080e7Smrj 	/*
419212f080e7Smrj 	 * calculate how much we have to trim off of the current cookie to equal
419312f080e7Smrj 	 * maxxfer. We don't have to account for granularity here since our
419412f080e7Smrj 	 * maxxfer already takes that into account.
419512f080e7Smrj 	 */
419612f080e7Smrj 	trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer;
419712f080e7Smrj 	ASSERT(trim_sz <= cookie->dmac_size);
419812f080e7Smrj 	ASSERT(trim_sz <= dma->dp_maxxfer);
419912f080e7Smrj 
420012f080e7Smrj 	/* save cookie size since we need it later and we might change it */
420112f080e7Smrj 	dmac_size = cookie->dmac_size;
420212f080e7Smrj 
420312f080e7Smrj 	/*
420412f080e7Smrj 	 * if we're not trimming the entire cookie, setup the current window to
420512f080e7Smrj 	 * account for the trim.
420612f080e7Smrj 	 */
420712f080e7Smrj 	if (trim_sz < cookie->dmac_size) {
420812f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
420912f080e7Smrj 		(*windowp)->wd_trim.tr_trim_last = B_TRUE;
421012f080e7Smrj 		(*windowp)->wd_trim.tr_last_cookie = cookie;
4211843e1988Sjohnlev 		(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
421212f080e7Smrj 		(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
421312f080e7Smrj 		(*windowp)->wd_size = dma->dp_maxxfer;
421412f080e7Smrj 
421512f080e7Smrj 		/*
421612f080e7Smrj 		 * set the adjusted cookie size now in case this is the first
421712f080e7Smrj 		 * window. All other windows are taken care of in get win
421812f080e7Smrj 		 */
421912f080e7Smrj 		cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
422012f080e7Smrj 	}
422112f080e7Smrj 
422212f080e7Smrj 	/*
422312f080e7Smrj 	 * coffset is the current offset within the cookie, new_offset is the
422412f080e7Smrj 	 * current offset with the entire buffer.
422512f080e7Smrj 	 */
422612f080e7Smrj 	coffset = dmac_size - trim_sz;
422712f080e7Smrj 	new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
422812f080e7Smrj 
422912f080e7Smrj 	/* initialize the next window */
423012f080e7Smrj 	(*windowp)++;
423112f080e7Smrj 	rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
423212f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
423312f080e7Smrj 	(*windowp)->wd_size = trim_sz;
423412f080e7Smrj 	if (trim_sz < dmac_size) {
423512f080e7Smrj 		(*windowp)->wd_trim.tr_trim_first = B_TRUE;
4236843e1988Sjohnlev 		(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress +
423712f080e7Smrj 		    coffset;
423812f080e7Smrj 		(*windowp)->wd_trim.tr_first_size = trim_sz;
423912f080e7Smrj 	}
424012f080e7Smrj 
424112f080e7Smrj 	return (DDI_SUCCESS);
424212f080e7Smrj }
424312f080e7Smrj 
424412f080e7Smrj 
424512f080e7Smrj /*ARGSUSED*/
424612f080e7Smrj static int
424720906b23SVikram Hegde rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
424812f080e7Smrj     off_t off, size_t len, uint_t cache_flags)
424912f080e7Smrj {
425012f080e7Smrj 	rootnex_sglinfo_t *sinfo;
425112f080e7Smrj 	rootnex_pgmap_t *cbpage;
425212f080e7Smrj 	rootnex_window_t *win;
425312f080e7Smrj 	ddi_dma_impl_t *hp;
425412f080e7Smrj 	rootnex_dma_t *dma;
425512f080e7Smrj 	caddr_t fromaddr;
425612f080e7Smrj 	caddr_t toaddr;
425712f080e7Smrj 	uint_t psize;
425812f080e7Smrj 	off_t offset;
425912f080e7Smrj 	uint_t pidx;
426012f080e7Smrj 	size_t size;
426112f080e7Smrj 	off_t poff;
426212f080e7Smrj 	int e;
426312f080e7Smrj 
426412f080e7Smrj 
426512f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
426612f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
426712f080e7Smrj 	sinfo = &dma->dp_sglinfo;
426812f080e7Smrj 
426912f080e7Smrj 	/*
427012f080e7Smrj 	 * if we don't have any windows, we don't need to sync. A copybuf
427112f080e7Smrj 	 * will cause us to have at least one window.
427212f080e7Smrj 	 */
427312f080e7Smrj 	if (dma->dp_window == NULL) {
427412f080e7Smrj 		return (DDI_SUCCESS);
427512f080e7Smrj 	}
427612f080e7Smrj 
427712f080e7Smrj 	/* This window may not need to be sync'd */
427812f080e7Smrj 	win = &dma->dp_window[dma->dp_current_win];
427912f080e7Smrj 	if (!win->wd_dosync) {
428012f080e7Smrj 		return (DDI_SUCCESS);
428112f080e7Smrj 	}
428212f080e7Smrj 
428312f080e7Smrj 	/* handle off and len special cases */
428412f080e7Smrj 	if ((off == 0) || (rootnex_sync_ignore_params)) {
428512f080e7Smrj 		offset = win->wd_offset;
428612f080e7Smrj 	} else {
428712f080e7Smrj 		offset = off;
428812f080e7Smrj 	}
428912f080e7Smrj 	if ((len == 0) || (rootnex_sync_ignore_params)) {
429012f080e7Smrj 		size = win->wd_size;
429112f080e7Smrj 	} else {
429212f080e7Smrj 		size = len;
429312f080e7Smrj 	}
429412f080e7Smrj 
429512f080e7Smrj 	/* check the sync args to make sure they make a little sense */
429612f080e7Smrj 	if (rootnex_sync_check_parms) {
429712f080e7Smrj 		e = rootnex_valid_sync_parms(hp, win, offset, size,
429812f080e7Smrj 		    cache_flags);
429912f080e7Smrj 		if (e != DDI_SUCCESS) {
430012f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]);
430112f080e7Smrj 			return (DDI_FAILURE);
430212f080e7Smrj 		}
430312f080e7Smrj 	}
430412f080e7Smrj 
430512f080e7Smrj 	/*
430612f080e7Smrj 	 * special case the first page to handle the offset into the page. The
430712f080e7Smrj 	 * offset to the current page for our buffer is the offset into the
430812f080e7Smrj 	 * first page of the buffer plus our current offset into the buffer
430912f080e7Smrj 	 * itself, masked of course.
431012f080e7Smrj 	 */
431112f080e7Smrj 	poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET;
431212f080e7Smrj 	psize = MIN((MMU_PAGESIZE - poff), size);
431312f080e7Smrj 
431412f080e7Smrj 	/* go through all the pages that we want to sync */
431512f080e7Smrj 	while (size > 0) {
431612f080e7Smrj 		/*
431712f080e7Smrj 		 * Calculate the page index relative to the start of the buffer.
431812f080e7Smrj 		 * The index to the current page for our buffer is the offset
431912f080e7Smrj 		 * into the first page of the buffer plus our current offset
432012f080e7Smrj 		 * into the buffer itself, shifted of course...
432112f080e7Smrj 		 */
432212f080e7Smrj 		pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT;
432312f080e7Smrj 		ASSERT(pidx < sinfo->si_max_pages);
432412f080e7Smrj 
432512f080e7Smrj 		/*
432612f080e7Smrj 		 * if this page uses the copy buffer, we need to sync it,
432712f080e7Smrj 		 * otherwise, go on to the next page.
432812f080e7Smrj 		 */
432912f080e7Smrj 		cbpage = &dma->dp_pgmap[pidx];
433012f080e7Smrj 		ASSERT((cbpage->pm_uses_copybuf == B_TRUE) ||
433112f080e7Smrj 		    (cbpage->pm_uses_copybuf == B_FALSE));
433212f080e7Smrj 		if (cbpage->pm_uses_copybuf) {
433312f080e7Smrj 			/* cbaddr and kaddr should be page aligned */
433412f080e7Smrj 			ASSERT(((uintptr_t)cbpage->pm_cbaddr &
433512f080e7Smrj 			    MMU_PAGEOFFSET) == 0);
433612f080e7Smrj 			ASSERT(((uintptr_t)cbpage->pm_kaddr &
433712f080e7Smrj 			    MMU_PAGEOFFSET) == 0);
433812f080e7Smrj 
433912f080e7Smrj 			/*
434012f080e7Smrj 			 * if we're copying for the device, we are going to
434112f080e7Smrj 			 * copy from the drivers buffer and to the rootnex
434212f080e7Smrj 			 * allocated copy buffer.
434312f080e7Smrj 			 */
434412f080e7Smrj 			if (cache_flags == DDI_DMA_SYNC_FORDEV) {
434512f080e7Smrj 				fromaddr = cbpage->pm_kaddr + poff;
434612f080e7Smrj 				toaddr = cbpage->pm_cbaddr + poff;
434712f080e7Smrj 				DTRACE_PROBE2(rootnex__sync__dev,
434812f080e7Smrj 				    dev_info_t *, dma->dp_dip, size_t, psize);
434912f080e7Smrj 
435012f080e7Smrj 			/*
435112f080e7Smrj 			 * if we're copying for the cpu/kernel, we are going to
435212f080e7Smrj 			 * copy from the rootnex allocated copy buffer to the
435312f080e7Smrj 			 * drivers buffer.
435412f080e7Smrj 			 */
435512f080e7Smrj 			} else {
435612f080e7Smrj 				fromaddr = cbpage->pm_cbaddr + poff;
435712f080e7Smrj 				toaddr = cbpage->pm_kaddr + poff;
435812f080e7Smrj 				DTRACE_PROBE2(rootnex__sync__cpu,
435912f080e7Smrj 				    dev_info_t *, dma->dp_dip, size_t, psize);
436012f080e7Smrj 			}
436112f080e7Smrj 
436212f080e7Smrj 			bcopy(fromaddr, toaddr, psize);
436312f080e7Smrj 		}
436412f080e7Smrj 
436512f080e7Smrj 		/*
436612f080e7Smrj 		 * decrement size until we're done, update our offset into the
436712f080e7Smrj 		 * buffer, and get the next page size.
436812f080e7Smrj 		 */
436912f080e7Smrj 		size -= psize;
437012f080e7Smrj 		offset += psize;
437112f080e7Smrj 		psize = MIN(MMU_PAGESIZE, size);
437212f080e7Smrj 
437312f080e7Smrj 		/* page offset is zero for the rest of this loop */
437412f080e7Smrj 		poff = 0;
437512f080e7Smrj 	}
437612f080e7Smrj 
437712f080e7Smrj 	return (DDI_SUCCESS);
437812f080e7Smrj }
437912f080e7Smrj 
438020906b23SVikram Hegde /*
438120906b23SVikram Hegde  * rootnex_dma_sync()
438220906b23SVikram Hegde  *    called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags.
438320906b23SVikram Hegde  *    We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC
438420906b23SVikram Hegde  *    is set, ddi_dma_sync() returns immediately passing back success.
438520906b23SVikram Hegde  */
438620906b23SVikram Hegde /*ARGSUSED*/
438720906b23SVikram Hegde static int
438820906b23SVikram Hegde rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
438920906b23SVikram Hegde     off_t off, size_t len, uint_t cache_flags)
439020906b23SVikram Hegde {
43913a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
4392b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
439320906b23SVikram Hegde 		return (iommulib_nexdma_sync(dip, rdip, handle, off, len,
439420906b23SVikram Hegde 		    cache_flags));
439520906b23SVikram Hegde 	}
439620906b23SVikram Hegde #endif
439720906b23SVikram Hegde 	return (rootnex_coredma_sync(dip, rdip, handle, off, len,
439820906b23SVikram Hegde 	    cache_flags));
439920906b23SVikram Hegde }
440012f080e7Smrj 
440112f080e7Smrj /*
440212f080e7Smrj  * rootnex_valid_sync_parms()
440312f080e7Smrj  *    checks the parameters passed to sync to verify they are correct.
440412f080e7Smrj  */
440512f080e7Smrj static int
440612f080e7Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win,
440712f080e7Smrj     off_t offset, size_t size, uint_t cache_flags)
440812f080e7Smrj {
440912f080e7Smrj 	off_t woffset;
441012f080e7Smrj 
441112f080e7Smrj 
441212f080e7Smrj 	/*
441312f080e7Smrj 	 * the first part of the test to make sure the offset passed in is
441412f080e7Smrj 	 * within the window.
441512f080e7Smrj 	 */
441612f080e7Smrj 	if (offset < win->wd_offset) {
441712f080e7Smrj 		return (DDI_FAILURE);
441812f080e7Smrj 	}
441912f080e7Smrj 
442012f080e7Smrj 	/*
442112f080e7Smrj 	 * second and last part of the test to make sure the offset and length
442212f080e7Smrj 	 * passed in is within the window.
442312f080e7Smrj 	 */
442412f080e7Smrj 	woffset = offset - win->wd_offset;
442512f080e7Smrj 	if ((woffset + size) > win->wd_size) {
442612f080e7Smrj 		return (DDI_FAILURE);
442712f080e7Smrj 	}
442812f080e7Smrj 
442912f080e7Smrj 	/*
443012f080e7Smrj 	 * if we are sync'ing for the device, the DDI_DMA_WRITE flag should
443112f080e7Smrj 	 * be set too.
443212f080e7Smrj 	 */
443312f080e7Smrj 	if ((cache_flags == DDI_DMA_SYNC_FORDEV) &&
443412f080e7Smrj 	    (hp->dmai_rflags & DDI_DMA_WRITE)) {
443512f080e7Smrj 		return (DDI_SUCCESS);
443612f080e7Smrj 	}
443712f080e7Smrj 
443812f080e7Smrj 	/*
443912f080e7Smrj 	 * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL
444012f080e7Smrj 	 * should be set. Also DDI_DMA_READ should be set in the flags.
444112f080e7Smrj 	 */
444212f080e7Smrj 	if (((cache_flags == DDI_DMA_SYNC_FORCPU) ||
444312f080e7Smrj 	    (cache_flags == DDI_DMA_SYNC_FORKERNEL)) &&
444412f080e7Smrj 	    (hp->dmai_rflags & DDI_DMA_READ)) {
444512f080e7Smrj 		return (DDI_SUCCESS);
444612f080e7Smrj 	}
444712f080e7Smrj 
444812f080e7Smrj 	return (DDI_FAILURE);
444912f080e7Smrj }
445012f080e7Smrj 
445112f080e7Smrj 
445212f080e7Smrj /*ARGSUSED*/
445312f080e7Smrj static int
445420906b23SVikram Hegde rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
445512f080e7Smrj     uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep,
445612f080e7Smrj     uint_t *ccountp)
445712f080e7Smrj {
445812f080e7Smrj 	rootnex_window_t *window;
445912f080e7Smrj 	rootnex_trim_t *trim;
446012f080e7Smrj 	ddi_dma_impl_t *hp;
446112f080e7Smrj 	rootnex_dma_t *dma;
446212f080e7Smrj #if !defined(__amd64)
446312f080e7Smrj 	rootnex_sglinfo_t *sinfo;
446412f080e7Smrj 	rootnex_pgmap_t *pmap;
446512f080e7Smrj 	uint_t pidx;
446612f080e7Smrj 	uint_t pcnt;
446712f080e7Smrj 	off_t poff;
446812f080e7Smrj 	int i;
446912f080e7Smrj #endif
447012f080e7Smrj 
447112f080e7Smrj 
447212f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
447312f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
447412f080e7Smrj #if !defined(__amd64)
447512f080e7Smrj 	sinfo = &dma->dp_sglinfo;
447612f080e7Smrj #endif
447712f080e7Smrj 
447812f080e7Smrj 	/* If we try and get a window which doesn't exist, return failure */
447912f080e7Smrj 	if (win >= hp->dmai_nwin) {
448012f080e7Smrj 		ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]);
448112f080e7Smrj 		return (DDI_FAILURE);
448212f080e7Smrj 	}
448312f080e7Smrj 
448412f080e7Smrj 	/*
448512f080e7Smrj 	 * if we don't have any windows, and they're asking for the first
448612f080e7Smrj 	 * window, setup the cookie pointer to the first cookie in the bind.
448712f080e7Smrj 	 * setup our return values, then increment the cookie since we return
448812f080e7Smrj 	 * the first cookie on the stack.
448912f080e7Smrj 	 */
449012f080e7Smrj 	if (dma->dp_window == NULL) {
449112f080e7Smrj 		if (win != 0) {
449212f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]);
449312f080e7Smrj 			return (DDI_FAILURE);
449412f080e7Smrj 		}
449512f080e7Smrj 		hp->dmai_cookie = dma->dp_cookies;
449612f080e7Smrj 		*offp = 0;
449712f080e7Smrj 		*lenp = dma->dp_dma.dmao_size;
449812f080e7Smrj 		*ccountp = dma->dp_sglinfo.si_sgl_size;
449912f080e7Smrj 		*cookiep = hp->dmai_cookie[0];
450012f080e7Smrj 		hp->dmai_cookie++;
450112f080e7Smrj 		return (DDI_SUCCESS);
450212f080e7Smrj 	}
450312f080e7Smrj 
450412f080e7Smrj 	/* sync the old window before moving on to the new one */
450512f080e7Smrj 	window = &dma->dp_window[dma->dp_current_win];
450612f080e7Smrj 	if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) {
450794f1124eSVikram Hegde 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
450812f080e7Smrj 		    DDI_DMA_SYNC_FORCPU);
450912f080e7Smrj 	}
451012f080e7Smrj 
451112f080e7Smrj #if !defined(__amd64)
451212f080e7Smrj 	/*
451312f080e7Smrj 	 * before we move to the next window, if we need to re-map, unmap all
451412f080e7Smrj 	 * the pages in this window.
451512f080e7Smrj 	 */
451612f080e7Smrj 	if (dma->dp_cb_remaping) {
451712f080e7Smrj 		/*
451812f080e7Smrj 		 * If we switch to this window again, we'll need to map in
451912f080e7Smrj 		 * on the fly next time.
452012f080e7Smrj 		 */
452112f080e7Smrj 		window->wd_remap_copybuf = B_TRUE;
452212f080e7Smrj 
452312f080e7Smrj 		/*
452412f080e7Smrj 		 * calculate the page index into the buffer where this window
452512f080e7Smrj 		 * starts, and the number of pages this window takes up.
452612f080e7Smrj 		 */
452712f080e7Smrj 		pidx = (sinfo->si_buf_offset + window->wd_offset) >>
452812f080e7Smrj 		    MMU_PAGESHIFT;
452912f080e7Smrj 		poff = (sinfo->si_buf_offset + window->wd_offset) &
453012f080e7Smrj 		    MMU_PAGEOFFSET;
453112f080e7Smrj 		pcnt = mmu_btopr(window->wd_size + poff);
453212f080e7Smrj 		ASSERT((pidx + pcnt) <= sinfo->si_max_pages);
453312f080e7Smrj 
453412f080e7Smrj 		/* unmap pages which are currently mapped in this window */
453512f080e7Smrj 		for (i = 0; i < pcnt; i++) {
453612f080e7Smrj 			if (dma->dp_pgmap[pidx].pm_mapped) {
453712f080e7Smrj 				hat_unload(kas.a_hat,
453812f080e7Smrj 				    dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE,
453912f080e7Smrj 				    HAT_UNLOAD);
454012f080e7Smrj 				dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
454112f080e7Smrj 			}
454212f080e7Smrj 			pidx++;
454312f080e7Smrj 		}
454412f080e7Smrj 	}
454512f080e7Smrj #endif
454612f080e7Smrj 
454712f080e7Smrj 	/*
454812f080e7Smrj 	 * Move to the new window.
454912f080e7Smrj 	 * NOTE: current_win must be set for sync to work right
455012f080e7Smrj 	 */
455112f080e7Smrj 	dma->dp_current_win = win;
455212f080e7Smrj 	window = &dma->dp_window[win];
455312f080e7Smrj 
455412f080e7Smrj 	/* if needed, adjust the first and/or last cookies for trim */
455512f080e7Smrj 	trim = &window->wd_trim;
455612f080e7Smrj 	if (trim->tr_trim_first) {
4557843e1988Sjohnlev 		window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr;
455812f080e7Smrj 		window->wd_first_cookie->dmac_size = trim->tr_first_size;
455912f080e7Smrj #if !defined(__amd64)
456012f080e7Smrj 		window->wd_first_cookie->dmac_type =
456112f080e7Smrj 		    (window->wd_first_cookie->dmac_type &
456212f080e7Smrj 		    ROOTNEX_USES_COPYBUF) + window->wd_offset;
456312f080e7Smrj #endif
456412f080e7Smrj 		if (trim->tr_first_copybuf_win) {
456512f080e7Smrj 			dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr =
456612f080e7Smrj 			    trim->tr_first_cbaddr;
456712f080e7Smrj #if !defined(__amd64)
456812f080e7Smrj 			dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr =
456912f080e7Smrj 			    trim->tr_first_kaddr;
457012f080e7Smrj #endif
457112f080e7Smrj 		}
457212f080e7Smrj 	}
457312f080e7Smrj 	if (trim->tr_trim_last) {
4574843e1988Sjohnlev 		trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr;
457512f080e7Smrj 		trim->tr_last_cookie->dmac_size = trim->tr_last_size;
457612f080e7Smrj 		if (trim->tr_last_copybuf_win) {
457712f080e7Smrj 			dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr =
457812f080e7Smrj 			    trim->tr_last_cbaddr;
457912f080e7Smrj #if !defined(__amd64)
458012f080e7Smrj 			dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr =
458112f080e7Smrj 			    trim->tr_last_kaddr;
458212f080e7Smrj #endif
458312f080e7Smrj 		}
458412f080e7Smrj 	}
458512f080e7Smrj 
458612f080e7Smrj 	/*
458712f080e7Smrj 	 * setup the cookie pointer to the first cookie in the window. setup
458812f080e7Smrj 	 * our return values, then increment the cookie since we return the
458912f080e7Smrj 	 * first cookie on the stack.
459012f080e7Smrj 	 */
459112f080e7Smrj 	hp->dmai_cookie = window->wd_first_cookie;
459212f080e7Smrj 	*offp = window->wd_offset;
459312f080e7Smrj 	*lenp = window->wd_size;
459412f080e7Smrj 	*ccountp = window->wd_cookie_cnt;
459512f080e7Smrj 	*cookiep = hp->dmai_cookie[0];
459612f080e7Smrj 	hp->dmai_cookie++;
459712f080e7Smrj 
459812f080e7Smrj #if !defined(__amd64)
459912f080e7Smrj 	/* re-map copybuf if required for this window */
460012f080e7Smrj 	if (dma->dp_cb_remaping) {
460112f080e7Smrj 		/*
460212f080e7Smrj 		 * calculate the page index into the buffer where this
460312f080e7Smrj 		 * window starts.
460412f080e7Smrj 		 */
460512f080e7Smrj 		pidx = (sinfo->si_buf_offset + window->wd_offset) >>
460612f080e7Smrj 		    MMU_PAGESHIFT;
460712f080e7Smrj 		ASSERT(pidx < sinfo->si_max_pages);
460812f080e7Smrj 
460912f080e7Smrj 		/*
461012f080e7Smrj 		 * the first page can get unmapped if it's shared with the
461112f080e7Smrj 		 * previous window. Even if the rest of this window is already
461212f080e7Smrj 		 * mapped in, we need to still check this one.
461312f080e7Smrj 		 */
461412f080e7Smrj 		pmap = &dma->dp_pgmap[pidx];
461512f080e7Smrj 		if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) {
461612f080e7Smrj 			if (pmap->pm_pp != NULL) {
461712f080e7Smrj 				pmap->pm_mapped = B_TRUE;
461812f080e7Smrj 				i86_pp_map(pmap->pm_pp, pmap->pm_kaddr);
461912f080e7Smrj 			} else if (pmap->pm_vaddr != NULL) {
462012f080e7Smrj 				pmap->pm_mapped = B_TRUE;
462112f080e7Smrj 				i86_va_map(pmap->pm_vaddr, sinfo->si_asp,
462212f080e7Smrj 				    pmap->pm_kaddr);
462312f080e7Smrj 			}
462412f080e7Smrj 		}
462512f080e7Smrj 		pidx++;
462612f080e7Smrj 
462712f080e7Smrj 		/* map in the rest of the pages if required */
462812f080e7Smrj 		if (window->wd_remap_copybuf) {
462912f080e7Smrj 			window->wd_remap_copybuf = B_FALSE;
463012f080e7Smrj 
463112f080e7Smrj 			/* figure out many pages this window takes up */
463212f080e7Smrj 			poff = (sinfo->si_buf_offset + window->wd_offset) &
463312f080e7Smrj 			    MMU_PAGEOFFSET;
463412f080e7Smrj 			pcnt = mmu_btopr(window->wd_size + poff);
463512f080e7Smrj 			ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages);
463612f080e7Smrj 
463712f080e7Smrj 			/* map pages which require it */
463812f080e7Smrj 			for (i = 1; i < pcnt; i++) {
463912f080e7Smrj 				pmap = &dma->dp_pgmap[pidx];
464012f080e7Smrj 				if (pmap->pm_uses_copybuf) {
464112f080e7Smrj 					ASSERT(pmap->pm_mapped == B_FALSE);
464212f080e7Smrj 					if (pmap->pm_pp != NULL) {
464312f080e7Smrj 						pmap->pm_mapped = B_TRUE;
464412f080e7Smrj 						i86_pp_map(pmap->pm_pp,
464512f080e7Smrj 						    pmap->pm_kaddr);
464612f080e7Smrj 					} else if (pmap->pm_vaddr != NULL) {
464712f080e7Smrj 						pmap->pm_mapped = B_TRUE;
464812f080e7Smrj 						i86_va_map(pmap->pm_vaddr,
464912f080e7Smrj 						    sinfo->si_asp,
465012f080e7Smrj 						    pmap->pm_kaddr);
465112f080e7Smrj 					}
465212f080e7Smrj 				}
465312f080e7Smrj 				pidx++;
465412f080e7Smrj 			}
465512f080e7Smrj 		}
465612f080e7Smrj 	}
465712f080e7Smrj #endif
465812f080e7Smrj 
465912f080e7Smrj 	/* if the new window uses the copy buffer, sync it for the device */
466012f080e7Smrj 	if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) {
466194f1124eSVikram Hegde 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
466212f080e7Smrj 		    DDI_DMA_SYNC_FORDEV);
466312f080e7Smrj 	}
466412f080e7Smrj 
466512f080e7Smrj 	return (DDI_SUCCESS);
466612f080e7Smrj }
466712f080e7Smrj 
466820906b23SVikram Hegde /*
466920906b23SVikram Hegde  * rootnex_dma_win()
467020906b23SVikram Hegde  *    called from ddi_dma_getwin()
467120906b23SVikram Hegde  */
467220906b23SVikram Hegde /*ARGSUSED*/
467320906b23SVikram Hegde static int
467420906b23SVikram Hegde rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
467520906b23SVikram Hegde     uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep,
467620906b23SVikram Hegde     uint_t *ccountp)
467720906b23SVikram Hegde {
46783a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
4679b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
468020906b23SVikram Hegde 		return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp,
468120906b23SVikram Hegde 		    cookiep, ccountp));
468220906b23SVikram Hegde 	}
468320906b23SVikram Hegde #endif
468412f080e7Smrj 
468520906b23SVikram Hegde 	return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp,
468620906b23SVikram Hegde 	    cookiep, ccountp));
468720906b23SVikram Hegde }
468812f080e7Smrj 
468912f080e7Smrj /*
469012f080e7Smrj  * ************************
469112f080e7Smrj  *  obsoleted dma routines
469212f080e7Smrj  * ************************
469312f080e7Smrj  */
469412f080e7Smrj 
4695b51bbbf5SVikram Hegde /*
4696b51bbbf5SVikram Hegde  * rootnex_dma_map()
4697b51bbbf5SVikram Hegde  *    called from ddi_dma_setup()
4698b51bbbf5SVikram Hegde  * NO IOMMU in 32 bit mode. The below routines doesn't work in 64 bit mode.
4699b51bbbf5SVikram Hegde  */
470012f080e7Smrj /* ARGSUSED */
470112f080e7Smrj static int
4702b51bbbf5SVikram Hegde rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip,
470320906b23SVikram Hegde     struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep)
470412f080e7Smrj {
470512f080e7Smrj #if defined(__amd64)
470612f080e7Smrj 	/*
470712f080e7Smrj 	 * this interface is not supported in 64-bit x86 kernel. See comment in
470812f080e7Smrj 	 * rootnex_dma_mctl()
470912f080e7Smrj 	 */
471012f080e7Smrj 	return (DDI_DMA_NORESOURCES);
471112f080e7Smrj 
471212f080e7Smrj #else /* 32-bit x86 kernel */
471312f080e7Smrj 	ddi_dma_handle_t *lhandlep;
471412f080e7Smrj 	ddi_dma_handle_t lhandle;
471512f080e7Smrj 	ddi_dma_cookie_t cookie;
471612f080e7Smrj 	ddi_dma_attr_t dma_attr;
471712f080e7Smrj 	ddi_dma_lim_t *dma_lim;
471812f080e7Smrj 	uint_t ccnt;
471912f080e7Smrj 	int e;
472012f080e7Smrj 
472112f080e7Smrj 
472212f080e7Smrj 	/*
472312f080e7Smrj 	 * if the driver is just testing to see if it's possible to do the bind,
472412f080e7Smrj 	 * we'll use local state. Otherwise, use the handle pointer passed in.
472512f080e7Smrj 	 */
472612f080e7Smrj 	if (handlep == NULL) {
472712f080e7Smrj 		lhandlep = &lhandle;
472812f080e7Smrj 	} else {
472912f080e7Smrj 		lhandlep = handlep;
473012f080e7Smrj 	}
473112f080e7Smrj 
473212f080e7Smrj 	/* convert the limit structure to a dma_attr one */
473312f080e7Smrj 	dma_lim = dmareq->dmar_limits;
473412f080e7Smrj 	dma_attr.dma_attr_version = DMA_ATTR_V0;
473512f080e7Smrj 	dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo;
473612f080e7Smrj 	dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi;
473712f080e7Smrj 	dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer;
473812f080e7Smrj 	dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max;
473912f080e7Smrj 	dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max;
474012f080e7Smrj 	dma_attr.dma_attr_granular = dma_lim->dlim_granular;
474112f080e7Smrj 	dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen;
474212f080e7Smrj 	dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize;
474312f080e7Smrj 	dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes;
474412f080e7Smrj 	dma_attr.dma_attr_align = MMU_PAGESIZE;
474512f080e7Smrj 	dma_attr.dma_attr_flags = 0;
474612f080e7Smrj 
474712f080e7Smrj 	e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp,
474812f080e7Smrj 	    dmareq->dmar_arg, lhandlep);
474912f080e7Smrj 	if (e != DDI_SUCCESS) {
475012f080e7Smrj 		return (e);
475112f080e7Smrj 	}
475212f080e7Smrj 
475312f080e7Smrj 	e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt);
475412f080e7Smrj 	if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) {
475512f080e7Smrj 		(void) rootnex_dma_freehdl(dip, rdip, *lhandlep);
475612f080e7Smrj 		return (e);
475712f080e7Smrj 	}
475812f080e7Smrj 
475912f080e7Smrj 	/*
476012f080e7Smrj 	 * if the driver is just testing to see if it's possible to do the bind,
476112f080e7Smrj 	 * free up the local state and return the result.
476212f080e7Smrj 	 */
476312f080e7Smrj 	if (handlep == NULL) {
476412f080e7Smrj 		(void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep);
476512f080e7Smrj 		(void) rootnex_dma_freehdl(dip, rdip, *lhandlep);
476612f080e7Smrj 		if (e == DDI_DMA_MAPPED) {
476712f080e7Smrj 			return (DDI_DMA_MAPOK);
476812f080e7Smrj 		} else {
476912f080e7Smrj 			return (DDI_DMA_NOMAPPING);
477012f080e7Smrj 		}
477112f080e7Smrj 	}
477212f080e7Smrj 
477312f080e7Smrj 	return (e);
477412f080e7Smrj #endif /* defined(__amd64) */
477512f080e7Smrj }
477612f080e7Smrj 
477720906b23SVikram Hegde /*
477812f080e7Smrj  * rootnex_dma_mctl()
477912f080e7Smrj  *
4780b51bbbf5SVikram Hegde  * No IOMMU in 32 bit mode. The below routine doesn't work in 64 bit mode.
478112f080e7Smrj  */
478212f080e7Smrj /* ARGSUSED */
478312f080e7Smrj static int
4784b51bbbf5SVikram Hegde rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
478512f080e7Smrj     enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp,
478612f080e7Smrj     uint_t cache_flags)
478712f080e7Smrj {
478812f080e7Smrj #if defined(__amd64)
478912f080e7Smrj 	/*
479012f080e7Smrj 	 * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a
479112f080e7Smrj 	 * common implementation in genunix, so they no longer have x86
479212f080e7Smrj 	 * specific functionality which called into dma_ctl.
479312f080e7Smrj 	 *
479412f080e7Smrj 	 * The rest of the obsoleted interfaces were never supported in the
479512f080e7Smrj 	 * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface
479612f080e7Smrj 	 * was not ported to the x86 64-bit kernel do to serious x86 rootnex
479712f080e7Smrj 	 * implementation issues.
479812f080e7Smrj 	 *
479912f080e7Smrj 	 * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and
480012f080e7Smrj 	 * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we
480112f080e7Smrj 	 * reflect that now too...
480212f080e7Smrj 	 *
480312f080e7Smrj 	 * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are
480412f080e7Smrj 	 * not going to put this functionality into the 64-bit x86 kernel now.
480512f080e7Smrj 	 * It wasn't ported to the 64-bit kernel for s10, no reason to change
480612f080e7Smrj 	 * that in a future release.
480712f080e7Smrj 	 */
480812f080e7Smrj 	return (DDI_FAILURE);
480912f080e7Smrj 
481012f080e7Smrj #else /* 32-bit x86 kernel */
481112f080e7Smrj 	ddi_dma_cookie_t lcookie;
481212f080e7Smrj 	ddi_dma_cookie_t *cookie;
481312f080e7Smrj 	rootnex_window_t *window;
481412f080e7Smrj 	ddi_dma_impl_t *hp;
481512f080e7Smrj 	rootnex_dma_t *dma;
481612f080e7Smrj 	uint_t nwin;
481712f080e7Smrj 	uint_t ccnt;
481812f080e7Smrj 	size_t len;
481912f080e7Smrj 	off_t off;
482012f080e7Smrj 	int e;
482112f080e7Smrj 
482212f080e7Smrj 
482312f080e7Smrj 	/*
482412f080e7Smrj 	 * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little
482512f080e7Smrj 	 * hacky since were optimizing for the current interfaces and so we can
482612f080e7Smrj 	 * cleanup the mess in genunix. Hopefully we will remove the this
482712f080e7Smrj 	 * obsoleted routines someday soon.
482812f080e7Smrj 	 */
482912f080e7Smrj 
483012f080e7Smrj 	switch (request) {
483112f080e7Smrj 
483212f080e7Smrj 	case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */
483312f080e7Smrj 		hp = (ddi_dma_impl_t *)handle;
483412f080e7Smrj 		cookie = (ddi_dma_cookie_t *)objpp;
483512f080e7Smrj 
483612f080e7Smrj 		/*
483712f080e7Smrj 		 * convert segment to cookie. We don't distinguish between the
483812f080e7Smrj 		 * two :-)
483912f080e7Smrj 		 */
484012f080e7Smrj 		*cookie = *hp->dmai_cookie;
484112f080e7Smrj 		*lenp = cookie->dmac_size;
484212f080e7Smrj 		*offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF;
484312f080e7Smrj 		return (DDI_SUCCESS);
484412f080e7Smrj 
484512f080e7Smrj 	case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */
484612f080e7Smrj 		hp = (ddi_dma_impl_t *)handle;
484712f080e7Smrj 		dma = (rootnex_dma_t *)hp->dmai_private;
484812f080e7Smrj 
484912f080e7Smrj 		if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) {
485012f080e7Smrj 			return (DDI_DMA_STALE);
485112f080e7Smrj 		}
485212f080e7Smrj 
485312f080e7Smrj 		/* handle the case where we don't have any windows */
485412f080e7Smrj 		if (dma->dp_window == NULL) {
485512f080e7Smrj 			/*
485612f080e7Smrj 			 * if seg == NULL, and we don't have any windows,
485712f080e7Smrj 			 * return the first cookie in the sgl.
485812f080e7Smrj 			 */
485912f080e7Smrj 			if (*lenp == NULL) {
486012f080e7Smrj 				dma->dp_current_cookie = 0;
486112f080e7Smrj 				hp->dmai_cookie = dma->dp_cookies;
486212f080e7Smrj 				*objpp = (caddr_t)handle;
486312f080e7Smrj 				return (DDI_SUCCESS);
486412f080e7Smrj 
486512f080e7Smrj 			/* if we have more cookies, go to the next cookie */
486612f080e7Smrj 			} else {
486712f080e7Smrj 				if ((dma->dp_current_cookie + 1) >=
486812f080e7Smrj 				    dma->dp_sglinfo.si_sgl_size) {
486912f080e7Smrj 					return (DDI_DMA_DONE);
487012f080e7Smrj 				}
487112f080e7Smrj 				dma->dp_current_cookie++;
487212f080e7Smrj 				hp->dmai_cookie++;
487312f080e7Smrj 				return (DDI_SUCCESS);
487412f080e7Smrj 			}
487512f080e7Smrj 		}
487612f080e7Smrj 
487712f080e7Smrj 		/* We have one or more windows */
487812f080e7Smrj 		window = &dma->dp_window[dma->dp_current_win];
487912f080e7Smrj 
488012f080e7Smrj 		/*
488112f080e7Smrj 		 * if seg == NULL, return the first cookie in the current
488212f080e7Smrj 		 * window
488312f080e7Smrj 		 */
488412f080e7Smrj 		if (*lenp == NULL) {
488512f080e7Smrj 			dma->dp_current_cookie = 0;
4886cf4e9a1dSmrj 			hp->dmai_cookie = window->wd_first_cookie;
488712f080e7Smrj 
488812f080e7Smrj 		/*
488912f080e7Smrj 		 * go to the next cookie in the window then see if we done with
489012f080e7Smrj 		 * this window.
489112f080e7Smrj 		 */
489212f080e7Smrj 		} else {
489312f080e7Smrj 			if ((dma->dp_current_cookie + 1) >=
489412f080e7Smrj 			    window->wd_cookie_cnt) {
489512f080e7Smrj 				return (DDI_DMA_DONE);
489612f080e7Smrj 			}
489712f080e7Smrj 			dma->dp_current_cookie++;
489812f080e7Smrj 			hp->dmai_cookie++;
489912f080e7Smrj 		}
490012f080e7Smrj 		*objpp = (caddr_t)handle;
490112f080e7Smrj 		return (DDI_SUCCESS);
490212f080e7Smrj 
490312f080e7Smrj 	case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */
490412f080e7Smrj 		hp = (ddi_dma_impl_t *)handle;
490512f080e7Smrj 		dma = (rootnex_dma_t *)hp->dmai_private;
490612f080e7Smrj 
490712f080e7Smrj 		if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) {
490812f080e7Smrj 			return (DDI_DMA_STALE);
490912f080e7Smrj 		}
491012f080e7Smrj 
491112f080e7Smrj 		/* if win == NULL, return the first window in the bind */
491212f080e7Smrj 		if (*offp == NULL) {
491312f080e7Smrj 			nwin = 0;
491412f080e7Smrj 
491512f080e7Smrj 		/*
491612f080e7Smrj 		 * else, go to the next window then see if we're done with all
491712f080e7Smrj 		 * the windows.
491812f080e7Smrj 		 */
491912f080e7Smrj 		} else {
492012f080e7Smrj 			nwin = dma->dp_current_win + 1;
492112f080e7Smrj 			if (nwin >= hp->dmai_nwin) {
492212f080e7Smrj 				return (DDI_DMA_DONE);
492312f080e7Smrj 			}
492412f080e7Smrj 		}
492512f080e7Smrj 
492612f080e7Smrj 		/* switch to the next window */
492712f080e7Smrj 		e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len,
492812f080e7Smrj 		    &lcookie, &ccnt);
492912f080e7Smrj 		ASSERT(e == DDI_SUCCESS);
493012f080e7Smrj 		if (e != DDI_SUCCESS) {
493112f080e7Smrj 			return (DDI_DMA_STALE);
493212f080e7Smrj 		}
493312f080e7Smrj 
493412f080e7Smrj 		/* reset the cookie back to the first cookie in the window */
493512f080e7Smrj 		if (dma->dp_window != NULL) {
493612f080e7Smrj 			window = &dma->dp_window[dma->dp_current_win];
493712f080e7Smrj 			hp->dmai_cookie = window->wd_first_cookie;
493812f080e7Smrj 		} else {
493912f080e7Smrj 			hp->dmai_cookie = dma->dp_cookies;
494012f080e7Smrj 		}
494112f080e7Smrj 
494212f080e7Smrj 		*objpp = (caddr_t)handle;
494312f080e7Smrj 		return (DDI_SUCCESS);
494412f080e7Smrj 
494512f080e7Smrj 	case DDI_DMA_FREE: /* ddi_dma_free() */
494612f080e7Smrj 		(void) rootnex_dma_unbindhdl(dip, rdip, handle);
494712f080e7Smrj 		(void) rootnex_dma_freehdl(dip, rdip, handle);
494812f080e7Smrj 		if (rootnex_state->r_dvma_call_list_id) {
494912f080e7Smrj 			ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
495012f080e7Smrj 		}
495112f080e7Smrj 		return (DDI_SUCCESS);
495212f080e7Smrj 
495312f080e7Smrj 	case DDI_DMA_IOPB_ALLOC:	/* get contiguous DMA-able memory */
495412f080e7Smrj 	case DDI_DMA_SMEM_ALLOC:	/* get contiguous DMA-able memory */
495512f080e7Smrj 		/* should never get here, handled in genunix */
495612f080e7Smrj 		ASSERT(0);
495712f080e7Smrj 		return (DDI_FAILURE);
495812f080e7Smrj 
495912f080e7Smrj 	case DDI_DMA_KVADDR:
496012f080e7Smrj 	case DDI_DMA_GETERR:
496112f080e7Smrj 	case DDI_DMA_COFF:
496212f080e7Smrj 		return (DDI_FAILURE);
496312f080e7Smrj 	}
496412f080e7Smrj 
496512f080e7Smrj 	return (DDI_FAILURE);
496612f080e7Smrj #endif /* defined(__amd64) */
49677c478bd9Sstevel@tonic-gate }
49687aec1d6eScindi 
496920906b23SVikram Hegde /*
497000d0963fSdilpreet  * *********
497100d0963fSdilpreet  *  FMA Code
497200d0963fSdilpreet  * *********
497300d0963fSdilpreet  */
497400d0963fSdilpreet 
497500d0963fSdilpreet /*
497600d0963fSdilpreet  * rootnex_fm_init()
497700d0963fSdilpreet  *    FMA init busop
497800d0963fSdilpreet  */
49797aec1d6eScindi /* ARGSUSED */
49807aec1d6eScindi static int
498100d0963fSdilpreet rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap,
498200d0963fSdilpreet     ddi_iblock_cookie_t *ibc)
49837aec1d6eScindi {
498400d0963fSdilpreet 	*ibc = rootnex_state->r_err_ibc;
498500d0963fSdilpreet 
498600d0963fSdilpreet 	return (ddi_system_fmcap);
498700d0963fSdilpreet }
498800d0963fSdilpreet 
498900d0963fSdilpreet /*
499000d0963fSdilpreet  * rootnex_dma_check()
499100d0963fSdilpreet  *    Function called after a dma fault occurred to find out whether the
499200d0963fSdilpreet  *    fault address is associated with a driver that is able to handle faults
499300d0963fSdilpreet  *    and recover from faults.
499400d0963fSdilpreet  */
499500d0963fSdilpreet /* ARGSUSED */
499600d0963fSdilpreet static int
499700d0963fSdilpreet rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr,
499800d0963fSdilpreet     const void *not_used)
499900d0963fSdilpreet {
500000d0963fSdilpreet 	rootnex_window_t *window;
500100d0963fSdilpreet 	uint64_t start_addr;
500200d0963fSdilpreet 	uint64_t fault_addr;
500300d0963fSdilpreet 	ddi_dma_impl_t *hp;
500400d0963fSdilpreet 	rootnex_dma_t *dma;
500500d0963fSdilpreet 	uint64_t end_addr;
500600d0963fSdilpreet 	size_t csize;
500700d0963fSdilpreet 	int i;
500800d0963fSdilpreet 	int j;
500900d0963fSdilpreet 
501000d0963fSdilpreet 
501100d0963fSdilpreet 	/* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */
501200d0963fSdilpreet 	hp = (ddi_dma_impl_t *)handle;
501300d0963fSdilpreet 	ASSERT(hp);
501400d0963fSdilpreet 
501500d0963fSdilpreet 	dma = (rootnex_dma_t *)hp->dmai_private;
501600d0963fSdilpreet 
501700d0963fSdilpreet 	/* Get the address that we need to search for */
501800d0963fSdilpreet 	fault_addr = *(uint64_t *)addr;
501900d0963fSdilpreet 
502000d0963fSdilpreet 	/*
502100d0963fSdilpreet 	 * if we don't have any windows, we can just walk through all the
502200d0963fSdilpreet 	 * cookies.
502300d0963fSdilpreet 	 */
502400d0963fSdilpreet 	if (dma->dp_window == NULL) {
502500d0963fSdilpreet 		/* for each cookie */
502600d0963fSdilpreet 		for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) {
502700d0963fSdilpreet 			/*
502800d0963fSdilpreet 			 * if the faulted address is within the physical address
502900d0963fSdilpreet 			 * range of the cookie, return DDI_FM_NONFATAL.
503000d0963fSdilpreet 			 */
503100d0963fSdilpreet 			if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) &&
503200d0963fSdilpreet 			    (fault_addr <= (dma->dp_cookies[i].dmac_laddress +
503300d0963fSdilpreet 			    dma->dp_cookies[i].dmac_size))) {
503400d0963fSdilpreet 				return (DDI_FM_NONFATAL);
503500d0963fSdilpreet 			}
503600d0963fSdilpreet 		}
503700d0963fSdilpreet 
503800d0963fSdilpreet 		/* fault_addr not within this DMA handle */
503900d0963fSdilpreet 		return (DDI_FM_UNKNOWN);
504000d0963fSdilpreet 	}
504100d0963fSdilpreet 
504200d0963fSdilpreet 	/* we have mutiple windows, walk through each window */
504300d0963fSdilpreet 	for (i = 0; i < hp->dmai_nwin; i++) {
504400d0963fSdilpreet 		window = &dma->dp_window[i];
504500d0963fSdilpreet 
504600d0963fSdilpreet 		/* Go through all the cookies in the window */
504700d0963fSdilpreet 		for (j = 0; j < window->wd_cookie_cnt; j++) {
504800d0963fSdilpreet 
504900d0963fSdilpreet 			start_addr = window->wd_first_cookie[j].dmac_laddress;
505000d0963fSdilpreet 			csize = window->wd_first_cookie[j].dmac_size;
505100d0963fSdilpreet 
505200d0963fSdilpreet 			/*
505300d0963fSdilpreet 			 * if we are trimming the first cookie in the window,
505400d0963fSdilpreet 			 * and this is the first cookie, adjust the start
505500d0963fSdilpreet 			 * address and size of the cookie to account for the
505600d0963fSdilpreet 			 * trim.
505700d0963fSdilpreet 			 */
505800d0963fSdilpreet 			if (window->wd_trim.tr_trim_first && (j == 0)) {
505900d0963fSdilpreet 				start_addr = window->wd_trim.tr_first_paddr;
506000d0963fSdilpreet 				csize = window->wd_trim.tr_first_size;
506100d0963fSdilpreet 			}
506200d0963fSdilpreet 
506300d0963fSdilpreet 			/*
506400d0963fSdilpreet 			 * if we are trimming the last cookie in the window,
506500d0963fSdilpreet 			 * and this is the last cookie, adjust the start
506600d0963fSdilpreet 			 * address and size of the cookie to account for the
506700d0963fSdilpreet 			 * trim.
506800d0963fSdilpreet 			 */
506900d0963fSdilpreet 			if (window->wd_trim.tr_trim_last &&
507000d0963fSdilpreet 			    (j == (window->wd_cookie_cnt - 1))) {
507100d0963fSdilpreet 				start_addr = window->wd_trim.tr_last_paddr;
507200d0963fSdilpreet 				csize = window->wd_trim.tr_last_size;
507300d0963fSdilpreet 			}
507400d0963fSdilpreet 
507500d0963fSdilpreet 			end_addr = start_addr + csize;
507600d0963fSdilpreet 
507700d0963fSdilpreet 			/*
50783a634bfcSVikram Hegde 			 * if the faulted address is within the physical
50793a634bfcSVikram Hegde 			 * address of the cookie, return DDI_FM_NONFATAL.
508000d0963fSdilpreet 			 */
508100d0963fSdilpreet 			if ((fault_addr >= start_addr) &&
508200d0963fSdilpreet 			    (fault_addr <= end_addr)) {
508300d0963fSdilpreet 				return (DDI_FM_NONFATAL);
508400d0963fSdilpreet 			}
508500d0963fSdilpreet 		}
508600d0963fSdilpreet 	}
508700d0963fSdilpreet 
508800d0963fSdilpreet 	/* fault_addr not within this DMA handle */
508900d0963fSdilpreet 	return (DDI_FM_UNKNOWN);
50907aec1d6eScindi }
50913a634bfcSVikram Hegde 
50923a634bfcSVikram Hegde /*ARGSUSED*/
50933a634bfcSVikram Hegde static int
50943a634bfcSVikram Hegde rootnex_quiesce(dev_info_t *dip)
50953a634bfcSVikram Hegde {
50963a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv)
50973a634bfcSVikram Hegde 	return (immu_quiesce());
50983a634bfcSVikram Hegde #else
50993a634bfcSVikram Hegde 	return (DDI_SUCCESS);
51003a634bfcSVikram Hegde #endif
51013a634bfcSVikram Hegde }
51023a634bfcSVikram Hegde 
51033a634bfcSVikram Hegde #if defined(__xpv)
51043a634bfcSVikram Hegde void
51053a634bfcSVikram Hegde immu_init(void)
51063a634bfcSVikram Hegde {
51073a634bfcSVikram Hegde 	;
51083a634bfcSVikram Hegde }
51093a634bfcSVikram Hegde 
51103a634bfcSVikram Hegde void
51113a634bfcSVikram Hegde immu_startup(void)
51123a634bfcSVikram Hegde {
51133a634bfcSVikram Hegde 	;
51143a634bfcSVikram Hegde }
51153a634bfcSVikram Hegde /*ARGSUSED*/
51163a634bfcSVikram Hegde void
51173a634bfcSVikram Hegde immu_physmem_update(uint64_t addr, uint64_t size)
51183a634bfcSVikram Hegde {
51193a634bfcSVikram Hegde 	;
51203a634bfcSVikram Hegde }
51213a634bfcSVikram Hegde #endif
5122