xref: /titanic_53/usr/src/uts/sun4v/sys/vsw.h (revision e1ebb9ec908bc2d0a8810f137ebd6566cc8a8061)
11ae08745Sheppo /*
21ae08745Sheppo  * CDDL HEADER START
31ae08745Sheppo  *
41ae08745Sheppo  * The contents of this file are subject to the terms of the
51ae08745Sheppo  * Common Development and Distribution License (the "License").
61ae08745Sheppo  * You may not use this file except in compliance with the License.
71ae08745Sheppo  *
81ae08745Sheppo  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
91ae08745Sheppo  * or http://www.opensolaris.org/os/licensing.
101ae08745Sheppo  * See the License for the specific language governing permissions
111ae08745Sheppo  * and limitations under the License.
121ae08745Sheppo  *
131ae08745Sheppo  * When distributing Covered Code, include this CDDL HEADER in each
141ae08745Sheppo  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
151ae08745Sheppo  * If applicable, add the following below this CDDL HEADER, with the
161ae08745Sheppo  * fields enclosed by brackets "[]" replaced with your own identifying
171ae08745Sheppo  * information: Portions Copyright [yyyy] [name of copyright owner]
181ae08745Sheppo  *
191ae08745Sheppo  * CDDL HEADER END
201ae08745Sheppo  */
211ae08745Sheppo 
221ae08745Sheppo /*
231ae08745Sheppo  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
241ae08745Sheppo  * Use is subject to license terms.
251ae08745Sheppo  */
261ae08745Sheppo 
271ae08745Sheppo /*
281ae08745Sheppo  * This header file contains the basic data structures which the
291ae08745Sheppo  * virtual switch (vsw) uses to communicate with its clients and
301ae08745Sheppo  * the outside world.
311ae08745Sheppo  *
321ae08745Sheppo  * The virtual switch reads the machine description (MD) to
331ae08745Sheppo  * determine how many port_t structures to create (each port_t
341ae08745Sheppo  * can support communications to a single network device). The
351ae08745Sheppo  * port_t's are maintained in a linked list.
361ae08745Sheppo  *
371ae08745Sheppo  * Each port in turn contains a number of logical domain channels
381ae08745Sheppo  * (ldc's) which are inter domain communications channels which
391ae08745Sheppo  * are used for passing small messages between the domains. Their
401ae08745Sheppo  * may be an unlimited number of channels associated with each port,
411ae08745Sheppo  * though most devices only use a single channel.
421ae08745Sheppo  *
431ae08745Sheppo  * The ldc is a bi-directional channel, which is divided up into
441ae08745Sheppo  * two directional 'lanes', one outbound from the switch to the
451ae08745Sheppo  * virtual network device, the other inbound to the switch.
461ae08745Sheppo  * Depending on the type of device each lane may have seperate
471ae08745Sheppo  * communication paramaters (such as mtu etc).
481ae08745Sheppo  *
491ae08745Sheppo  * For those network clients which use descriptor rings the
501ae08745Sheppo  * rings are associated with the appropriate lane. I.e. rings
511ae08745Sheppo  * which the switch exports are associated with the outbound lanes
521ae08745Sheppo  * while those which the network clients are exporting to the switch
531ae08745Sheppo  * are associated with the inbound lane.
541ae08745Sheppo  *
551ae08745Sheppo  * In diagram form the data structures look as follows:
561ae08745Sheppo  *
571ae08745Sheppo  * vsw instance
581ae08745Sheppo  *     |
591ae08745Sheppo  *     +----->port_t----->port_t----->port_t----->
601ae08745Sheppo  *		|
611ae08745Sheppo  *		+--->ldc_t--->ldc_t--->ldc_t--->
621ae08745Sheppo  *		       |
631ae08745Sheppo  *		       +--->lane_t (inbound)
641ae08745Sheppo  *		       |       |
651ae08745Sheppo  *		       |       +--->dring--->dring--->
661ae08745Sheppo  *		       |
671ae08745Sheppo  *		       +--->lane_t (outbound)
681ae08745Sheppo  *			       |
691ae08745Sheppo  *			       +--->dring--->dring--->
701ae08745Sheppo  *
711ae08745Sheppo  */
721ae08745Sheppo 
731ae08745Sheppo #ifndef	_VSW_H
741ae08745Sheppo #define	_VSW_H
751ae08745Sheppo 
761ae08745Sheppo #pragma ident	"%Z%%M%	%I%	%E% SMI"
771ae08745Sheppo 
781ae08745Sheppo #ifdef	__cplusplus
791ae08745Sheppo extern "C" {
801ae08745Sheppo #endif
811ae08745Sheppo 
821ae08745Sheppo #include <sys/vio_mailbox.h>
831ae08745Sheppo #include <sys/vnet_common.h>
841ae08745Sheppo #include <sys/ethernet.h>
85d10e4ef2Snarayan #include <sys/vio_util.h>
861ae08745Sheppo 
871ae08745Sheppo /*
881ae08745Sheppo  * Default message type.
891ae08745Sheppo  */
901ae08745Sheppo typedef struct def_msg {
911ae08745Sheppo 	uint64_t	data[8];
921ae08745Sheppo } def_msg_t;
931ae08745Sheppo 
941ae08745Sheppo /*
951ae08745Sheppo  * Currently only support one major/minor pair.
961ae08745Sheppo  */
971ae08745Sheppo #define	VSW_NUM_VER	1
981ae08745Sheppo 
991ae08745Sheppo typedef struct ver_sup {
1001ae08745Sheppo 	uint32_t	ver_major:16,
1011ae08745Sheppo 			ver_minor:16;
1021ae08745Sheppo } ver_sup_t;
1031ae08745Sheppo 
1041ae08745Sheppo /*
1051ae08745Sheppo  * Only support ETHER mtu at moment.
1061ae08745Sheppo  */
1071ae08745Sheppo #define	VSW_MTU		ETHERMAX
1081ae08745Sheppo 
1091ae08745Sheppo /*
1101ae08745Sheppo  * Lane states.
1111ae08745Sheppo  */
1121ae08745Sheppo #define	VSW_LANE_INACTIV	0x0	/* No params set for lane */
1131ae08745Sheppo 
1141ae08745Sheppo #define	VSW_VER_INFO_SENT	0x1	/* Version # sent to peer */
1151ae08745Sheppo #define	VSW_VER_INFO_RECV	0x2	/* Version # recv from peer */
1161ae08745Sheppo #define	VSW_VER_ACK_RECV	0x4
1171ae08745Sheppo #define	VSW_VER_ACK_SENT	0x8
1181ae08745Sheppo #define	VSW_VER_NACK_RECV	0x10
1191ae08745Sheppo #define	VSW_VER_NACK_SENT	0x20
1201ae08745Sheppo 
1211ae08745Sheppo #define	VSW_ATTR_INFO_SENT	0x40	/* Attributes sent to peer */
1221ae08745Sheppo #define	VSW_ATTR_INFO_RECV	0x80	/* Peer attributes received */
1231ae08745Sheppo #define	VSW_ATTR_ACK_SENT	0x100
1241ae08745Sheppo #define	VSW_ATTR_ACK_RECV	0x200
1251ae08745Sheppo #define	VSW_ATTR_NACK_SENT	0x400
1261ae08745Sheppo #define	VSW_ATTR_NACK_RECV	0x800
1271ae08745Sheppo 
1281ae08745Sheppo #define	VSW_DRING_INFO_SENT	0x1000	/* Dring info sent to peer */
1291ae08745Sheppo #define	VSW_DRING_INFO_RECV	0x2000	/* Dring info received */
1301ae08745Sheppo #define	VSW_DRING_ACK_SENT	0x4000
1311ae08745Sheppo #define	VSW_DRING_ACK_RECV	0x8000
1321ae08745Sheppo #define	VSW_DRING_NACK_SENT	0x10000
1331ae08745Sheppo #define	VSW_DRING_NACK_RECV	0x20000
1341ae08745Sheppo 
1351ae08745Sheppo #define	VSW_RDX_INFO_SENT	0x40000	/* RDX sent to peer */
1361ae08745Sheppo #define	VSW_RDX_INFO_RECV	0x80000	/* RDX received from peer */
1371ae08745Sheppo #define	VSW_RDX_ACK_SENT	0x100000
1381ae08745Sheppo #define	VSW_RDX_ACK_RECV	0x200000
1391ae08745Sheppo #define	VSW_RDX_NACK_SENT	0x400000
1401ae08745Sheppo #define	VSW_RDX_NACK_RECV	0x800000
1411ae08745Sheppo 
1421ae08745Sheppo #define	VSW_MCST_INFO_SENT	0x1000000
1431ae08745Sheppo #define	VSW_MCST_INFO_RECV	0x2000000
1441ae08745Sheppo #define	VSW_MCST_ACK_SENT	0x4000000
1451ae08745Sheppo #define	VSW_MCST_ACK_RECV	0x8000000
1461ae08745Sheppo #define	VSW_MCST_NACK_SENT	0x10000000
1471ae08745Sheppo #define	VSW_MCST_NACK_RECV	0x20000000
1481ae08745Sheppo 
1491ae08745Sheppo #define	VSW_LANE_ACTIVE		0x40000000	/* Lane open to xmit data */
1501ae08745Sheppo 
1511ae08745Sheppo /* Handshake milestones */
1521ae08745Sheppo #define	VSW_MILESTONE0		0x1	/* ver info exchanged */
1531ae08745Sheppo #define	VSW_MILESTONE1		0x2	/* attribute exchanged */
1541ae08745Sheppo #define	VSW_MILESTONE2		0x4	/* dring info exchanged */
1551ae08745Sheppo #define	VSW_MILESTONE3		0x8	/* rdx exchanged */
1561ae08745Sheppo #define	VSW_MILESTONE4		0x10	/* handshake complete */
1571ae08745Sheppo 
1581ae08745Sheppo /*
1591ae08745Sheppo  * Lane direction (relative to ourselves).
1601ae08745Sheppo  */
1611ae08745Sheppo #define	INBOUND			0x1
1621ae08745Sheppo #define	OUTBOUND		0x2
1631ae08745Sheppo 
1641ae08745Sheppo /* Peer session id received */
1651ae08745Sheppo #define	VSW_PEER_SESSION	0x1
1661ae08745Sheppo 
1671ae08745Sheppo /*
1681ae08745Sheppo  * Maximum number of consecutive reads of data from channel
1691ae08745Sheppo  */
1701ae08745Sheppo #define	VSW_MAX_CHAN_READ	50
1711ae08745Sheppo 
1721ae08745Sheppo /*
1731ae08745Sheppo  * Currently only support one ldc per port.
1741ae08745Sheppo  */
1751ae08745Sheppo #define	VSW_PORT_MAX_LDCS	1	/* max # of ldcs per port */
1761ae08745Sheppo 
1771ae08745Sheppo /*
1781ae08745Sheppo  * Used for port add/deletion.
1791ae08745Sheppo  */
1801ae08745Sheppo #define	VSW_PORT_UPDATED	0x1
1811ae08745Sheppo 
1821ae08745Sheppo #define	LDC_TX_SUCCESS		0	/* ldc transmit success */
1831ae08745Sheppo #define	LDC_TX_FAILURE		1	/* ldc transmit failure */
1841ae08745Sheppo #define	LDC_TX_NORESOURCES	2	/* out of descriptors */
1851ae08745Sheppo 
1861ae08745Sheppo /* ID of the source of a frame being switched */
1871ae08745Sheppo #define	VSW_PHYSDEV		1	/* physical device associated */
1881ae08745Sheppo #define	VSW_VNETPORT		2	/* port connected to vnet (over ldc) */
1891ae08745Sheppo #define	VSW_LOCALDEV		4	/* vsw configured as an eth interface */
1901ae08745Sheppo 
1911ae08745Sheppo /*
1921ae08745Sheppo  * Descriptor ring info
1931ae08745Sheppo  *
1941ae08745Sheppo  * Each descriptor element has a pre-allocated data buffer
1951ae08745Sheppo  * associated with it, into which data being transmitted is
1961ae08745Sheppo  * copied. By pre-allocating we speed up the copying process.
1971ae08745Sheppo  * The buffer is re-used once the peer has indicated that it is
1981ae08745Sheppo  * finished with the descriptor.
1991ae08745Sheppo  */
2001ae08745Sheppo #define	VSW_RING_NUM_EL		512	/* Num of entries in ring */
2011ae08745Sheppo #define	VSW_RING_EL_DATA_SZ	2048	/* Size of data section (bytes) */
2021ae08745Sheppo #define	VSW_PRIV_SIZE	sizeof (vnet_private_desc_t)
2031ae08745Sheppo #define	VSW_PUB_SIZE	sizeof (vnet_public_desc_t)
2041ae08745Sheppo 
2051ae08745Sheppo #define	VSW_MAX_COOKIES		((ETHERMTU >> MMU_PAGESHIFT) + 2)
2061ae08745Sheppo 
2071ae08745Sheppo /*
208*e1ebb9ecSlm66018  * LDC pkt tranfer MTU
209*e1ebb9ecSlm66018  */
210*e1ebb9ecSlm66018 #define	VSW_LDC_MTU	sizeof (def_msg_t)
211*e1ebb9ecSlm66018 
212*e1ebb9ecSlm66018 /*
213d10e4ef2Snarayan  * Size and number of mblks to be created in free pool.
214d10e4ef2Snarayan  */
215d10e4ef2Snarayan #define	VSW_MBLK_SIZE	2048
216d10e4ef2Snarayan #define	VSW_NUM_MBLKS	1024
217d10e4ef2Snarayan 
218d10e4ef2Snarayan /*
2191ae08745Sheppo  * Private descriptor
2201ae08745Sheppo  */
2211ae08745Sheppo typedef struct vsw_private_desc {
222d10e4ef2Snarayan 	/*
223d10e4ef2Snarayan 	 * Below lock must be held when accessing the state of
224d10e4ef2Snarayan 	 * a descriptor on either the private or public sections
225d10e4ef2Snarayan 	 * of the ring.
226d10e4ef2Snarayan 	 */
227d10e4ef2Snarayan 	kmutex_t		dstate_lock;
2281ae08745Sheppo 	uint64_t		dstate;
2291ae08745Sheppo 	vnet_public_desc_t	*descp;
2301ae08745Sheppo 	ldc_mem_handle_t	memhandle;
2311ae08745Sheppo 	void			*datap;
2321ae08745Sheppo 	uint64_t		datalen;
2331ae08745Sheppo 	uint64_t		ncookies;
2341ae08745Sheppo 	ldc_mem_cookie_t	memcookie[VSW_MAX_COOKIES];
2351ae08745Sheppo 	int			bound;
2361ae08745Sheppo } vsw_private_desc_t;
2371ae08745Sheppo 
2381ae08745Sheppo /*
2391ae08745Sheppo  * Descriptor ring structure
2401ae08745Sheppo  */
2411ae08745Sheppo typedef struct dring_info {
2421ae08745Sheppo 	struct	dring_info	*next;	/* next ring in chain */
2431ae08745Sheppo 	kmutex_t		dlock;
2441ae08745Sheppo 	uint32_t		num_descriptors;
2451ae08745Sheppo 	uint32_t		descriptor_size;
2461ae08745Sheppo 	uint32_t		options;
2471ae08745Sheppo 	uint32_t		ncookies;
2481ae08745Sheppo 	ldc_mem_cookie_t	cookie[1];
2491ae08745Sheppo 
2501ae08745Sheppo 	ldc_dring_handle_t	handle;
2511ae08745Sheppo 	uint64_t		ident;	/* identifier sent to peer */
2521ae08745Sheppo 	uint64_t		end_idx;	/* last idx processed */
253d10e4ef2Snarayan 	int64_t			last_ack_recv;
254d10e4ef2Snarayan 
255d10e4ef2Snarayan 	kmutex_t		restart_lock;
256d10e4ef2Snarayan 	boolean_t		restart_reqd;	/* send restart msg */
2571ae08745Sheppo 
2581ae08745Sheppo 	/*
2591ae08745Sheppo 	 * base address of private and public portions of the
2601ae08745Sheppo 	 * ring (where appropriate), and data block.
2611ae08745Sheppo 	 */
2621ae08745Sheppo 	void			*pub_addr;	/* base of public section */
2631ae08745Sheppo 	void			*priv_addr;	/* base of private section */
2641ae08745Sheppo 	void			*data_addr;	/* base of data section */
2651ae08745Sheppo 	size_t			data_sz;	/* size of data section */
2661ae08745Sheppo } dring_info_t;
2671ae08745Sheppo 
2681ae08745Sheppo /*
2691ae08745Sheppo  * Each ldc connection is comprised of two lanes, incoming
2701ae08745Sheppo  * from a peer, and outgoing to that peer. Each lane shares
2711ae08745Sheppo  * common ldc parameters and also has private lane-specific
2721ae08745Sheppo  * parameters.
2731ae08745Sheppo  */
2741ae08745Sheppo typedef struct lane {
2751ae08745Sheppo 	uint64_t	lstate;		/* Lane state */
2761ae08745Sheppo 	uint32_t	ver_major:16,	/* Version major number */
2771ae08745Sheppo 			ver_minor:16;	/* Version minor number */
278d10e4ef2Snarayan 	kmutex_t	seq_lock;
2791ae08745Sheppo 	uint64_t	seq_num;	/* Sequence number */
2801ae08745Sheppo 	uint64_t	mtu;		/* ETHERMTU */
2811ae08745Sheppo 	uint64_t	addr;		/* Unique physical address */
2821ae08745Sheppo 	uint8_t		addr_type;	/* Only MAC address at moment */
2831ae08745Sheppo 	uint8_t		xfer_mode;	/* Dring or Pkt based */
2841ae08745Sheppo 	uint8_t		ack_freq;	/* Only non zero for Pkt based xfer */
2851ae08745Sheppo 	dring_info_t	*dringp;	/* List of drings for this lane */
2861ae08745Sheppo } lane_t;
2871ae08745Sheppo 
2881ae08745Sheppo /* channel drain states */
2891ae08745Sheppo #define	VSW_LDC_INIT		0x1	/* Initial non-drain state */
2901ae08745Sheppo #define	VSW_LDC_DRAINING	0x2	/* Channel draining */
2911ae08745Sheppo 
2921ae08745Sheppo /* ldc information associated with a vsw-port */
2931ae08745Sheppo typedef struct vsw_ldc {
2941ae08745Sheppo 	struct vsw_ldc		*ldc_next;	/* next ldc in the list */
2951ae08745Sheppo 	struct vsw_port		*ldc_port;	/* associated port */
2961ae08745Sheppo 	struct vsw		*ldc_vswp;	/* associated vsw */
2971ae08745Sheppo 	kmutex_t		ldc_cblock;	/* sync callback processing */
2981ae08745Sheppo 	kmutex_t		ldc_txlock;	/* sync transmits */
2991ae08745Sheppo 	uint64_t		ldc_id;		/* channel number */
3001ae08745Sheppo 	ldc_handle_t		ldc_handle;	/* channel handle */
3011ae08745Sheppo 	kmutex_t		drain_cv_lock;
3021ae08745Sheppo 	kcondvar_t		drain_cv;	/* channel draining */
3031ae08745Sheppo 	int			drain_state;
3041ae08745Sheppo 	uint32_t		hphase;		/* handshake phase */
3051ae08745Sheppo 	int			hcnt;		/* # handshake attempts */
3061ae08745Sheppo 	ldc_status_t		ldc_status;	/* channel status */
3071ae08745Sheppo 	uint64_t		local_session;	/* Our session id */
3081ae08745Sheppo 	uint64_t		peer_session;	/* Our peers session id */
3091ae08745Sheppo 	uint8_t			session_status;	/* Session recv'd, sent */
3101ae08745Sheppo 	kmutex_t		hss_lock;
3111ae08745Sheppo 	uint32_t		hss_id;		/* Handshake session id */
3121ae08745Sheppo 	uint64_t		next_ident;	/* Next dring ident # to use */
3131ae08745Sheppo 	lane_t			lane_in;	/* Inbound lane */
3141ae08745Sheppo 	lane_t			lane_out;	/* Outbound lane */
3151ae08745Sheppo 	uint8_t			dev_class;	/* Peer device class */
316d10e4ef2Snarayan 	vio_mblk_pool_t		*rxh;		/* Receive pool handle */
3171ae08745Sheppo } vsw_ldc_t;
3181ae08745Sheppo 
3191ae08745Sheppo /* list of ldcs per port */
3201ae08745Sheppo typedef struct vsw_ldc_list {
3211ae08745Sheppo 	vsw_ldc_t	*head;		/* head of the list */
3221ae08745Sheppo 	krwlock_t	lockrw;		/* sync access(rw) to the list */
3231ae08745Sheppo 	int		num_ldcs;	/* number of ldcs in the list */
3241ae08745Sheppo } vsw_ldc_list_t;
3251ae08745Sheppo 
3261ae08745Sheppo /* multicast addresses port is interested in */
3271ae08745Sheppo typedef struct mcst_addr {
3281ae08745Sheppo 	struct mcst_addr	*nextp;
3291ae08745Sheppo 	uint64_t		addr;
3301ae08745Sheppo } mcst_addr_t;
3311ae08745Sheppo 
3321ae08745Sheppo /* Port detach states */
3331ae08745Sheppo #define	VSW_PORT_INIT		0x1	/* Initial non-detach state */
3341ae08745Sheppo #define	VSW_PORT_DETACHING	0x2	/* In process of being detached */
3351ae08745Sheppo #define	VSW_PORT_DETACHABLE	0x4	/* Safe to detach */
3361ae08745Sheppo 
337*e1ebb9ecSlm66018 #define	VSW_ADDR_UNSET		0x0	/* Addr not set */
338*e1ebb9ecSlm66018 #define	VSW_ADDR_HW		0x1	/* Addr programmed in HW */
339*e1ebb9ecSlm66018 #define	VSW_ADDR_PROMISC	0x2	/* Card in promisc to see addr */
340*e1ebb9ecSlm66018 
3411ae08745Sheppo /* port information associated with a vsw */
3421ae08745Sheppo typedef struct vsw_port {
3431ae08745Sheppo 	int			p_instance;	/* port instance */
3441ae08745Sheppo 	struct vsw_port		*p_next;	/* next port in the list */
3451ae08745Sheppo 	struct vsw		*p_vswp;	/* associated vsw */
3461ae08745Sheppo 	vsw_ldc_list_t		p_ldclist;	/* list of ldcs for this port */
3471ae08745Sheppo 
3481ae08745Sheppo 	kmutex_t		tx_lock;	/* transmit lock */
3491ae08745Sheppo 	int			(*transmit)(vsw_ldc_t *, mblk_t *);
3501ae08745Sheppo 
3511ae08745Sheppo 	int			state;		/* port state */
3521ae08745Sheppo 	kmutex_t		state_lock;
3531ae08745Sheppo 	kcondvar_t		state_cv;
3541ae08745Sheppo 
3551ae08745Sheppo 	int			ref_cnt;	/* # of active references */
3561ae08745Sheppo 	kmutex_t		ref_lock;
3571ae08745Sheppo 	kcondvar_t		ref_cv;
3581ae08745Sheppo 
3591ae08745Sheppo 	kmutex_t		mca_lock;	/* multicast lock */
3601ae08745Sheppo 	mcst_addr_t		*mcap;		/* list of multicast addrs */
3611ae08745Sheppo 
362*e1ebb9ecSlm66018 	mac_addr_slot_t		addr_slot;	/* Unicast address slot */
363*e1ebb9ecSlm66018 	int			addr_set;	/* Addr set where */
364*e1ebb9ecSlm66018 
3651ae08745Sheppo 	/*
3661ae08745Sheppo 	 * mac address of the port & connected device
3671ae08745Sheppo 	 */
3681ae08745Sheppo 	struct ether_addr	p_macaddr;
3691ae08745Sheppo } vsw_port_t;
3701ae08745Sheppo 
3711ae08745Sheppo /* list of ports per vsw */
3721ae08745Sheppo typedef struct vsw_port_list {
3731ae08745Sheppo 	vsw_port_t	*head;		/* head of the list */
3741ae08745Sheppo 	krwlock_t	lockrw;		/* sync access(rw) to the list */
3751ae08745Sheppo 	int		num_ports;	/* number of ports in the list */
3761ae08745Sheppo } vsw_port_list_t;
3771ae08745Sheppo 
3781ae08745Sheppo /*
3791ae08745Sheppo  * Taskq control message
3801ae08745Sheppo  */
3811ae08745Sheppo typedef struct vsw_ctrl_task {
3821ae08745Sheppo 	vsw_ldc_t	*ldcp;
3831ae08745Sheppo 	def_msg_t	pktp;
3841ae08745Sheppo 	uint32_t	hss_id;
3851ae08745Sheppo } vsw_ctrl_task_t;
3861ae08745Sheppo 
3871ae08745Sheppo /*
3881ae08745Sheppo  * Number of hash chains in the multicast forwarding database.
3891ae08745Sheppo  */
3901ae08745Sheppo #define		VSW_NCHAINS	8
3911ae08745Sheppo 
3921ae08745Sheppo /*
3931ae08745Sheppo  * State of interface if switch plumbed as network device.
3941ae08745Sheppo  */
395ba2e4443Sseb #define		VSW_IF_REG	0x1	/* interface was registered */
396ba2e4443Sseb #define		VSW_IF_UP	0x2	/* Interface UP */
397ba2e4443Sseb #define		VSW_IF_PROMISC	0x4	/* Interface in promiscious mode */
3981ae08745Sheppo 
3991ae08745Sheppo #define		VSW_U_P(state)	\
4001ae08745Sheppo 			(state == (VSW_IF_UP | VSW_IF_PROMISC))
4011ae08745Sheppo 
4021ae08745Sheppo /*
4031ae08745Sheppo  * Switching modes.
4041ae08745Sheppo  */
4051ae08745Sheppo #define		VSW_LAYER2		0x1	/* Layer 2 - MAC switching */
4061ae08745Sheppo #define		VSW_LAYER2_PROMISC	0x2	/* Layer 2 + promisc mode */
4071ae08745Sheppo #define		VSW_LAYER3		0x4	/* Layer 3 - IP switching */
4081ae08745Sheppo 
4091ae08745Sheppo #define		NUM_SMODES	3	/* number of switching modes */
4101ae08745Sheppo 
4111ae08745Sheppo /*
412*e1ebb9ecSlm66018  * Bits indicating which properties we've read from MD or physical device.
4131ae08745Sheppo  */
4141ae08745Sheppo #define		VSW_MD_PHYSNAME	0x1
4151ae08745Sheppo #define		VSW_MD_MACADDR	0x2
416*e1ebb9ecSlm66018 #define		VSW_DEV_MACADDR	0x4
417*e1ebb9ecSlm66018 #define		VSW_MD_SMODE	0x8
4181ae08745Sheppo 
4191ae08745Sheppo /*
4201ae08745Sheppo  * vsw instance state information.
4211ae08745Sheppo  */
4221ae08745Sheppo typedef struct	vsw {
4231ae08745Sheppo 	int			instance;	/* instance # */
4241ae08745Sheppo 	dev_info_t		*dip;		/* associated dev_info */
4251ae08745Sheppo 	struct vsw		*next;		/* next in list */
4261ae08745Sheppo 	char			physname[LIFNAMSIZ];	/* phys-dev */
4271ae08745Sheppo 	uint8_t			smode[NUM_SMODES];	/* switching mode */
4281ae08745Sheppo 	int			smode_idx;	/* curr pos in smode array */
429*e1ebb9ecSlm66018 	int			smode_num;	/* # of modes specified */
4301ae08745Sheppo 	uint8_t			mdprops;	/* bitmask of props found */
4311ae08745Sheppo 	vsw_port_list_t		plist;		/* associated ports */
4321ae08745Sheppo 	ddi_taskq_t		*taskq_p;	/* VIO ctrl msg taskq */
4331ae08745Sheppo 	mod_hash_t		*fdb;		/* forwarding database */
4341ae08745Sheppo 
4351ae08745Sheppo 	mod_hash_t		*mfdb;		/* multicast FDB */
4361ae08745Sheppo 	krwlock_t		mfdbrw;		/* rwlock for mFDB */
4371ae08745Sheppo 
438d10e4ef2Snarayan 	vio_mblk_pool_t		*rxh;		/* Receive pool handle */
439d10e4ef2Snarayan 
4401ae08745Sheppo 	/* mac layer */
4411ae08745Sheppo 	mac_handle_t		mh;
4421ae08745Sheppo 	mac_rx_handle_t		mrh;
443*e1ebb9ecSlm66018 	multiaddress_capab_t	maddr;		/* Multiple uni addr capable */
4441ae08745Sheppo 	const mac_txinfo_t	*txinfo;	/* MAC tx routine */
4451ae08745Sheppo 
446*e1ebb9ecSlm66018 	boolean_t		recfg_reqd;	/* Reconfig of addrs needed */
447*e1ebb9ecSlm66018 	int			promisc_cnt;
4481ae08745Sheppo 
4491ae08745Sheppo 	/* Machine Description updates  */
4501ae08745Sheppo 	mdeg_node_spec_t	*inst_spec;
4511ae08745Sheppo 	mdeg_handle_t		mdeg_hdl;
4521ae08745Sheppo 
4531ae08745Sheppo 	/* if configured as an ethernet interface */
454ba2e4443Sseb 	mac_handle_t		if_mh;		/* MAC handle */
4551ae08745Sheppo 	struct ether_addr	if_addr;	/* interface address */
4561ae08745Sheppo 	krwlock_t		if_lockrw;
4571ae08745Sheppo 	uint8_t			if_state;	/* interface state */
4581ae08745Sheppo 
4591ae08745Sheppo 	/* multicast addresses when configured as eth interface */
4601ae08745Sheppo 	kmutex_t		mca_lock;	/* multicast lock */
4611ae08745Sheppo 	mcst_addr_t		*mcap;		/* list of multicast addrs */
4621ae08745Sheppo } vsw_t;
4631ae08745Sheppo 
4641ae08745Sheppo 
4651ae08745Sheppo /*
4661ae08745Sheppo  * Ethernet broadcast address definition.
4671ae08745Sheppo  */
4681ae08745Sheppo static	struct	ether_addr	etherbroadcastaddr = {
4691ae08745Sheppo 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff
4701ae08745Sheppo };
4711ae08745Sheppo 
4721ae08745Sheppo #define	IS_BROADCAST(ehp) \
4731ae08745Sheppo 	(ether_cmp(&ehp->ether_dhost, &etherbroadcastaddr) == 0)
4741ae08745Sheppo #define	IS_MULTICAST(ehp) \
4751ae08745Sheppo 	((ehp->ether_dhost.ether_addr_octet[0] & 01) == 1)
4761ae08745Sheppo 
4771ae08745Sheppo #define	READ_ENTER(x)	rw_enter(x, RW_READER)
4781ae08745Sheppo #define	WRITE_ENTER(x)	rw_enter(x, RW_WRITER)
4791ae08745Sheppo #define	RW_EXIT(x)	rw_exit(x)
4801ae08745Sheppo 
4811ae08745Sheppo #ifdef	__cplusplus
4821ae08745Sheppo }
4831ae08745Sheppo #endif
4841ae08745Sheppo 
4851ae08745Sheppo #endif	/* _VSW_H */
486