xref: /titanic_53/usr/src/uts/intel/sys/pcb.h (revision 7c478bd95313f5f23a4c958a745db2134aa03244)
1*7c478bd9Sstevel@tonic-gate /*
2*7c478bd9Sstevel@tonic-gate  * CDDL HEADER START
3*7c478bd9Sstevel@tonic-gate  *
4*7c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*7c478bd9Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*7c478bd9Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*7c478bd9Sstevel@tonic-gate  * with the License.
8*7c478bd9Sstevel@tonic-gate  *
9*7c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*7c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*7c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*7c478bd9Sstevel@tonic-gate  * and limitations under the License.
13*7c478bd9Sstevel@tonic-gate  *
14*7c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*7c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*7c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*7c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*7c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*7c478bd9Sstevel@tonic-gate  *
20*7c478bd9Sstevel@tonic-gate  * CDDL HEADER END
21*7c478bd9Sstevel@tonic-gate  */
22*7c478bd9Sstevel@tonic-gate /*
23*7c478bd9Sstevel@tonic-gate  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*7c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
25*7c478bd9Sstevel@tonic-gate  */
26*7c478bd9Sstevel@tonic-gate 
27*7c478bd9Sstevel@tonic-gate #ifndef _SYS_PCB_H
28*7c478bd9Sstevel@tonic-gate #define	_SYS_PCB_H
29*7c478bd9Sstevel@tonic-gate 
30*7c478bd9Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*7c478bd9Sstevel@tonic-gate 
32*7c478bd9Sstevel@tonic-gate #include <sys/regset.h>
33*7c478bd9Sstevel@tonic-gate #include <sys/segments.h>
34*7c478bd9Sstevel@tonic-gate 
35*7c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
36*7c478bd9Sstevel@tonic-gate extern "C" {
37*7c478bd9Sstevel@tonic-gate #endif
38*7c478bd9Sstevel@tonic-gate 
39*7c478bd9Sstevel@tonic-gate #ifndef _ASM
40*7c478bd9Sstevel@tonic-gate typedef struct fpu_ctx {
41*7c478bd9Sstevel@tonic-gate 	kfpu_t		fpu_regs;	/* kernel save area for FPU */
42*7c478bd9Sstevel@tonic-gate 	uint_t		fpu_flags;	/* FPU state flags */
43*7c478bd9Sstevel@tonic-gate } fpu_ctx_t;
44*7c478bd9Sstevel@tonic-gate 
45*7c478bd9Sstevel@tonic-gate typedef struct pcb {
46*7c478bd9Sstevel@tonic-gate 	fpu_ctx_t	pcb_fpu;	/* fpu state */
47*7c478bd9Sstevel@tonic-gate 	uint_t		pcb_flags;	/* state flags; cleared on fork */
48*7c478bd9Sstevel@tonic-gate 	greg_t		pcb_drstat;	/* status debug register (%dr6) */
49*7c478bd9Sstevel@tonic-gate 	unsigned char	pcb_instr;	/* /proc: instruction at stop */
50*7c478bd9Sstevel@tonic-gate #if defined(__amd64)
51*7c478bd9Sstevel@tonic-gate 	uintptr_t	pcb_fsbase;
52*7c478bd9Sstevel@tonic-gate 	uintptr_t	pcb_gsbase;
53*7c478bd9Sstevel@tonic-gate 	selector_t	pcb_ds;
54*7c478bd9Sstevel@tonic-gate 	selector_t	pcb_es;
55*7c478bd9Sstevel@tonic-gate 	selector_t	pcb_fs;
56*7c478bd9Sstevel@tonic-gate 	selector_t	pcb_gs;
57*7c478bd9Sstevel@tonic-gate #endif /* __amd64 */
58*7c478bd9Sstevel@tonic-gate 	user_desc_t	pcb_fsdesc;	/* private per-lwp %fs descriptors */
59*7c478bd9Sstevel@tonic-gate 	user_desc_t	pcb_gsdesc;	/* private per-lwp %gs descriptors */
60*7c478bd9Sstevel@tonic-gate } pcb_t;
61*7c478bd9Sstevel@tonic-gate 
62*7c478bd9Sstevel@tonic-gate #endif /* ! _ASM */
63*7c478bd9Sstevel@tonic-gate 
64*7c478bd9Sstevel@tonic-gate /* pcb_flags */
65*7c478bd9Sstevel@tonic-gate #define	DEBUG_PENDING	0x02	/* single-step of lcall for a sys call */
66*7c478bd9Sstevel@tonic-gate #define	INSTR_VALID	0x08	/* value in pcb_instr is valid (/proc) */
67*7c478bd9Sstevel@tonic-gate #define	NORMAL_STEP	0x10	/* normal debugger-requested single-step */
68*7c478bd9Sstevel@tonic-gate #define	WATCH_STEP	0x20	/* single-stepping in watchpoint emulation */
69*7c478bd9Sstevel@tonic-gate #define	CPC_OVERFLOW	0x40	/* performance counters overflowed */
70*7c478bd9Sstevel@tonic-gate #define	RUPDATE_PENDING	0x80	/* new register values in the pcb -> regs */
71*7c478bd9Sstevel@tonic-gate 
72*7c478bd9Sstevel@tonic-gate /* fpu_flags */
73*7c478bd9Sstevel@tonic-gate #define	FPU_EN		0x1	/* flag signifying fpu in use */
74*7c478bd9Sstevel@tonic-gate #define	FPU_VALID	0x2	/* fpu_regs has valid fpu state */
75*7c478bd9Sstevel@tonic-gate #define	FPU_MODIFIED	0x4	/* fpu_regs is modified (/proc) */
76*7c478bd9Sstevel@tonic-gate 
77*7c478bd9Sstevel@tonic-gate #define	FPU_INVALID	0x0	/* fpu context is not in use */
78*7c478bd9Sstevel@tonic-gate 
79*7c478bd9Sstevel@tonic-gate /* fpu_flags */
80*7c478bd9Sstevel@tonic-gate 
81*7c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
82*7c478bd9Sstevel@tonic-gate }
83*7c478bd9Sstevel@tonic-gate #endif
84*7c478bd9Sstevel@tonic-gate 
85*7c478bd9Sstevel@tonic-gate #endif	/* _SYS_PCB_H */
86