xref: /titanic_53/usr/src/uts/i86pc/io/rootnex.c (revision b51bbbf59a7a1941f5e9531370c2f87d8cd7f621)
17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
500d0963fSdilpreet  * Common Development and Distribution License (the "License").
600d0963fSdilpreet  * You may not use this file except in compliance with the License.
77c478bd9Sstevel@tonic-gate  *
87c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
107c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
117c478bd9Sstevel@tonic-gate  * and limitations under the License.
127c478bd9Sstevel@tonic-gate  *
137c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
147c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
167c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
177c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bd9Sstevel@tonic-gate  *
197c478bd9Sstevel@tonic-gate  * CDDL HEADER END
207c478bd9Sstevel@tonic-gate  */
217c478bd9Sstevel@tonic-gate /*
22e085f153SVikram Hegde  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
237c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
247c478bd9Sstevel@tonic-gate  */
257c478bd9Sstevel@tonic-gate 
267c478bd9Sstevel@tonic-gate /*
2712f080e7Smrj  * x86 root nexus driver
287c478bd9Sstevel@tonic-gate  */
297c478bd9Sstevel@tonic-gate 
307c478bd9Sstevel@tonic-gate #include <sys/sysmacros.h>
317c478bd9Sstevel@tonic-gate #include <sys/conf.h>
327c478bd9Sstevel@tonic-gate #include <sys/autoconf.h>
337c478bd9Sstevel@tonic-gate #include <sys/sysmacros.h>
347c478bd9Sstevel@tonic-gate #include <sys/debug.h>
357c478bd9Sstevel@tonic-gate #include <sys/psw.h>
367c478bd9Sstevel@tonic-gate #include <sys/ddidmareq.h>
377c478bd9Sstevel@tonic-gate #include <sys/promif.h>
387c478bd9Sstevel@tonic-gate #include <sys/devops.h>
397c478bd9Sstevel@tonic-gate #include <sys/kmem.h>
407c478bd9Sstevel@tonic-gate #include <sys/cmn_err.h>
417c478bd9Sstevel@tonic-gate #include <vm/seg.h>
427c478bd9Sstevel@tonic-gate #include <vm/seg_kmem.h>
437c478bd9Sstevel@tonic-gate #include <vm/seg_dev.h>
447c478bd9Sstevel@tonic-gate #include <sys/vmem.h>
457c478bd9Sstevel@tonic-gate #include <sys/mman.h>
467c478bd9Sstevel@tonic-gate #include <vm/hat.h>
477c478bd9Sstevel@tonic-gate #include <vm/as.h>
487c478bd9Sstevel@tonic-gate #include <vm/page.h>
497c478bd9Sstevel@tonic-gate #include <sys/avintr.h>
507c478bd9Sstevel@tonic-gate #include <sys/errno.h>
517c478bd9Sstevel@tonic-gate #include <sys/modctl.h>
527c478bd9Sstevel@tonic-gate #include <sys/ddi_impldefs.h>
537c478bd9Sstevel@tonic-gate #include <sys/sunddi.h>
547c478bd9Sstevel@tonic-gate #include <sys/sunndi.h>
557a364d25Sschwartz #include <sys/mach_intr.h>
567c478bd9Sstevel@tonic-gate #include <sys/psm.h>
577c478bd9Sstevel@tonic-gate #include <sys/ontrap.h>
5812f080e7Smrj #include <sys/atomic.h>
5912f080e7Smrj #include <sys/sdt.h>
6012f080e7Smrj #include <sys/rootnex.h>
6112f080e7Smrj #include <vm/hat_i86.h>
6200d0963fSdilpreet #include <sys/ddifm.h>
6336945f79Smrj #include <sys/ddi_isa.h>
647c478bd9Sstevel@tonic-gate 
65843e1988Sjohnlev #ifdef __xpv
66843e1988Sjohnlev #include <sys/bootinfo.h>
67843e1988Sjohnlev #include <sys/hypervisor.h>
68843e1988Sjohnlev #include <sys/bootconf.h>
69843e1988Sjohnlev #include <vm/kboot_mmu.h>
7020906b23SVikram Hegde #else
7120906b23SVikram Hegde #include <sys/intel_iommu.h>
72843e1988Sjohnlev #endif
73843e1988Sjohnlev 
7486c1f4dcSVikram Hegde 
7512f080e7Smrj /*
7612f080e7Smrj  * enable/disable extra checking of function parameters. Useful for debugging
7712f080e7Smrj  * drivers.
7812f080e7Smrj  */
7912f080e7Smrj #ifdef	DEBUG
8012f080e7Smrj int rootnex_alloc_check_parms = 1;
8112f080e7Smrj int rootnex_bind_check_parms = 1;
8212f080e7Smrj int rootnex_bind_check_inuse = 1;
8312f080e7Smrj int rootnex_unbind_verify_buffer = 0;
8412f080e7Smrj int rootnex_sync_check_parms = 1;
8512f080e7Smrj #else
8612f080e7Smrj int rootnex_alloc_check_parms = 0;
8712f080e7Smrj int rootnex_bind_check_parms = 0;
8812f080e7Smrj int rootnex_bind_check_inuse = 0;
8912f080e7Smrj int rootnex_unbind_verify_buffer = 0;
9012f080e7Smrj int rootnex_sync_check_parms = 0;
9112f080e7Smrj #endif
927c478bd9Sstevel@tonic-gate 
937aec1d6eScindi /* Master Abort and Target Abort panic flag */
947aec1d6eScindi int rootnex_fm_ma_ta_panic_flag = 0;
957aec1d6eScindi 
9612f080e7Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */
977c478bd9Sstevel@tonic-gate int rootnex_bind_fail = 1;
987c478bd9Sstevel@tonic-gate int rootnex_bind_warn = 1;
997c478bd9Sstevel@tonic-gate uint8_t *rootnex_warn_list;
1007c478bd9Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */
1017c478bd9Sstevel@tonic-gate #define	ROOTNEX_BIND_WARNING	(0x1 << 0)
1027c478bd9Sstevel@tonic-gate 
1037c478bd9Sstevel@tonic-gate /*
10412f080e7Smrj  * revert back to old broken behavior of always sync'ing entire copy buffer.
10512f080e7Smrj  * This is useful if be have a buggy driver which doesn't correctly pass in
10612f080e7Smrj  * the offset and size into ddi_dma_sync().
1077c478bd9Sstevel@tonic-gate  */
10812f080e7Smrj int rootnex_sync_ignore_params = 0;
1097c478bd9Sstevel@tonic-gate 
1107c478bd9Sstevel@tonic-gate /*
11112f080e7Smrj  * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1
11212f080e7Smrj  * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a
11312f080e7Smrj  * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit
11412f080e7Smrj  * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65
11512f080e7Smrj  * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages
11612f080e7Smrj  * (< 8K). We will still need to allocate the copy buffer during bind though
11712f080e7Smrj  * (if we need one). These can only be modified in /etc/system before rootnex
11812f080e7Smrj  * attach.
1197c478bd9Sstevel@tonic-gate  */
12012f080e7Smrj #if defined(__amd64)
12112f080e7Smrj int rootnex_prealloc_cookies = 65;
12212f080e7Smrj int rootnex_prealloc_windows = 4;
12312f080e7Smrj int rootnex_prealloc_copybuf = 2;
12412f080e7Smrj #else
12512f080e7Smrj int rootnex_prealloc_cookies = 33;
12612f080e7Smrj int rootnex_prealloc_windows = 4;
12712f080e7Smrj int rootnex_prealloc_copybuf = 2;
12812f080e7Smrj #endif
1297c478bd9Sstevel@tonic-gate 
13012f080e7Smrj /* driver global state */
13112f080e7Smrj static rootnex_state_t *rootnex_state;
13212f080e7Smrj 
13312f080e7Smrj /* shortcut to rootnex counters */
13412f080e7Smrj static uint64_t *rootnex_cnt;
1357c478bd9Sstevel@tonic-gate 
1367c478bd9Sstevel@tonic-gate /*
13712f080e7Smrj  * XXX - does x86 even need these or are they left over from the SPARC days?
1387c478bd9Sstevel@tonic-gate  */
13912f080e7Smrj /* statically defined integer/boolean properties for the root node */
14012f080e7Smrj static rootnex_intprop_t rootnex_intprp[] = {
14112f080e7Smrj 	{ "PAGESIZE",			PAGESIZE },
14212f080e7Smrj 	{ "MMU_PAGESIZE",		MMU_PAGESIZE },
14312f080e7Smrj 	{ "MMU_PAGEOFFSET",		MMU_PAGEOFFSET },
14412f080e7Smrj 	{ DDI_RELATIVE_ADDRESSING,	1 },
14512f080e7Smrj };
14612f080e7Smrj #define	NROOT_INTPROPS	(sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t))
1477c478bd9Sstevel@tonic-gate 
148843e1988Sjohnlev #ifdef __xpv
149843e1988Sjohnlev typedef maddr_t rootnex_addr_t;
150843e1988Sjohnlev #define	ROOTNEX_PADDR_TO_RBASE(xinfo, pa)	\
151843e1988Sjohnlev 	(DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa))
152843e1988Sjohnlev #else
153843e1988Sjohnlev typedef paddr_t rootnex_addr_t;
154843e1988Sjohnlev #endif
155843e1988Sjohnlev 
15620906b23SVikram Hegde #if !defined(__xpv)
15720906b23SVikram Hegde char _depends_on[] = "mach/pcplusmp misc/iommulib";
15820906b23SVikram Hegde #endif
1597c478bd9Sstevel@tonic-gate 
16012f080e7Smrj static struct cb_ops rootnex_cb_ops = {
16112f080e7Smrj 	nodev,		/* open */
16212f080e7Smrj 	nodev,		/* close */
16312f080e7Smrj 	nodev,		/* strategy */
16412f080e7Smrj 	nodev,		/* print */
16512f080e7Smrj 	nodev,		/* dump */
16612f080e7Smrj 	nodev,		/* read */
16712f080e7Smrj 	nodev,		/* write */
16812f080e7Smrj 	nodev,		/* ioctl */
16912f080e7Smrj 	nodev,		/* devmap */
17012f080e7Smrj 	nodev,		/* mmap */
17112f080e7Smrj 	nodev,		/* segmap */
17212f080e7Smrj 	nochpoll,	/* chpoll */
17312f080e7Smrj 	ddi_prop_op,	/* cb_prop_op */
17412f080e7Smrj 	NULL,		/* struct streamtab */
17512f080e7Smrj 	D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */
17612f080e7Smrj 	CB_REV,		/* Rev */
17712f080e7Smrj 	nodev,		/* cb_aread */
17812f080e7Smrj 	nodev		/* cb_awrite */
17912f080e7Smrj };
1807c478bd9Sstevel@tonic-gate 
18112f080e7Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp,
1827c478bd9Sstevel@tonic-gate     off_t offset, off_t len, caddr_t *vaddrp);
18312f080e7Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip,
1847c478bd9Sstevel@tonic-gate     struct hat *hat, struct seg *seg, caddr_t addr,
1857c478bd9Sstevel@tonic-gate     struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock);
18612f080e7Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip,
1877c478bd9Sstevel@tonic-gate     struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep);
18812f080e7Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip,
18912f080e7Smrj     ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
19012f080e7Smrj     ddi_dma_handle_t *handlep);
19112f080e7Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip,
19212f080e7Smrj     ddi_dma_handle_t handle);
19312f080e7Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
19412f080e7Smrj     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
19512f080e7Smrj     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
19612f080e7Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
19712f080e7Smrj     ddi_dma_handle_t handle);
19812f080e7Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip,
19912f080e7Smrj     ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags);
20012f080e7Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip,
20112f080e7Smrj     ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp,
20212f080e7Smrj     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
20312f080e7Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip,
2047c478bd9Sstevel@tonic-gate     ddi_dma_handle_t handle, enum ddi_dma_ctlops request,
2057c478bd9Sstevel@tonic-gate     off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags);
20612f080e7Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip,
20712f080e7Smrj     ddi_ctl_enum_t ctlop, void *arg, void *result);
20800d0963fSdilpreet static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap,
20900d0963fSdilpreet     ddi_iblock_cookie_t *ibc);
21012f080e7Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip,
21112f080e7Smrj     ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result);
2127c478bd9Sstevel@tonic-gate 
21320906b23SVikram Hegde static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip,
21420906b23SVikram Hegde     ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
21520906b23SVikram Hegde     ddi_dma_handle_t *handlep);
21620906b23SVikram Hegde static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip,
21720906b23SVikram Hegde     ddi_dma_handle_t handle);
21820906b23SVikram Hegde static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
21920906b23SVikram Hegde     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
22020906b23SVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
22120906b23SVikram Hegde static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
22220906b23SVikram Hegde     ddi_dma_handle_t handle);
2235dfdb46bSVikram Hegde #if !defined(__xpv)
22420906b23SVikram Hegde static void rootnex_coredma_reset_cookies(dev_info_t *dip,
22520906b23SVikram Hegde     ddi_dma_handle_t handle);
22620906b23SVikram Hegde static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
22794f1124eSVikram Hegde     ddi_dma_cookie_t **cookiepp, uint_t *ccountp);
22894f1124eSVikram Hegde static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
22994f1124eSVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t ccount);
23094f1124eSVikram Hegde static int rootnex_coredma_clear_cookies(dev_info_t *dip,
23194f1124eSVikram Hegde     ddi_dma_handle_t handle);
23294f1124eSVikram Hegde static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle);
2335dfdb46bSVikram Hegde #endif
23420906b23SVikram Hegde static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip,
23520906b23SVikram Hegde     ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags);
23620906b23SVikram Hegde static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip,
23720906b23SVikram Hegde     ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp,
23820906b23SVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t *ccountp);
2397c478bd9Sstevel@tonic-gate 
2407c478bd9Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = {
2417c478bd9Sstevel@tonic-gate 	BUSO_REV,
2427c478bd9Sstevel@tonic-gate 	rootnex_map,
2437c478bd9Sstevel@tonic-gate 	NULL,
2447c478bd9Sstevel@tonic-gate 	NULL,
2457c478bd9Sstevel@tonic-gate 	NULL,
2467c478bd9Sstevel@tonic-gate 	rootnex_map_fault,
2477c478bd9Sstevel@tonic-gate 	rootnex_dma_map,
2487c478bd9Sstevel@tonic-gate 	rootnex_dma_allochdl,
2497c478bd9Sstevel@tonic-gate 	rootnex_dma_freehdl,
2507c478bd9Sstevel@tonic-gate 	rootnex_dma_bindhdl,
2517c478bd9Sstevel@tonic-gate 	rootnex_dma_unbindhdl,
25212f080e7Smrj 	rootnex_dma_sync,
2537c478bd9Sstevel@tonic-gate 	rootnex_dma_win,
2547c478bd9Sstevel@tonic-gate 	rootnex_dma_mctl,
2557c478bd9Sstevel@tonic-gate 	rootnex_ctlops,
2567c478bd9Sstevel@tonic-gate 	ddi_bus_prop_op,
2577c478bd9Sstevel@tonic-gate 	i_ddi_rootnex_get_eventcookie,
2587c478bd9Sstevel@tonic-gate 	i_ddi_rootnex_add_eventcall,
2597c478bd9Sstevel@tonic-gate 	i_ddi_rootnex_remove_eventcall,
2607c478bd9Sstevel@tonic-gate 	i_ddi_rootnex_post_event,
2617c478bd9Sstevel@tonic-gate 	0,			/* bus_intr_ctl */
2627c478bd9Sstevel@tonic-gate 	0,			/* bus_config */
2637c478bd9Sstevel@tonic-gate 	0,			/* bus_unconfig */
26400d0963fSdilpreet 	rootnex_fm_init,	/* bus_fm_init */
2657c478bd9Sstevel@tonic-gate 	NULL,			/* bus_fm_fini */
2667c478bd9Sstevel@tonic-gate 	NULL,			/* bus_fm_access_enter */
2677c478bd9Sstevel@tonic-gate 	NULL,			/* bus_fm_access_exit */
2687c478bd9Sstevel@tonic-gate 	NULL,			/* bus_powr */
2697c478bd9Sstevel@tonic-gate 	rootnex_intr_ops	/* bus_intr_op */
2707c478bd9Sstevel@tonic-gate };
2717c478bd9Sstevel@tonic-gate 
27212f080e7Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
27312f080e7Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
2747c478bd9Sstevel@tonic-gate 
2757c478bd9Sstevel@tonic-gate static struct dev_ops rootnex_ops = {
2767c478bd9Sstevel@tonic-gate 	DEVO_REV,
27712f080e7Smrj 	0,
27812f080e7Smrj 	ddi_no_info,
2797c478bd9Sstevel@tonic-gate 	nulldev,
28012f080e7Smrj 	nulldev,
2817c478bd9Sstevel@tonic-gate 	rootnex_attach,
28212f080e7Smrj 	rootnex_detach,
28312f080e7Smrj 	nulldev,
28412f080e7Smrj 	&rootnex_cb_ops,
28519397407SSherry Moore 	&rootnex_bus_ops,
28619397407SSherry Moore 	NULL,
28719397407SSherry Moore 	ddi_quiesce_not_needed,		/* quiesce */
2887c478bd9Sstevel@tonic-gate };
2897c478bd9Sstevel@tonic-gate 
29012f080e7Smrj static struct modldrv rootnex_modldrv = {
29112f080e7Smrj 	&mod_driverops,
292613b2871SRichard Bean 	"i86pc root nexus",
29312f080e7Smrj 	&rootnex_ops
2947c478bd9Sstevel@tonic-gate };
2957c478bd9Sstevel@tonic-gate 
29612f080e7Smrj static struct modlinkage rootnex_modlinkage = {
29712f080e7Smrj 	MODREV_1,
29812f080e7Smrj 	(void *)&rootnex_modldrv,
29912f080e7Smrj 	NULL
3007c478bd9Sstevel@tonic-gate };
3017c478bd9Sstevel@tonic-gate 
3025dfdb46bSVikram Hegde #if !defined(__xpv)
30320906b23SVikram Hegde static iommulib_nexops_t iommulib_nexops = {
30420906b23SVikram Hegde 	IOMMU_NEXOPS_VERSION,
30520906b23SVikram Hegde 	"Rootnex IOMMU ops Vers 1.1",
30620906b23SVikram Hegde 	NULL,
30720906b23SVikram Hegde 	rootnex_coredma_allochdl,
30820906b23SVikram Hegde 	rootnex_coredma_freehdl,
30920906b23SVikram Hegde 	rootnex_coredma_bindhdl,
31020906b23SVikram Hegde 	rootnex_coredma_unbindhdl,
31120906b23SVikram Hegde 	rootnex_coredma_reset_cookies,
31220906b23SVikram Hegde 	rootnex_coredma_get_cookies,
31394f1124eSVikram Hegde 	rootnex_coredma_set_cookies,
31494f1124eSVikram Hegde 	rootnex_coredma_clear_cookies,
31594f1124eSVikram Hegde 	rootnex_coredma_get_sleep_flags,
31620906b23SVikram Hegde 	rootnex_coredma_sync,
31720906b23SVikram Hegde 	rootnex_coredma_win,
318*b51bbbf5SVikram Hegde 	rootnex_dma_map,
319*b51bbbf5SVikram Hegde 	rootnex_dma_mctl
32020906b23SVikram Hegde };
3215dfdb46bSVikram Hegde #endif
3227c478bd9Sstevel@tonic-gate 
32312f080e7Smrj /*
32412f080e7Smrj  *  extern hacks
32512f080e7Smrj  */
32612f080e7Smrj extern struct seg_ops segdev_ops;
32712f080e7Smrj extern int ignore_hardware_nodes;	/* force flag from ddi_impl.c */
32812f080e7Smrj #ifdef	DDI_MAP_DEBUG
32912f080e7Smrj extern int ddi_map_debug_flag;
33012f080e7Smrj #define	ddi_map_debug	if (ddi_map_debug_flag) prom_printf
33112f080e7Smrj #endif
33212f080e7Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr);
33312f080e7Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr);
33412f080e7Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *,
33512f080e7Smrj     psm_intr_op_t, int *);
33612f080e7Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip);
33712f080e7Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip);
33836945f79Smrj 
33912f080e7Smrj /*
34012f080e7Smrj  * Use device arena to use for device control register mappings.
34112f080e7Smrj  * Various kernel memory walkers (debugger, dtrace) need to know
34212f080e7Smrj  * to avoid this address range to prevent undesired device activity.
34312f080e7Smrj  */
34412f080e7Smrj extern void *device_arena_alloc(size_t size, int vm_flag);
34512f080e7Smrj extern void device_arena_free(void * vaddr, size_t size);
34612f080e7Smrj 
34712f080e7Smrj 
34812f080e7Smrj /*
34912f080e7Smrj  *  Internal functions
35012f080e7Smrj  */
35112f080e7Smrj static int rootnex_dma_init();
35212f080e7Smrj static void rootnex_add_props(dev_info_t *);
35312f080e7Smrj static int rootnex_ctl_reportdev(dev_info_t *dip);
35412f080e7Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum);
35512f080e7Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp);
35612f080e7Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp);
35712f080e7Smrj static int rootnex_map_handle(ddi_map_req_t *mp);
35812f080e7Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp);
35912f080e7Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize);
36012f080e7Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq,
36112f080e7Smrj     ddi_dma_attr_t *attr);
36212f080e7Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl,
36312f080e7Smrj     rootnex_sglinfo_t *sglinfo);
36412f080e7Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
36512f080e7Smrj     rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag);
36612f080e7Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
36712f080e7Smrj     rootnex_dma_t *dma, ddi_dma_attr_t *attr);
36812f080e7Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma);
36912f080e7Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
37012f080e7Smrj     ddi_dma_attr_t *attr, int kmflag);
37112f080e7Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma);
37212f080e7Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
37312f080e7Smrj     rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset);
37412f080e7Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object,
37512f080e7Smrj     rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset,
37612f080e7Smrj     size_t *copybuf_used, page_t **cur_pp);
37712f080e7Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp,
37812f080e7Smrj     rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie,
37912f080e7Smrj     ddi_dma_attr_t *attr, off_t cur_offset);
38012f080e7Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp,
38112f080e7Smrj     rootnex_dma_t *dma, rootnex_window_t **windowp,
38212f080e7Smrj     ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used);
38312f080e7Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp,
38412f080e7Smrj     rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie);
38512f080e7Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win,
38612f080e7Smrj     off_t offset, size_t size, uint_t cache_flags);
38712f080e7Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma);
38800d0963fSdilpreet static int rootnex_dma_check(dev_info_t *dip, const void *handle,
38900d0963fSdilpreet     const void *comp_addr, const void *not_used);
39012f080e7Smrj 
39112f080e7Smrj /*
39212f080e7Smrj  * _init()
39312f080e7Smrj  *
39412f080e7Smrj  */
3957c478bd9Sstevel@tonic-gate int
3967c478bd9Sstevel@tonic-gate _init(void)
3977c478bd9Sstevel@tonic-gate {
39812f080e7Smrj 
39912f080e7Smrj 	rootnex_state = NULL;
40012f080e7Smrj 	return (mod_install(&rootnex_modlinkage));
4017c478bd9Sstevel@tonic-gate }
4027c478bd9Sstevel@tonic-gate 
40312f080e7Smrj 
40412f080e7Smrj /*
40512f080e7Smrj  * _info()
40612f080e7Smrj  *
40712f080e7Smrj  */
40812f080e7Smrj int
40912f080e7Smrj _info(struct modinfo *modinfop)
41012f080e7Smrj {
41112f080e7Smrj 	return (mod_info(&rootnex_modlinkage, modinfop));
41212f080e7Smrj }
41312f080e7Smrj 
41412f080e7Smrj 
41512f080e7Smrj /*
41612f080e7Smrj  * _fini()
41712f080e7Smrj  *
41812f080e7Smrj  */
4197c478bd9Sstevel@tonic-gate int
4207c478bd9Sstevel@tonic-gate _fini(void)
4217c478bd9Sstevel@tonic-gate {
4227c478bd9Sstevel@tonic-gate 	return (EBUSY);
4237c478bd9Sstevel@tonic-gate }
4247c478bd9Sstevel@tonic-gate 
42512f080e7Smrj 
42612f080e7Smrj /*
42712f080e7Smrj  * rootnex_attach()
42812f080e7Smrj  *
42912f080e7Smrj  */
43012f080e7Smrj static int
43112f080e7Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
4327c478bd9Sstevel@tonic-gate {
4337aec1d6eScindi 	int fmcap;
43412f080e7Smrj 	int e;
43512f080e7Smrj 
43612f080e7Smrj 	switch (cmd) {
43712f080e7Smrj 	case DDI_ATTACH:
43812f080e7Smrj 		break;
43912f080e7Smrj 	case DDI_RESUME:
44012f080e7Smrj 		return (DDI_SUCCESS);
44112f080e7Smrj 	default:
44212f080e7Smrj 		return (DDI_FAILURE);
4437c478bd9Sstevel@tonic-gate 	}
4447c478bd9Sstevel@tonic-gate 
4457c478bd9Sstevel@tonic-gate 	/*
44612f080e7Smrj 	 * We should only have one instance of rootnex. Save it away since we
44712f080e7Smrj 	 * don't have an easy way to get it back later.
4487c478bd9Sstevel@tonic-gate 	 */
44912f080e7Smrj 	ASSERT(rootnex_state == NULL);
45012f080e7Smrj 	rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP);
4517c478bd9Sstevel@tonic-gate 
45212f080e7Smrj 	rootnex_state->r_dip = dip;
4537aec1d6eScindi 	rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15);
45412f080e7Smrj 	rootnex_state->r_reserved_msg_printed = B_FALSE;
45512f080e7Smrj 	rootnex_cnt = &rootnex_state->r_counters[0];
45686c1f4dcSVikram Hegde 	rootnex_state->r_intel_iommu_enabled = B_FALSE;
4577c478bd9Sstevel@tonic-gate 
4587aec1d6eScindi 	/*
4597aec1d6eScindi 	 * Set minimum fm capability level for i86pc platforms and then
4607aec1d6eScindi 	 * initialize error handling. Since we're the rootnex, we don't
4617aec1d6eScindi 	 * care what's returned in the fmcap field.
4627aec1d6eScindi 	 */
46300d0963fSdilpreet 	ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE |
46400d0963fSdilpreet 	    DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE;
4657aec1d6eScindi 	fmcap = ddi_system_fmcap;
4667aec1d6eScindi 	ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc);
4677aec1d6eScindi 
46812f080e7Smrj 	/* initialize DMA related state */
46912f080e7Smrj 	e = rootnex_dma_init();
47012f080e7Smrj 	if (e != DDI_SUCCESS) {
47112f080e7Smrj 		kmem_free(rootnex_state, sizeof (rootnex_state_t));
47212f080e7Smrj 		return (DDI_FAILURE);
47312f080e7Smrj 	}
47412f080e7Smrj 
47512f080e7Smrj 	/* Add static root node properties */
47612f080e7Smrj 	rootnex_add_props(dip);
47712f080e7Smrj 
47812f080e7Smrj 	/* since we can't call ddi_report_dev() */
47912f080e7Smrj 	cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip));
48012f080e7Smrj 
48112f080e7Smrj 	/* Initialize rootnex event handle */
48212f080e7Smrj 	i_ddi_rootnex_init_events(dip);
48312f080e7Smrj 
48420906b23SVikram Hegde #if !defined(__xpv)
48586c1f4dcSVikram Hegde #if defined(__amd64)
48686c1f4dcSVikram Hegde 	/* probe intel iommu */
48786c1f4dcSVikram Hegde 	intel_iommu_probe_and_parse();
48886c1f4dcSVikram Hegde 
48986c1f4dcSVikram Hegde 	/* attach the iommu nodes */
49086c1f4dcSVikram Hegde 	if (intel_iommu_support) {
49186c1f4dcSVikram Hegde 		if (intel_iommu_attach_dmar_nodes() == DDI_SUCCESS) {
49286c1f4dcSVikram Hegde 			rootnex_state->r_intel_iommu_enabled = B_TRUE;
49386c1f4dcSVikram Hegde 		} else {
49486c1f4dcSVikram Hegde 			intel_iommu_release_dmar_info();
49586c1f4dcSVikram Hegde 		}
49686c1f4dcSVikram Hegde 	}
49786c1f4dcSVikram Hegde #endif
49886c1f4dcSVikram Hegde 
49920906b23SVikram Hegde 	e = iommulib_nexus_register(dip, &iommulib_nexops,
50020906b23SVikram Hegde 	    &rootnex_state->r_iommulib_handle);
50120906b23SVikram Hegde 
50220906b23SVikram Hegde 	ASSERT(e == DDI_SUCCESS);
50320906b23SVikram Hegde #endif
50420906b23SVikram Hegde 
50512f080e7Smrj 	return (DDI_SUCCESS);
50612f080e7Smrj }
50712f080e7Smrj 
50812f080e7Smrj 
50912f080e7Smrj /*
51012f080e7Smrj  * rootnex_detach()
51112f080e7Smrj  *
51212f080e7Smrj  */
5137c478bd9Sstevel@tonic-gate /*ARGSUSED*/
5147c478bd9Sstevel@tonic-gate static int
51512f080e7Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
5167c478bd9Sstevel@tonic-gate {
51712f080e7Smrj 	switch (cmd) {
51812f080e7Smrj 	case DDI_SUSPEND:
51912f080e7Smrj 		break;
52012f080e7Smrj 	default:
52112f080e7Smrj 		return (DDI_FAILURE);
52212f080e7Smrj 	}
5237c478bd9Sstevel@tonic-gate 
52412f080e7Smrj 	return (DDI_SUCCESS);
52512f080e7Smrj }
5267c478bd9Sstevel@tonic-gate 
5277c478bd9Sstevel@tonic-gate 
52812f080e7Smrj /*
52912f080e7Smrj  * rootnex_dma_init()
53012f080e7Smrj  *
53112f080e7Smrj  */
53212f080e7Smrj /*ARGSUSED*/
53312f080e7Smrj static int
53412f080e7Smrj rootnex_dma_init()
53512f080e7Smrj {
53612f080e7Smrj 	size_t bufsize;
53712f080e7Smrj 
53812f080e7Smrj 
53912f080e7Smrj 	/*
54012f080e7Smrj 	 * size of our cookie/window/copybuf state needed in dma bind that we
54112f080e7Smrj 	 * pre-alloc in dma_alloc_handle
54212f080e7Smrj 	 */
54312f080e7Smrj 	rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies;
54412f080e7Smrj 	rootnex_state->r_prealloc_size =
54512f080e7Smrj 	    (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) +
54612f080e7Smrj 	    (rootnex_prealloc_windows * sizeof (rootnex_window_t)) +
54712f080e7Smrj 	    (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t));
54812f080e7Smrj 
54912f080e7Smrj 	/*
55012f080e7Smrj 	 * setup DDI DMA handle kmem cache, align each handle on 64 bytes,
55112f080e7Smrj 	 * allocate 16 extra bytes for struct pointer alignment
55212f080e7Smrj 	 * (p->dmai_private & dma->dp_prealloc_buffer)
55312f080e7Smrj 	 */
55412f080e7Smrj 	bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) +
55512f080e7Smrj 	    rootnex_state->r_prealloc_size + 0x10;
55612f080e7Smrj 	rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl",
55712f080e7Smrj 	    bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0);
55812f080e7Smrj 	if (rootnex_state->r_dmahdl_cache == NULL) {
55912f080e7Smrj 		return (DDI_FAILURE);
56012f080e7Smrj 	}
5617c478bd9Sstevel@tonic-gate 
5627c478bd9Sstevel@tonic-gate 	/*
5637c478bd9Sstevel@tonic-gate 	 * allocate array to track which major numbers we have printed warnings
5647c478bd9Sstevel@tonic-gate 	 * for.
5657c478bd9Sstevel@tonic-gate 	 */
5667c478bd9Sstevel@tonic-gate 	rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list),
5677c478bd9Sstevel@tonic-gate 	    KM_SLEEP);
5687c478bd9Sstevel@tonic-gate 
5697c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
5707c478bd9Sstevel@tonic-gate }
5717c478bd9Sstevel@tonic-gate 
5727c478bd9Sstevel@tonic-gate 
5737c478bd9Sstevel@tonic-gate /*
57412f080e7Smrj  * rootnex_add_props()
57512f080e7Smrj  *
5767c478bd9Sstevel@tonic-gate  */
5777c478bd9Sstevel@tonic-gate static void
57812f080e7Smrj rootnex_add_props(dev_info_t *dip)
5797c478bd9Sstevel@tonic-gate {
58012f080e7Smrj 	rootnex_intprop_t *rpp;
5817c478bd9Sstevel@tonic-gate 	int i;
5827c478bd9Sstevel@tonic-gate 
58312f080e7Smrj 	/* Add static integer/boolean properties to the root node */
58412f080e7Smrj 	rpp = rootnex_intprp;
58512f080e7Smrj 	for (i = 0; i < NROOT_INTPROPS; i++) {
58612f080e7Smrj 		(void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip,
58712f080e7Smrj 		    rpp[i].prop_name, rpp[i].prop_value);
58812f080e7Smrj 	}
5897c478bd9Sstevel@tonic-gate }
5907c478bd9Sstevel@tonic-gate 
59112f080e7Smrj 
59212f080e7Smrj 
5937c478bd9Sstevel@tonic-gate /*
59412f080e7Smrj  * *************************
59512f080e7Smrj  *  ctlops related routines
59612f080e7Smrj  * *************************
59712f080e7Smrj  */
59812f080e7Smrj 
59912f080e7Smrj /*
60012f080e7Smrj  * rootnex_ctlops()
6017c478bd9Sstevel@tonic-gate  *
6027c478bd9Sstevel@tonic-gate  */
603a195726fSgovinda /*ARGSUSED*/
6047c478bd9Sstevel@tonic-gate static int
60512f080e7Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop,
60612f080e7Smrj     void *arg, void *result)
6077c478bd9Sstevel@tonic-gate {
60812f080e7Smrj 	int n, *ptr;
60912f080e7Smrj 	struct ddi_parent_private_data *pdp;
6107c478bd9Sstevel@tonic-gate 
61112f080e7Smrj 	switch (ctlop) {
61212f080e7Smrj 	case DDI_CTLOPS_DMAPMAPC:
6137c478bd9Sstevel@tonic-gate 		/*
61412f080e7Smrj 		 * Return 'partial' to indicate that dma mapping
61512f080e7Smrj 		 * has to be done in the main MMU.
6167c478bd9Sstevel@tonic-gate 		 */
61712f080e7Smrj 		return (DDI_DMA_PARTIAL);
6187c478bd9Sstevel@tonic-gate 
61912f080e7Smrj 	case DDI_CTLOPS_BTOP:
6207c478bd9Sstevel@tonic-gate 		/*
62112f080e7Smrj 		 * Convert byte count input to physical page units.
62212f080e7Smrj 		 * (byte counts that are not a page-size multiple
62312f080e7Smrj 		 * are rounded down)
6247c478bd9Sstevel@tonic-gate 		 */
62512f080e7Smrj 		*(ulong_t *)result = btop(*(ulong_t *)arg);
6267c478bd9Sstevel@tonic-gate 		return (DDI_SUCCESS);
6277c478bd9Sstevel@tonic-gate 
62812f080e7Smrj 	case DDI_CTLOPS_PTOB:
6297c478bd9Sstevel@tonic-gate 		/*
63012f080e7Smrj 		 * Convert size in physical pages to bytes
6317c478bd9Sstevel@tonic-gate 		 */
63212f080e7Smrj 		*(ulong_t *)result = ptob(*(ulong_t *)arg);
6337c478bd9Sstevel@tonic-gate 		return (DDI_SUCCESS);
6347c478bd9Sstevel@tonic-gate 
63512f080e7Smrj 	case DDI_CTLOPS_BTOPR:
6367c478bd9Sstevel@tonic-gate 		/*
63712f080e7Smrj 		 * Convert byte count input to physical page units
63812f080e7Smrj 		 * (byte counts that are not a page-size multiple
63912f080e7Smrj 		 * are rounded up)
6407c478bd9Sstevel@tonic-gate 		 */
64112f080e7Smrj 		*(ulong_t *)result = btopr(*(ulong_t *)arg);
64212f080e7Smrj 		return (DDI_SUCCESS);
64312f080e7Smrj 
64412f080e7Smrj 	case DDI_CTLOPS_INITCHILD:
64512f080e7Smrj 		return (impl_ddi_sunbus_initchild(arg));
64612f080e7Smrj 
64712f080e7Smrj 	case DDI_CTLOPS_UNINITCHILD:
64812f080e7Smrj 		impl_ddi_sunbus_removechild(arg);
64912f080e7Smrj 		return (DDI_SUCCESS);
65012f080e7Smrj 
65112f080e7Smrj 	case DDI_CTLOPS_REPORTDEV:
65212f080e7Smrj 		return (rootnex_ctl_reportdev(rdip));
65312f080e7Smrj 
65412f080e7Smrj 	case DDI_CTLOPS_IOMIN:
6557c478bd9Sstevel@tonic-gate 		/*
65612f080e7Smrj 		 * Nothing to do here but reflect back..
6577c478bd9Sstevel@tonic-gate 		 */
6587c478bd9Sstevel@tonic-gate 		return (DDI_SUCCESS);
6597c478bd9Sstevel@tonic-gate 
66012f080e7Smrj 	case DDI_CTLOPS_REGSIZE:
66112f080e7Smrj 	case DDI_CTLOPS_NREGS:
66212f080e7Smrj 		break;
6637c478bd9Sstevel@tonic-gate 
66412f080e7Smrj 	case DDI_CTLOPS_SIDDEV:
66512f080e7Smrj 		if (ndi_dev_is_prom_node(rdip))
6667c478bd9Sstevel@tonic-gate 			return (DDI_SUCCESS);
66712f080e7Smrj 		if (ndi_dev_is_persistent_node(rdip))
66812f080e7Smrj 			return (DDI_SUCCESS);
6697c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
6707c478bd9Sstevel@tonic-gate 
67112f080e7Smrj 	case DDI_CTLOPS_POWER:
67212f080e7Smrj 		return ((*pm_platform_power)((power_req_t *)arg));
67312f080e7Smrj 
674a195726fSgovinda 	case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */
67512f080e7Smrj 	case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */
67612f080e7Smrj 	case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */
67712f080e7Smrj 	case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */
678a195726fSgovinda 	case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */
679a195726fSgovinda 	case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */
68012f080e7Smrj 		if (!rootnex_state->r_reserved_msg_printed) {
68112f080e7Smrj 			rootnex_state->r_reserved_msg_printed = B_TRUE;
68212f080e7Smrj 			cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for "
68312f080e7Smrj 			    "1 or more reserved/obsolete operations.");
6847c478bd9Sstevel@tonic-gate 		}
68512f080e7Smrj 		return (DDI_FAILURE);
6867c478bd9Sstevel@tonic-gate 
6877c478bd9Sstevel@tonic-gate 	default:
6887c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
6897c478bd9Sstevel@tonic-gate 	}
69012f080e7Smrj 	/*
69112f080e7Smrj 	 * The rest are for "hardware" properties
69212f080e7Smrj 	 */
69312f080e7Smrj 	if ((pdp = ddi_get_parent_data(rdip)) == NULL)
69412f080e7Smrj 		return (DDI_FAILURE);
6957c478bd9Sstevel@tonic-gate 
69612f080e7Smrj 	if (ctlop == DDI_CTLOPS_NREGS) {
69712f080e7Smrj 		ptr = (int *)result;
69812f080e7Smrj 		*ptr = pdp->par_nreg;
69912f080e7Smrj 	} else {
70012f080e7Smrj 		off_t *size = (off_t *)result;
7017c478bd9Sstevel@tonic-gate 
70212f080e7Smrj 		ptr = (int *)arg;
70312f080e7Smrj 		n = *ptr;
70412f080e7Smrj 		if (n >= pdp->par_nreg) {
70512f080e7Smrj 			return (DDI_FAILURE);
70612f080e7Smrj 		}
70712f080e7Smrj 		*size = (off_t)pdp->par_reg[n].regspec_size;
70812f080e7Smrj 	}
7097c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
7107c478bd9Sstevel@tonic-gate }
7117c478bd9Sstevel@tonic-gate 
71212f080e7Smrj 
71312f080e7Smrj /*
71412f080e7Smrj  * rootnex_ctl_reportdev()
71512f080e7Smrj  *
71612f080e7Smrj  */
7177c478bd9Sstevel@tonic-gate static int
71812f080e7Smrj rootnex_ctl_reportdev(dev_info_t *dev)
71912f080e7Smrj {
72012f080e7Smrj 	int i, n, len, f_len = 0;
72112f080e7Smrj 	char *buf;
72212f080e7Smrj 
72312f080e7Smrj 	buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP);
72412f080e7Smrj 	f_len += snprintf(buf, REPORTDEV_BUFSIZE,
72512f080e7Smrj 	    "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev));
72612f080e7Smrj 	len = strlen(buf);
72712f080e7Smrj 
72812f080e7Smrj 	for (i = 0; i < sparc_pd_getnreg(dev); i++) {
72912f080e7Smrj 
73012f080e7Smrj 		struct regspec *rp = sparc_pd_getreg(dev, i);
73112f080e7Smrj 
73212f080e7Smrj 		if (i == 0)
73312f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
73412f080e7Smrj 			    ": ");
73512f080e7Smrj 		else
73612f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
73712f080e7Smrj 			    " and ");
73812f080e7Smrj 		len = strlen(buf);
73912f080e7Smrj 
74012f080e7Smrj 		switch (rp->regspec_bustype) {
74112f080e7Smrj 
74212f080e7Smrj 		case BTEISA:
74312f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
74412f080e7Smrj 			    "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr);
74512f080e7Smrj 			break;
74612f080e7Smrj 
74712f080e7Smrj 		case BTISA:
74812f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
74912f080e7Smrj 			    "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr);
75012f080e7Smrj 			break;
75112f080e7Smrj 
75212f080e7Smrj 		default:
75312f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
75412f080e7Smrj 			    "space %x offset %x",
75512f080e7Smrj 			    rp->regspec_bustype, rp->regspec_addr);
75612f080e7Smrj 			break;
75712f080e7Smrj 		}
75812f080e7Smrj 		len = strlen(buf);
75912f080e7Smrj 	}
76012f080e7Smrj 	for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) {
76112f080e7Smrj 		int pri;
76212f080e7Smrj 
76312f080e7Smrj 		if (i != 0) {
76412f080e7Smrj 			f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
76512f080e7Smrj 			    ",");
76612f080e7Smrj 			len = strlen(buf);
76712f080e7Smrj 		}
76812f080e7Smrj 		pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri);
76912f080e7Smrj 		f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
77012f080e7Smrj 		    " sparc ipl %d", pri);
77112f080e7Smrj 		len = strlen(buf);
77212f080e7Smrj 	}
77312f080e7Smrj #ifdef DEBUG
77412f080e7Smrj 	if (f_len + 1 >= REPORTDEV_BUFSIZE) {
77512f080e7Smrj 		cmn_err(CE_NOTE, "next message is truncated: "
77612f080e7Smrj 		    "printed length 1024, real length %d", f_len);
77712f080e7Smrj 	}
77812f080e7Smrj #endif /* DEBUG */
77912f080e7Smrj 	cmn_err(CE_CONT, "?%s\n", buf);
78012f080e7Smrj 	kmem_free(buf, REPORTDEV_BUFSIZE);
78112f080e7Smrj 	return (DDI_SUCCESS);
78212f080e7Smrj }
78312f080e7Smrj 
78412f080e7Smrj 
78512f080e7Smrj /*
78612f080e7Smrj  * ******************
78712f080e7Smrj  *  map related code
78812f080e7Smrj  * ******************
78912f080e7Smrj  */
79012f080e7Smrj 
79112f080e7Smrj /*
79212f080e7Smrj  * rootnex_map()
79312f080e7Smrj  *
79412f080e7Smrj  */
79512f080e7Smrj static int
79612f080e7Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset,
79712f080e7Smrj     off_t len, caddr_t *vaddrp)
7987c478bd9Sstevel@tonic-gate {
7997c478bd9Sstevel@tonic-gate 	struct regspec *rp, tmp_reg;
8007c478bd9Sstevel@tonic-gate 	ddi_map_req_t mr = *mp;		/* Get private copy of request */
8017c478bd9Sstevel@tonic-gate 	int error;
8027c478bd9Sstevel@tonic-gate 
8037c478bd9Sstevel@tonic-gate 	mp = &mr;
8047c478bd9Sstevel@tonic-gate 
8057c478bd9Sstevel@tonic-gate 	switch (mp->map_op)  {
8067c478bd9Sstevel@tonic-gate 	case DDI_MO_MAP_LOCKED:
8077c478bd9Sstevel@tonic-gate 	case DDI_MO_UNMAP:
8087c478bd9Sstevel@tonic-gate 	case DDI_MO_MAP_HANDLE:
8097c478bd9Sstevel@tonic-gate 		break;
8107c478bd9Sstevel@tonic-gate 	default:
8117c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
8127c478bd9Sstevel@tonic-gate 		cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.",
8137c478bd9Sstevel@tonic-gate 		    mp->map_op);
8147c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8157c478bd9Sstevel@tonic-gate 		return (DDI_ME_UNIMPLEMENTED);
8167c478bd9Sstevel@tonic-gate 	}
8177c478bd9Sstevel@tonic-gate 
8187c478bd9Sstevel@tonic-gate 	if (mp->map_flags & DDI_MF_USER_MAPPING)  {
8197c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
8207c478bd9Sstevel@tonic-gate 		cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user.");
8217c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8227c478bd9Sstevel@tonic-gate 		return (DDI_ME_UNIMPLEMENTED);
8237c478bd9Sstevel@tonic-gate 	}
8247c478bd9Sstevel@tonic-gate 
8257c478bd9Sstevel@tonic-gate 	/*
8267c478bd9Sstevel@tonic-gate 	 * First, if given an rnumber, convert it to a regspec...
8277c478bd9Sstevel@tonic-gate 	 * (Presumably, this is on behalf of a child of the root node?)
8287c478bd9Sstevel@tonic-gate 	 */
8297c478bd9Sstevel@tonic-gate 
8307c478bd9Sstevel@tonic-gate 	if (mp->map_type == DDI_MT_RNUMBER)  {
8317c478bd9Sstevel@tonic-gate 
8327c478bd9Sstevel@tonic-gate 		int rnumber = mp->map_obj.rnumber;
8337c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
8347c478bd9Sstevel@tonic-gate 		static char *out_of_range =
8357c478bd9Sstevel@tonic-gate 		    "rootnex_map: Out of range rnumber <%d>, device <%s>";
8367c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8377c478bd9Sstevel@tonic-gate 
8387c478bd9Sstevel@tonic-gate 		rp = i_ddi_rnumber_to_regspec(rdip, rnumber);
8397c478bd9Sstevel@tonic-gate 		if (rp == NULL)  {
8407c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
8417c478bd9Sstevel@tonic-gate 			cmn_err(CE_WARN, out_of_range, rnumber,
8427c478bd9Sstevel@tonic-gate 			    ddi_get_name(rdip));
8437c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8447c478bd9Sstevel@tonic-gate 			return (DDI_ME_RNUMBER_RANGE);
8457c478bd9Sstevel@tonic-gate 		}
8467c478bd9Sstevel@tonic-gate 
8477c478bd9Sstevel@tonic-gate 		/*
8487c478bd9Sstevel@tonic-gate 		 * Convert the given ddi_map_req_t from rnumber to regspec...
8497c478bd9Sstevel@tonic-gate 		 */
8507c478bd9Sstevel@tonic-gate 
8517c478bd9Sstevel@tonic-gate 		mp->map_type = DDI_MT_REGSPEC;
8527c478bd9Sstevel@tonic-gate 		mp->map_obj.rp = rp;
8537c478bd9Sstevel@tonic-gate 	}
8547c478bd9Sstevel@tonic-gate 
8557c478bd9Sstevel@tonic-gate 	/*
8567c478bd9Sstevel@tonic-gate 	 * Adjust offset and length correspnding to called values...
8577c478bd9Sstevel@tonic-gate 	 * XXX: A non-zero length means override the one in the regspec
8587c478bd9Sstevel@tonic-gate 	 * XXX: (regardless of what's in the parent's range?)
8597c478bd9Sstevel@tonic-gate 	 */
8607c478bd9Sstevel@tonic-gate 
8617c478bd9Sstevel@tonic-gate 	tmp_reg = *(mp->map_obj.rp);		/* Preserve underlying data */
8627c478bd9Sstevel@tonic-gate 	rp = mp->map_obj.rp = &tmp_reg;		/* Use tmp_reg in request */
8637c478bd9Sstevel@tonic-gate 
8647c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
865843e1988Sjohnlev 	cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d "
866843e1988Sjohnlev 	    "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip),
867843e1988Sjohnlev 	    rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset,
868843e1988Sjohnlev 	    len, mp->map_handlep);
8697c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
8707c478bd9Sstevel@tonic-gate 
8717c478bd9Sstevel@tonic-gate 	/*
8727c478bd9Sstevel@tonic-gate 	 * I/O or memory mapping:
8737c478bd9Sstevel@tonic-gate 	 *
8747c478bd9Sstevel@tonic-gate 	 *	<bustype=0, addr=x, len=x>: memory
8757c478bd9Sstevel@tonic-gate 	 *	<bustype=1, addr=x, len=x>: i/o
8767c478bd9Sstevel@tonic-gate 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
8777c478bd9Sstevel@tonic-gate 	 */
8787c478bd9Sstevel@tonic-gate 
8797c478bd9Sstevel@tonic-gate 	if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) {
8807c478bd9Sstevel@tonic-gate 		cmn_err(CE_WARN, "<%s,%s> invalid register spec"
8817c478bd9Sstevel@tonic-gate 		    " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip),
8827c478bd9Sstevel@tonic-gate 		    ddi_get_name(rdip), rp->regspec_bustype,
8837c478bd9Sstevel@tonic-gate 		    rp->regspec_addr, rp->regspec_size);
8847c478bd9Sstevel@tonic-gate 		return (DDI_ME_INVAL);
8857c478bd9Sstevel@tonic-gate 	}
8867c478bd9Sstevel@tonic-gate 
8877c478bd9Sstevel@tonic-gate 	if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) {
8887c478bd9Sstevel@tonic-gate 		/*
8897c478bd9Sstevel@tonic-gate 		 * compatibility i/o mapping
8907c478bd9Sstevel@tonic-gate 		 */
8917c478bd9Sstevel@tonic-gate 		rp->regspec_bustype += (uint_t)offset;
8927c478bd9Sstevel@tonic-gate 	} else {
8937c478bd9Sstevel@tonic-gate 		/*
8947c478bd9Sstevel@tonic-gate 		 * Normal memory or i/o mapping
8957c478bd9Sstevel@tonic-gate 		 */
8967c478bd9Sstevel@tonic-gate 		rp->regspec_addr += (uint_t)offset;
8977c478bd9Sstevel@tonic-gate 	}
8987c478bd9Sstevel@tonic-gate 
8997c478bd9Sstevel@tonic-gate 	if (len != 0)
9007c478bd9Sstevel@tonic-gate 		rp->regspec_size = (uint_t)len;
9017c478bd9Sstevel@tonic-gate 
9027c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
903843e1988Sjohnlev 	cmn_err(CE_CONT, "             <%s,%s> <0x%x, 0x%x, 0x%d> offset %d "
904843e1988Sjohnlev 	    "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip),
9057c478bd9Sstevel@tonic-gate 	    rp->regspec_bustype, rp->regspec_addr, rp->regspec_size,
9067c478bd9Sstevel@tonic-gate 	    offset, len, mp->map_handlep);
9077c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
9087c478bd9Sstevel@tonic-gate 
9097c478bd9Sstevel@tonic-gate 	/*
9107c478bd9Sstevel@tonic-gate 	 * Apply any parent ranges at this level, if applicable.
9117c478bd9Sstevel@tonic-gate 	 * (This is where nexus specific regspec translation takes place.
9127c478bd9Sstevel@tonic-gate 	 * Use of this function is implicit agreement that translation is
9137c478bd9Sstevel@tonic-gate 	 * provided via ddi_apply_range.)
9147c478bd9Sstevel@tonic-gate 	 */
9157c478bd9Sstevel@tonic-gate 
9167c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
9177c478bd9Sstevel@tonic-gate 	ddi_map_debug("applying range of parent <%s> to child <%s>...\n",
9187c478bd9Sstevel@tonic-gate 	    ddi_get_name(dip), ddi_get_name(rdip));
9197c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
9207c478bd9Sstevel@tonic-gate 
9217c478bd9Sstevel@tonic-gate 	if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0)
9227c478bd9Sstevel@tonic-gate 		return (error);
9237c478bd9Sstevel@tonic-gate 
9247c478bd9Sstevel@tonic-gate 	switch (mp->map_op)  {
9257c478bd9Sstevel@tonic-gate 	case DDI_MO_MAP_LOCKED:
9267c478bd9Sstevel@tonic-gate 
9277c478bd9Sstevel@tonic-gate 		/*
9287c478bd9Sstevel@tonic-gate 		 * Set up the locked down kernel mapping to the regspec...
9297c478bd9Sstevel@tonic-gate 		 */
9307c478bd9Sstevel@tonic-gate 
9317c478bd9Sstevel@tonic-gate 		return (rootnex_map_regspec(mp, vaddrp));
9327c478bd9Sstevel@tonic-gate 
9337c478bd9Sstevel@tonic-gate 	case DDI_MO_UNMAP:
9347c478bd9Sstevel@tonic-gate 
9357c478bd9Sstevel@tonic-gate 		/*
9367c478bd9Sstevel@tonic-gate 		 * Release mapping...
9377c478bd9Sstevel@tonic-gate 		 */
9387c478bd9Sstevel@tonic-gate 
9397c478bd9Sstevel@tonic-gate 		return (rootnex_unmap_regspec(mp, vaddrp));
9407c478bd9Sstevel@tonic-gate 
9417c478bd9Sstevel@tonic-gate 	case DDI_MO_MAP_HANDLE:
9427c478bd9Sstevel@tonic-gate 
9437c478bd9Sstevel@tonic-gate 		return (rootnex_map_handle(mp));
9447c478bd9Sstevel@tonic-gate 
9457c478bd9Sstevel@tonic-gate 	default:
9467c478bd9Sstevel@tonic-gate 		return (DDI_ME_UNIMPLEMENTED);
9477c478bd9Sstevel@tonic-gate 	}
9487c478bd9Sstevel@tonic-gate }
9497c478bd9Sstevel@tonic-gate 
9507c478bd9Sstevel@tonic-gate 
9517c478bd9Sstevel@tonic-gate /*
95212f080e7Smrj  * rootnex_map_fault()
9537c478bd9Sstevel@tonic-gate  *
9547c478bd9Sstevel@tonic-gate  *	fault in mappings for requestors
9557c478bd9Sstevel@tonic-gate  */
9567c478bd9Sstevel@tonic-gate /*ARGSUSED*/
9577c478bd9Sstevel@tonic-gate static int
95812f080e7Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat,
95912f080e7Smrj     struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot,
96012f080e7Smrj     uint_t lock)
9617c478bd9Sstevel@tonic-gate {
9627c478bd9Sstevel@tonic-gate 
9637c478bd9Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
9647c478bd9Sstevel@tonic-gate 	ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn);
9657c478bd9Sstevel@tonic-gate 	ddi_map_debug(" Seg <%s>\n",
9667c478bd9Sstevel@tonic-gate 	    seg->s_ops == &segdev_ops ? "segdev" :
9677c478bd9Sstevel@tonic-gate 	    seg == &kvseg ? "segkmem" : "NONE!");
9687c478bd9Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
9697c478bd9Sstevel@tonic-gate 
9707c478bd9Sstevel@tonic-gate 	/*
9717c478bd9Sstevel@tonic-gate 	 * This is all terribly broken, but it is a start
9727c478bd9Sstevel@tonic-gate 	 *
9737c478bd9Sstevel@tonic-gate 	 * XXX	Note that this test means that segdev_ops
9747c478bd9Sstevel@tonic-gate 	 *	must be exported from seg_dev.c.
9757c478bd9Sstevel@tonic-gate 	 * XXX	What about devices with their own segment drivers?
9767c478bd9Sstevel@tonic-gate 	 */
9777c478bd9Sstevel@tonic-gate 	if (seg->s_ops == &segdev_ops) {
978843e1988Sjohnlev 		struct segdev_data *sdp = (struct segdev_data *)seg->s_data;
9797c478bd9Sstevel@tonic-gate 
9807c478bd9Sstevel@tonic-gate 		if (hat == NULL) {
9817c478bd9Sstevel@tonic-gate 			/*
9827c478bd9Sstevel@tonic-gate 			 * This is one plausible interpretation of
9837c478bd9Sstevel@tonic-gate 			 * a null hat i.e. use the first hat on the
9847c478bd9Sstevel@tonic-gate 			 * address space hat list which by convention is
9857c478bd9Sstevel@tonic-gate 			 * the hat of the system MMU.  At alternative
9867c478bd9Sstevel@tonic-gate 			 * would be to panic .. this might well be better ..
9877c478bd9Sstevel@tonic-gate 			 */
9887c478bd9Sstevel@tonic-gate 			ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock));
9897c478bd9Sstevel@tonic-gate 			hat = seg->s_as->a_hat;
9907c478bd9Sstevel@tonic-gate 			cmn_err(CE_NOTE, "rootnex_map_fault: nil hat");
9917c478bd9Sstevel@tonic-gate 		}
9927c478bd9Sstevel@tonic-gate 		hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr,
9937c478bd9Sstevel@tonic-gate 		    (lock ? HAT_LOAD_LOCK : HAT_LOAD));
9947c478bd9Sstevel@tonic-gate 	} else if (seg == &kvseg && dp == NULL) {
9957c478bd9Sstevel@tonic-gate 		hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot,
9967c478bd9Sstevel@tonic-gate 		    HAT_LOAD_LOCK);
9977c478bd9Sstevel@tonic-gate 	} else
9987c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
9997c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
10007c478bd9Sstevel@tonic-gate }
10017c478bd9Sstevel@tonic-gate 
10027c478bd9Sstevel@tonic-gate 
10037c478bd9Sstevel@tonic-gate /*
100412f080e7Smrj  * rootnex_map_regspec()
100512f080e7Smrj  *     we don't support mapping of I/O cards above 4Gb
10067c478bd9Sstevel@tonic-gate  */
10077c478bd9Sstevel@tonic-gate static int
100812f080e7Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp)
10097c478bd9Sstevel@tonic-gate {
1010843e1988Sjohnlev 	rootnex_addr_t rbase;
101112f080e7Smrj 	void *cvaddr;
101212f080e7Smrj 	uint_t npages, pgoffset;
101312f080e7Smrj 	struct regspec *rp;
101412f080e7Smrj 	ddi_acc_hdl_t *hp;
101512f080e7Smrj 	ddi_acc_impl_t *ap;
101612f080e7Smrj 	uint_t	hat_acc_flags;
1017843e1988Sjohnlev 	paddr_t pbase;
10187c478bd9Sstevel@tonic-gate 
101912f080e7Smrj 	rp = mp->map_obj.rp;
102012f080e7Smrj 	hp = mp->map_handlep;
102112f080e7Smrj 
102212f080e7Smrj #ifdef	DDI_MAP_DEBUG
102312f080e7Smrj 	ddi_map_debug(
102412f080e7Smrj 	    "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n",
102512f080e7Smrj 	    rp->regspec_bustype, rp->regspec_addr,
102612f080e7Smrj 	    rp->regspec_size, mp->map_handlep);
102712f080e7Smrj #endif	/* DDI_MAP_DEBUG */
10287c478bd9Sstevel@tonic-gate 
10297c478bd9Sstevel@tonic-gate 	/*
103012f080e7Smrj 	 * I/O or memory mapping
103112f080e7Smrj 	 *
103212f080e7Smrj 	 *	<bustype=0, addr=x, len=x>: memory
103312f080e7Smrj 	 *	<bustype=1, addr=x, len=x>: i/o
103412f080e7Smrj 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
10357c478bd9Sstevel@tonic-gate 	 */
103612f080e7Smrj 
103712f080e7Smrj 	if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) {
103812f080e7Smrj 		cmn_err(CE_WARN, "rootnex: invalid register spec"
103912f080e7Smrj 		    " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype,
104012f080e7Smrj 		    rp->regspec_addr, rp->regspec_size);
104112f080e7Smrj 		return (DDI_FAILURE);
10427c478bd9Sstevel@tonic-gate 	}
104312f080e7Smrj 
104412f080e7Smrj 	if (rp->regspec_bustype != 0) {
10457c478bd9Sstevel@tonic-gate 		/*
104612f080e7Smrj 		 * I/O space - needs a handle.
10477c478bd9Sstevel@tonic-gate 		 */
10487c478bd9Sstevel@tonic-gate 		if (hp == NULL) {
104912f080e7Smrj 			return (DDI_FAILURE);
10507c478bd9Sstevel@tonic-gate 		}
105112f080e7Smrj 		ap = (ddi_acc_impl_t *)hp->ah_platform_private;
105212f080e7Smrj 		ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE;
105312f080e7Smrj 		impl_acc_hdl_init(hp);
10547c478bd9Sstevel@tonic-gate 
105512f080e7Smrj 		if (mp->map_flags & DDI_MF_DEVICE_MAPPING) {
105612f080e7Smrj #ifdef  DDI_MAP_DEBUG
1057843e1988Sjohnlev 			ddi_map_debug("rootnex_map_regspec: mmap() "
1058843e1988Sjohnlev 			    "to I/O space is not supported.\n");
105912f080e7Smrj #endif  /* DDI_MAP_DEBUG */
106012f080e7Smrj 			return (DDI_ME_INVAL);
10617c478bd9Sstevel@tonic-gate 		} else {
10627c478bd9Sstevel@tonic-gate 			/*
106312f080e7Smrj 			 * 1275-compliant vs. compatibility i/o mapping
10647c478bd9Sstevel@tonic-gate 			 */
106512f080e7Smrj 			*vaddrp =
106612f080e7Smrj 			    (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ?
106712f080e7Smrj 			    ((caddr_t)(uintptr_t)rp->regspec_bustype) :
106812f080e7Smrj 			    ((caddr_t)(uintptr_t)rp->regspec_addr);
1069843e1988Sjohnlev #ifdef __xpv
1070843e1988Sjohnlev 			if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1071843e1988Sjohnlev 				hp->ah_pfn = xen_assign_pfn(
1072843e1988Sjohnlev 				    mmu_btop((ulong_t)rp->regspec_addr &
1073843e1988Sjohnlev 				    MMU_PAGEMASK));
1074843e1988Sjohnlev 			} else {
1075843e1988Sjohnlev 				hp->ah_pfn = mmu_btop(
1076843e1988Sjohnlev 				    (ulong_t)rp->regspec_addr & MMU_PAGEMASK);
1077843e1988Sjohnlev 			}
1078843e1988Sjohnlev #else
107900d0963fSdilpreet 			hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr &
1080843e1988Sjohnlev 			    MMU_PAGEMASK);
1081843e1988Sjohnlev #endif
108200d0963fSdilpreet 			hp->ah_pnum = mmu_btopr(rp->regspec_size +
108300d0963fSdilpreet 			    (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET);
10847c478bd9Sstevel@tonic-gate 		}
10857c478bd9Sstevel@tonic-gate 
108612f080e7Smrj #ifdef	DDI_MAP_DEBUG
108712f080e7Smrj 		ddi_map_debug(
108812f080e7Smrj 	    "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n",
108912f080e7Smrj 		    rp->regspec_size, *vaddrp);
109012f080e7Smrj #endif	/* DDI_MAP_DEBUG */
109112f080e7Smrj 		return (DDI_SUCCESS);
10927c478bd9Sstevel@tonic-gate 	}
10937c478bd9Sstevel@tonic-gate 
10947c478bd9Sstevel@tonic-gate 	/*
109512f080e7Smrj 	 * Memory space
109612f080e7Smrj 	 */
109712f080e7Smrj 
109812f080e7Smrj 	if (hp != NULL) {
109912f080e7Smrj 		/*
110012f080e7Smrj 		 * hat layer ignores
110112f080e7Smrj 		 * hp->ah_acc.devacc_attr_endian_flags.
110212f080e7Smrj 		 */
110312f080e7Smrj 		switch (hp->ah_acc.devacc_attr_dataorder) {
110412f080e7Smrj 		case DDI_STRICTORDER_ACC:
110512f080e7Smrj 			hat_acc_flags = HAT_STRICTORDER;
110612f080e7Smrj 			break;
110712f080e7Smrj 		case DDI_UNORDERED_OK_ACC:
110812f080e7Smrj 			hat_acc_flags = HAT_UNORDERED_OK;
110912f080e7Smrj 			break;
111012f080e7Smrj 		case DDI_MERGING_OK_ACC:
111112f080e7Smrj 			hat_acc_flags = HAT_MERGING_OK;
111212f080e7Smrj 			break;
111312f080e7Smrj 		case DDI_LOADCACHING_OK_ACC:
111412f080e7Smrj 			hat_acc_flags = HAT_LOADCACHING_OK;
111512f080e7Smrj 			break;
111612f080e7Smrj 		case DDI_STORECACHING_OK_ACC:
111712f080e7Smrj 			hat_acc_flags = HAT_STORECACHING_OK;
111812f080e7Smrj 			break;
111912f080e7Smrj 		}
112012f080e7Smrj 		ap = (ddi_acc_impl_t *)hp->ah_platform_private;
112112f080e7Smrj 		ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR;
112212f080e7Smrj 		impl_acc_hdl_init(hp);
112312f080e7Smrj 		hp->ah_hat_flags = hat_acc_flags;
112412f080e7Smrj 	} else {
112512f080e7Smrj 		hat_acc_flags = HAT_STRICTORDER;
112612f080e7Smrj 	}
112712f080e7Smrj 
1128843e1988Sjohnlev 	rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK);
1129843e1988Sjohnlev #ifdef __xpv
1130843e1988Sjohnlev 	/*
1131843e1988Sjohnlev 	 * If we're dom0, we're using a real device so we need to translate
1132843e1988Sjohnlev 	 * the MA to a PA.
1133843e1988Sjohnlev 	 */
1134843e1988Sjohnlev 	if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1135843e1988Sjohnlev 		pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase)));
1136843e1988Sjohnlev 	} else {
1137843e1988Sjohnlev 		pbase = rbase;
1138843e1988Sjohnlev 	}
1139843e1988Sjohnlev #else
1140843e1988Sjohnlev 	pbase = rbase;
1141843e1988Sjohnlev #endif
1142843e1988Sjohnlev 	pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET;
114312f080e7Smrj 
114412f080e7Smrj 	if (rp->regspec_size == 0) {
114512f080e7Smrj #ifdef  DDI_MAP_DEBUG
114612f080e7Smrj 		ddi_map_debug("rootnex_map_regspec: zero regspec_size\n");
114712f080e7Smrj #endif  /* DDI_MAP_DEBUG */
114812f080e7Smrj 		return (DDI_ME_INVAL);
114912f080e7Smrj 	}
115012f080e7Smrj 
115112f080e7Smrj 	if (mp->map_flags & DDI_MF_DEVICE_MAPPING) {
1152843e1988Sjohnlev 		/* extra cast to make gcc happy */
1153843e1988Sjohnlev 		*vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase));
115412f080e7Smrj 	} else {
115512f080e7Smrj 		npages = mmu_btopr(rp->regspec_size + pgoffset);
115612f080e7Smrj 
115712f080e7Smrj #ifdef	DDI_MAP_DEBUG
1158843e1988Sjohnlev 		ddi_map_debug("rootnex_map_regspec: Mapping %d pages "
1159843e1988Sjohnlev 		    "physical %llx", npages, pbase);
116012f080e7Smrj #endif	/* DDI_MAP_DEBUG */
116112f080e7Smrj 
116212f080e7Smrj 		cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP);
116312f080e7Smrj 		if (cvaddr == NULL)
116412f080e7Smrj 			return (DDI_ME_NORESOURCES);
116512f080e7Smrj 
116612f080e7Smrj 		/*
116712f080e7Smrj 		 * Now map in the pages we've allocated...
116812f080e7Smrj 		 */
1169843e1988Sjohnlev 		hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages),
1170843e1988Sjohnlev 		    mmu_btop(pbase), mp->map_prot | hat_acc_flags,
1171843e1988Sjohnlev 		    HAT_LOAD_LOCK);
117212f080e7Smrj 		*vaddrp = (caddr_t)cvaddr + pgoffset;
117300d0963fSdilpreet 
117400d0963fSdilpreet 		/* save away pfn and npages for FMA */
117500d0963fSdilpreet 		hp = mp->map_handlep;
117600d0963fSdilpreet 		if (hp) {
1177843e1988Sjohnlev 			hp->ah_pfn = mmu_btop(pbase);
117800d0963fSdilpreet 			hp->ah_pnum = npages;
117900d0963fSdilpreet 		}
118012f080e7Smrj 	}
118112f080e7Smrj 
118212f080e7Smrj #ifdef	DDI_MAP_DEBUG
118312f080e7Smrj 	ddi_map_debug("at virtual 0x%x\n", *vaddrp);
118412f080e7Smrj #endif	/* DDI_MAP_DEBUG */
118512f080e7Smrj 	return (DDI_SUCCESS);
118612f080e7Smrj }
118712f080e7Smrj 
118812f080e7Smrj 
118912f080e7Smrj /*
119012f080e7Smrj  * rootnex_unmap_regspec()
11917c478bd9Sstevel@tonic-gate  *
11927c478bd9Sstevel@tonic-gate  */
11937c478bd9Sstevel@tonic-gate static int
119412f080e7Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp)
11957c478bd9Sstevel@tonic-gate {
119612f080e7Smrj 	caddr_t addr = (caddr_t)*vaddrp;
119712f080e7Smrj 	uint_t npages, pgoffset;
119812f080e7Smrj 	struct regspec *rp;
11997c478bd9Sstevel@tonic-gate 
120012f080e7Smrj 	if (mp->map_flags & DDI_MF_DEVICE_MAPPING)
120112f080e7Smrj 		return (0);
12027c478bd9Sstevel@tonic-gate 
120312f080e7Smrj 	rp = mp->map_obj.rp;
12047c478bd9Sstevel@tonic-gate 
120512f080e7Smrj 	if (rp->regspec_size == 0) {
120612f080e7Smrj #ifdef  DDI_MAP_DEBUG
120712f080e7Smrj 		ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n");
120812f080e7Smrj #endif  /* DDI_MAP_DEBUG */
120912f080e7Smrj 		return (DDI_ME_INVAL);
12107c478bd9Sstevel@tonic-gate 	}
12117c478bd9Sstevel@tonic-gate 
12127c478bd9Sstevel@tonic-gate 	/*
121312f080e7Smrj 	 * I/O or memory mapping:
12147c478bd9Sstevel@tonic-gate 	 *
121512f080e7Smrj 	 *	<bustype=0, addr=x, len=x>: memory
121612f080e7Smrj 	 *	<bustype=1, addr=x, len=x>: i/o
121712f080e7Smrj 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
12187c478bd9Sstevel@tonic-gate 	 */
121912f080e7Smrj 	if (rp->regspec_bustype != 0) {
12207c478bd9Sstevel@tonic-gate 		/*
122112f080e7Smrj 		 * This is I/O space, which requires no particular
122212f080e7Smrj 		 * processing on unmap since it isn't mapped in the
122312f080e7Smrj 		 * first place.
12247c478bd9Sstevel@tonic-gate 		 */
12257c478bd9Sstevel@tonic-gate 		return (DDI_SUCCESS);
12267c478bd9Sstevel@tonic-gate 	}
12277c478bd9Sstevel@tonic-gate 
12287c478bd9Sstevel@tonic-gate 	/*
122912f080e7Smrj 	 * Memory space
12307c478bd9Sstevel@tonic-gate 	 */
123112f080e7Smrj 	pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET;
123212f080e7Smrj 	npages = mmu_btopr(rp->regspec_size + pgoffset);
123312f080e7Smrj 	hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK);
123412f080e7Smrj 	device_arena_free(addr - pgoffset, ptob(npages));
12357c478bd9Sstevel@tonic-gate 
12367c478bd9Sstevel@tonic-gate 	/*
123712f080e7Smrj 	 * Destroy the pointer - the mapping has logically gone
12387c478bd9Sstevel@tonic-gate 	 */
123912f080e7Smrj 	*vaddrp = NULL;
12407c478bd9Sstevel@tonic-gate 
12417c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
12427c478bd9Sstevel@tonic-gate }
12437c478bd9Sstevel@tonic-gate 
124412f080e7Smrj 
124512f080e7Smrj /*
124612f080e7Smrj  * rootnex_map_handle()
124712f080e7Smrj  *
124812f080e7Smrj  */
12497c478bd9Sstevel@tonic-gate static int
125012f080e7Smrj rootnex_map_handle(ddi_map_req_t *mp)
12517c478bd9Sstevel@tonic-gate {
1252843e1988Sjohnlev 	rootnex_addr_t rbase;
125312f080e7Smrj 	ddi_acc_hdl_t *hp;
125412f080e7Smrj 	uint_t pgoffset;
125512f080e7Smrj 	struct regspec *rp;
1256843e1988Sjohnlev 	paddr_t pbase;
12577c478bd9Sstevel@tonic-gate 
125812f080e7Smrj 	rp = mp->map_obj.rp;
12597c478bd9Sstevel@tonic-gate 
126012f080e7Smrj #ifdef	DDI_MAP_DEBUG
126112f080e7Smrj 	ddi_map_debug(
126212f080e7Smrj 	    "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n",
126312f080e7Smrj 	    rp->regspec_bustype, rp->regspec_addr,
126412f080e7Smrj 	    rp->regspec_size, mp->map_handlep);
126512f080e7Smrj #endif	/* DDI_MAP_DEBUG */
12667c478bd9Sstevel@tonic-gate 
12677c478bd9Sstevel@tonic-gate 	/*
126812f080e7Smrj 	 * I/O or memory mapping:
126912f080e7Smrj 	 *
127012f080e7Smrj 	 *	<bustype=0, addr=x, len=x>: memory
127112f080e7Smrj 	 *	<bustype=1, addr=x, len=x>: i/o
127212f080e7Smrj 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
12737c478bd9Sstevel@tonic-gate 	 */
127412f080e7Smrj 	if (rp->regspec_bustype != 0) {
127512f080e7Smrj 		/*
127612f080e7Smrj 		 * This refers to I/O space, and we don't support "mapping"
127712f080e7Smrj 		 * I/O space to a user.
127812f080e7Smrj 		 */
12797c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
12807c478bd9Sstevel@tonic-gate 	}
12817c478bd9Sstevel@tonic-gate 
12827c478bd9Sstevel@tonic-gate 	/*
128312f080e7Smrj 	 * Set up the hat_flags for the mapping.
12847c478bd9Sstevel@tonic-gate 	 */
128512f080e7Smrj 	hp = mp->map_handlep;
12867c478bd9Sstevel@tonic-gate 
128712f080e7Smrj 	switch (hp->ah_acc.devacc_attr_endian_flags) {
128812f080e7Smrj 	case DDI_NEVERSWAP_ACC:
128912f080e7Smrj 		hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER;
12907c478bd9Sstevel@tonic-gate 		break;
129112f080e7Smrj 	case DDI_STRUCTURE_LE_ACC:
129212f080e7Smrj 		hp->ah_hat_flags = HAT_STRUCTURE_LE;
12937c478bd9Sstevel@tonic-gate 		break;
129412f080e7Smrj 	case DDI_STRUCTURE_BE_ACC:
12957c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
12967c478bd9Sstevel@tonic-gate 	default:
129712f080e7Smrj 		return (DDI_REGS_ACC_CONFLICT);
12987c478bd9Sstevel@tonic-gate 	}
12997c478bd9Sstevel@tonic-gate 
130012f080e7Smrj 	switch (hp->ah_acc.devacc_attr_dataorder) {
130112f080e7Smrj 	case DDI_STRICTORDER_ACC:
13027c478bd9Sstevel@tonic-gate 		break;
130312f080e7Smrj 	case DDI_UNORDERED_OK_ACC:
130412f080e7Smrj 		hp->ah_hat_flags |= HAT_UNORDERED_OK;
13057c478bd9Sstevel@tonic-gate 		break;
130612f080e7Smrj 	case DDI_MERGING_OK_ACC:
130712f080e7Smrj 		hp->ah_hat_flags |= HAT_MERGING_OK;
13087c478bd9Sstevel@tonic-gate 		break;
130912f080e7Smrj 	case DDI_LOADCACHING_OK_ACC:
131012f080e7Smrj 		hp->ah_hat_flags |= HAT_LOADCACHING_OK;
131112f080e7Smrj 		break;
131212f080e7Smrj 	case DDI_STORECACHING_OK_ACC:
131312f080e7Smrj 		hp->ah_hat_flags |= HAT_STORECACHING_OK;
131412f080e7Smrj 		break;
13157c478bd9Sstevel@tonic-gate 	default:
13167c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
13177c478bd9Sstevel@tonic-gate 	}
13187c478bd9Sstevel@tonic-gate 
1319843e1988Sjohnlev 	rbase = (rootnex_addr_t)rp->regspec_addr &
1320843e1988Sjohnlev 	    (~(rootnex_addr_t)MMU_PAGEOFFSET);
1321843e1988Sjohnlev 	pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET;
13227c478bd9Sstevel@tonic-gate 
132312f080e7Smrj 	if (rp->regspec_size == 0)
132412f080e7Smrj 		return (DDI_ME_INVAL);
13257c478bd9Sstevel@tonic-gate 
1326843e1988Sjohnlev #ifdef __xpv
1327843e1988Sjohnlev 	/*
1328843e1988Sjohnlev 	 * If we're dom0, we're using a real device so we need to translate
1329843e1988Sjohnlev 	 * the MA to a PA.
1330843e1988Sjohnlev 	 */
1331843e1988Sjohnlev 	if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1332843e1988Sjohnlev 		pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) |
1333843e1988Sjohnlev 		    (rbase & MMU_PAGEOFFSET);
1334843e1988Sjohnlev 	} else {
1335843e1988Sjohnlev 		pbase = rbase;
1336843e1988Sjohnlev 	}
1337843e1988Sjohnlev #else
1338843e1988Sjohnlev 	pbase = rbase;
1339843e1988Sjohnlev #endif
1340843e1988Sjohnlev 
1341843e1988Sjohnlev 	hp->ah_pfn = mmu_btop(pbase);
134212f080e7Smrj 	hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset);
13437c478bd9Sstevel@tonic-gate 
13447c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
13457c478bd9Sstevel@tonic-gate }
13467c478bd9Sstevel@tonic-gate 
134712f080e7Smrj 
134812f080e7Smrj 
13497c478bd9Sstevel@tonic-gate /*
135012f080e7Smrj  * ************************
135112f080e7Smrj  *  interrupt related code
135212f080e7Smrj  * ************************
13537c478bd9Sstevel@tonic-gate  */
13547c478bd9Sstevel@tonic-gate 
13557c478bd9Sstevel@tonic-gate /*
135612f080e7Smrj  * rootnex_intr_ops()
13577c478bd9Sstevel@tonic-gate  *	bus_intr_op() function for interrupt support
13587c478bd9Sstevel@tonic-gate  */
13597c478bd9Sstevel@tonic-gate /* ARGSUSED */
13607c478bd9Sstevel@tonic-gate static int
13617c478bd9Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op,
13627c478bd9Sstevel@tonic-gate     ddi_intr_handle_impl_t *hdlp, void *result)
13637c478bd9Sstevel@tonic-gate {
13647c478bd9Sstevel@tonic-gate 	struct intrspec			*ispec;
13657c478bd9Sstevel@tonic-gate 	struct ddi_parent_private_data	*pdp;
13667c478bd9Sstevel@tonic-gate 
13677c478bd9Sstevel@tonic-gate 	DDI_INTR_NEXDBG((CE_CONT,
13687c478bd9Sstevel@tonic-gate 	    "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n",
13697c478bd9Sstevel@tonic-gate 	    (void *)pdip, (void *)rdip, intr_op, (void *)hdlp));
13707c478bd9Sstevel@tonic-gate 
13717c478bd9Sstevel@tonic-gate 	/* Process the interrupt operation */
13727c478bd9Sstevel@tonic-gate 	switch (intr_op) {
13737c478bd9Sstevel@tonic-gate 	case DDI_INTROP_GETCAP:
13747c478bd9Sstevel@tonic-gate 		/* First check with pcplusmp */
13757c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
13767c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13777c478bd9Sstevel@tonic-gate 
13787c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) {
13797c478bd9Sstevel@tonic-gate 			*(int *)result = 0;
13807c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13817c478bd9Sstevel@tonic-gate 		}
13827c478bd9Sstevel@tonic-gate 		break;
13837c478bd9Sstevel@tonic-gate 	case DDI_INTROP_SETCAP:
13847c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
13857c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13867c478bd9Sstevel@tonic-gate 
13877c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result))
13887c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13897c478bd9Sstevel@tonic-gate 		break;
13907c478bd9Sstevel@tonic-gate 	case DDI_INTROP_ALLOC:
13917c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
13927c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
13937c478bd9Sstevel@tonic-gate 		hdlp->ih_pri = ispec->intrspec_pri;
13947c478bd9Sstevel@tonic-gate 		*(int *)result = hdlp->ih_scratch1;
13957c478bd9Sstevel@tonic-gate 		break;
13967c478bd9Sstevel@tonic-gate 	case DDI_INTROP_FREE:
13977c478bd9Sstevel@tonic-gate 		pdp = ddi_get_parent_data(rdip);
13987c478bd9Sstevel@tonic-gate 		/*
13997c478bd9Sstevel@tonic-gate 		 * Special case for 'pcic' driver' only.
14007c478bd9Sstevel@tonic-gate 		 * If an intrspec was created for it, clean it up here
14017c478bd9Sstevel@tonic-gate 		 * See detailed comments on this in the function
14027c478bd9Sstevel@tonic-gate 		 * rootnex_get_ispec().
14037c478bd9Sstevel@tonic-gate 		 */
14047c478bd9Sstevel@tonic-gate 		if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) {
14057c478bd9Sstevel@tonic-gate 			kmem_free(pdp->par_intr, sizeof (struct intrspec) *
14067c478bd9Sstevel@tonic-gate 			    pdp->par_nintr);
14077c478bd9Sstevel@tonic-gate 			/*
14087c478bd9Sstevel@tonic-gate 			 * Set it to zero; so that
14097c478bd9Sstevel@tonic-gate 			 * DDI framework doesn't free it again
14107c478bd9Sstevel@tonic-gate 			 */
14117c478bd9Sstevel@tonic-gate 			pdp->par_intr = NULL;
14127c478bd9Sstevel@tonic-gate 			pdp->par_nintr = 0;
14137c478bd9Sstevel@tonic-gate 		}
14147c478bd9Sstevel@tonic-gate 		break;
14157c478bd9Sstevel@tonic-gate 	case DDI_INTROP_GETPRI:
14167c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14177c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14187c478bd9Sstevel@tonic-gate 		*(int *)result = ispec->intrspec_pri;
14197c478bd9Sstevel@tonic-gate 		break;
14207c478bd9Sstevel@tonic-gate 	case DDI_INTROP_SETPRI:
14217c478bd9Sstevel@tonic-gate 		/* Validate the interrupt priority passed to us */
14227c478bd9Sstevel@tonic-gate 		if (*(int *)result > LOCK_LEVEL)
14237c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14247c478bd9Sstevel@tonic-gate 
14257c478bd9Sstevel@tonic-gate 		/* Ensure that PSM is all initialized and ispec is ok */
14267c478bd9Sstevel@tonic-gate 		if ((psm_intr_ops == NULL) ||
14277c478bd9Sstevel@tonic-gate 		    ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL))
14287c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14297c478bd9Sstevel@tonic-gate 
14307c478bd9Sstevel@tonic-gate 		/* Change the priority */
14317c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) ==
14327c478bd9Sstevel@tonic-gate 		    PSM_FAILURE)
14337c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14347c478bd9Sstevel@tonic-gate 
14357c478bd9Sstevel@tonic-gate 		/* update the ispec with the new priority */
14367c478bd9Sstevel@tonic-gate 		ispec->intrspec_pri =  *(int *)result;
14377c478bd9Sstevel@tonic-gate 		break;
14387c478bd9Sstevel@tonic-gate 	case DDI_INTROP_ADDISR:
14397c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14407c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14417c478bd9Sstevel@tonic-gate 		ispec->intrspec_func = hdlp->ih_cb_func;
14427c478bd9Sstevel@tonic-gate 		break;
14437c478bd9Sstevel@tonic-gate 	case DDI_INTROP_REMISR:
14447c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14457c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14467c478bd9Sstevel@tonic-gate 		ispec->intrspec_func = (uint_t (*)()) 0;
14477c478bd9Sstevel@tonic-gate 		break;
14487c478bd9Sstevel@tonic-gate 	case DDI_INTROP_ENABLE:
14497c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14507c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14517c478bd9Sstevel@tonic-gate 
14527c478bd9Sstevel@tonic-gate 		/* Call psmi to translate irq with the dip */
14537c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14547c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14557c478bd9Sstevel@tonic-gate 
14567a364d25Sschwartz 		((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
14577c478bd9Sstevel@tonic-gate 		(void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR,
14587c478bd9Sstevel@tonic-gate 		    (int *)&hdlp->ih_vector);
14597c478bd9Sstevel@tonic-gate 
14607c478bd9Sstevel@tonic-gate 		/* Add the interrupt handler */
14617c478bd9Sstevel@tonic-gate 		if (!add_avintr((void *)hdlp, ispec->intrspec_pri,
14627c478bd9Sstevel@tonic-gate 		    hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector,
14637a364d25Sschwartz 		    hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip))
14647c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14657c478bd9Sstevel@tonic-gate 		break;
14667c478bd9Sstevel@tonic-gate 	case DDI_INTROP_DISABLE:
14677c478bd9Sstevel@tonic-gate 		if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
14687c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14697c478bd9Sstevel@tonic-gate 
14707c478bd9Sstevel@tonic-gate 		/* Call psm_ops() to translate irq with the dip */
14717c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14727c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14737c478bd9Sstevel@tonic-gate 
14747a364d25Sschwartz 		((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
14757c478bd9Sstevel@tonic-gate 		(void) (*psm_intr_ops)(rdip, hdlp,
14767c478bd9Sstevel@tonic-gate 		    PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector);
14777c478bd9Sstevel@tonic-gate 
14787c478bd9Sstevel@tonic-gate 		/* Remove the interrupt handler */
14797c478bd9Sstevel@tonic-gate 		rem_avintr((void *)hdlp, ispec->intrspec_pri,
14807c478bd9Sstevel@tonic-gate 		    hdlp->ih_cb_func, hdlp->ih_vector);
14817c478bd9Sstevel@tonic-gate 		break;
14827c478bd9Sstevel@tonic-gate 	case DDI_INTROP_SETMASK:
14837c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14847c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14857c478bd9Sstevel@tonic-gate 
14867c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL))
14877c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14887c478bd9Sstevel@tonic-gate 		break;
14897c478bd9Sstevel@tonic-gate 	case DDI_INTROP_CLRMASK:
14907c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14917c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14927c478bd9Sstevel@tonic-gate 
14937c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL))
14947c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14957c478bd9Sstevel@tonic-gate 		break;
14967c478bd9Sstevel@tonic-gate 	case DDI_INTROP_GETPENDING:
14977c478bd9Sstevel@tonic-gate 		if (psm_intr_ops == NULL)
14987c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
14997c478bd9Sstevel@tonic-gate 
15007c478bd9Sstevel@tonic-gate 		if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING,
15017c478bd9Sstevel@tonic-gate 		    result)) {
15027c478bd9Sstevel@tonic-gate 			*(int *)result = 0;
15037c478bd9Sstevel@tonic-gate 			return (DDI_FAILURE);
15047c478bd9Sstevel@tonic-gate 		}
15057c478bd9Sstevel@tonic-gate 		break;
1506a54f81fbSanish 	case DDI_INTROP_NAVAIL:
15077c478bd9Sstevel@tonic-gate 	case DDI_INTROP_NINTRS:
1508a54f81fbSanish 		*(int *)result = i_ddi_get_intx_nintrs(rdip);
1509a54f81fbSanish 		if (*(int *)result == 0) {
15107c478bd9Sstevel@tonic-gate 			/*
15117c478bd9Sstevel@tonic-gate 			 * Special case for 'pcic' driver' only. This driver
15127c478bd9Sstevel@tonic-gate 			 * driver is a child of 'isa' and 'rootnex' drivers.
15137c478bd9Sstevel@tonic-gate 			 *
15147c478bd9Sstevel@tonic-gate 			 * See detailed comments on this in the function
15157c478bd9Sstevel@tonic-gate 			 * rootnex_get_ispec().
15167c478bd9Sstevel@tonic-gate 			 *
15177c478bd9Sstevel@tonic-gate 			 * Children of 'pcic' send 'NINITR' request all the
15187c478bd9Sstevel@tonic-gate 			 * way to rootnex driver. But, the 'pdp->par_nintr'
15197c478bd9Sstevel@tonic-gate 			 * field may not initialized. So, we fake it here
15207c478bd9Sstevel@tonic-gate 			 * to return 1 (a la what PCMCIA nexus does).
15217c478bd9Sstevel@tonic-gate 			 */
15227c478bd9Sstevel@tonic-gate 			if (strcmp(ddi_get_name(rdip), "pcic") == 0)
15237c478bd9Sstevel@tonic-gate 				*(int *)result = 1;
1524a54f81fbSanish 			else
1525a54f81fbSanish 				return (DDI_FAILURE);
15267c478bd9Sstevel@tonic-gate 		}
15277c478bd9Sstevel@tonic-gate 		break;
15287c478bd9Sstevel@tonic-gate 	case DDI_INTROP_SUPPORTED_TYPES:
1529a54f81fbSanish 		*(int *)result = DDI_INTR_TYPE_FIXED;	/* Always ... */
15307c478bd9Sstevel@tonic-gate 		break;
15317c478bd9Sstevel@tonic-gate 	default:
15327c478bd9Sstevel@tonic-gate 		return (DDI_FAILURE);
15337c478bd9Sstevel@tonic-gate 	}
15347c478bd9Sstevel@tonic-gate 
15357c478bd9Sstevel@tonic-gate 	return (DDI_SUCCESS);
15367c478bd9Sstevel@tonic-gate }
15377c478bd9Sstevel@tonic-gate 
15387c478bd9Sstevel@tonic-gate 
15397c478bd9Sstevel@tonic-gate /*
154012f080e7Smrj  * rootnex_get_ispec()
154112f080e7Smrj  *	convert an interrupt number to an interrupt specification.
154212f080e7Smrj  *	The interrupt number determines which interrupt spec will be
154312f080e7Smrj  *	returned if more than one exists.
154412f080e7Smrj  *
154512f080e7Smrj  *	Look into the parent private data area of the 'rdip' to find out
154612f080e7Smrj  *	the interrupt specification.  First check to make sure there is
154712f080e7Smrj  *	one that matchs "inumber" and then return a pointer to it.
154812f080e7Smrj  *
154912f080e7Smrj  *	Return NULL if one could not be found.
155012f080e7Smrj  *
155112f080e7Smrj  *	NOTE: This is needed for rootnex_intr_ops()
15527c478bd9Sstevel@tonic-gate  */
155312f080e7Smrj static struct intrspec *
155412f080e7Smrj rootnex_get_ispec(dev_info_t *rdip, int inum)
15557c478bd9Sstevel@tonic-gate {
155612f080e7Smrj 	struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip);
15577c478bd9Sstevel@tonic-gate 
15587c478bd9Sstevel@tonic-gate 	/*
155912f080e7Smrj 	 * Special case handling for drivers that provide their own
156012f080e7Smrj 	 * intrspec structures instead of relying on the DDI framework.
156112f080e7Smrj 	 *
156212f080e7Smrj 	 * A broken hardware driver in ON could potentially provide its
156312f080e7Smrj 	 * own intrspec structure, instead of relying on the hardware.
156412f080e7Smrj 	 * If these drivers are children of 'rootnex' then we need to
156512f080e7Smrj 	 * continue to provide backward compatibility to them here.
156612f080e7Smrj 	 *
156712f080e7Smrj 	 * Following check is a special case for 'pcic' driver which
156812f080e7Smrj 	 * was found to have broken hardwre andby provides its own intrspec.
156912f080e7Smrj 	 *
157012f080e7Smrj 	 * Verbatim comments from this driver are shown here:
157112f080e7Smrj 	 * "Don't use the ddi_add_intr since we don't have a
157212f080e7Smrj 	 * default intrspec in all cases."
157312f080e7Smrj 	 *
157412f080e7Smrj 	 * Since an 'ispec' may not be always created for it,
157512f080e7Smrj 	 * check for that and create one if so.
157612f080e7Smrj 	 *
157712f080e7Smrj 	 * NOTE: Currently 'pcic' is the only driver found to do this.
15787c478bd9Sstevel@tonic-gate 	 */
157912f080e7Smrj 	if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) {
158012f080e7Smrj 		pdp->par_nintr = 1;
158112f080e7Smrj 		pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) *
158212f080e7Smrj 		    pdp->par_nintr, KM_SLEEP);
158312f080e7Smrj 	}
158412f080e7Smrj 
158512f080e7Smrj 	/* Validate the interrupt number */
158612f080e7Smrj 	if (inum >= pdp->par_nintr)
158712f080e7Smrj 		return (NULL);
158812f080e7Smrj 
158912f080e7Smrj 	/* Get the interrupt structure pointer and return that */
159012f080e7Smrj 	return ((struct intrspec *)&pdp->par_intr[inum]);
159112f080e7Smrj }
159212f080e7Smrj 
159312f080e7Smrj 
159412f080e7Smrj /*
159512f080e7Smrj  * ******************
159612f080e7Smrj  *  dma related code
159712f080e7Smrj  * ******************
159812f080e7Smrj  */
159912f080e7Smrj 
160012f080e7Smrj /*ARGSUSED*/
160112f080e7Smrj static int
160220906b23SVikram Hegde rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip,
160320906b23SVikram Hegde     ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
160420906b23SVikram Hegde     ddi_dma_handle_t *handlep)
160512f080e7Smrj {
160612f080e7Smrj 	uint64_t maxsegmentsize_ll;
160712f080e7Smrj 	uint_t maxsegmentsize;
160812f080e7Smrj 	ddi_dma_impl_t *hp;
160912f080e7Smrj 	rootnex_dma_t *dma;
161012f080e7Smrj 	uint64_t count_max;
161112f080e7Smrj 	uint64_t seg;
161212f080e7Smrj 	int kmflag;
161312f080e7Smrj 	int e;
161412f080e7Smrj 
161512f080e7Smrj 
161612f080e7Smrj 	/* convert our sleep flags */
161712f080e7Smrj 	if (waitfp == DDI_DMA_SLEEP) {
161812f080e7Smrj 		kmflag = KM_SLEEP;
161912f080e7Smrj 	} else {
162012f080e7Smrj 		kmflag = KM_NOSLEEP;
162112f080e7Smrj 	}
162212f080e7Smrj 
162312f080e7Smrj 	/*
162412f080e7Smrj 	 * We try to do only one memory allocation here. We'll do a little
162512f080e7Smrj 	 * pointer manipulation later. If the bind ends up taking more than
162612f080e7Smrj 	 * our prealloc's space, we'll have to allocate more memory in the
162712f080e7Smrj 	 * bind operation. Not great, but much better than before and the
162812f080e7Smrj 	 * best we can do with the current bind interfaces.
162912f080e7Smrj 	 */
163012f080e7Smrj 	hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag);
163112f080e7Smrj 	if (hp == NULL) {
163212f080e7Smrj 		if (waitfp != DDI_DMA_DONTWAIT) {
163312f080e7Smrj 			ddi_set_callback(waitfp, arg,
163412f080e7Smrj 			    &rootnex_state->r_dvma_call_list_id);
163512f080e7Smrj 		}
163612f080e7Smrj 		return (DDI_DMA_NORESOURCES);
163712f080e7Smrj 	}
163812f080e7Smrj 
163912f080e7Smrj 	/* Do our pointer manipulation now, align the structures */
164012f080e7Smrj 	hp->dmai_private = (void *)(((uintptr_t)hp +
164112f080e7Smrj 	    (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7);
164212f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
164312f080e7Smrj 	dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma +
164412f080e7Smrj 	    sizeof (rootnex_dma_t) + 0x7) & ~0x7);
164512f080e7Smrj 
164612f080e7Smrj 	/* setup the handle */
164712f080e7Smrj 	rootnex_clean_dmahdl(hp);
164812f080e7Smrj 	dma->dp_dip = rdip;
164912f080e7Smrj 	dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo;
165012f080e7Smrj 	dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi;
165112f080e7Smrj 	hp->dmai_minxfer = attr->dma_attr_minxfer;
165212f080e7Smrj 	hp->dmai_burstsizes = attr->dma_attr_burstsizes;
165312f080e7Smrj 	hp->dmai_rdip = rdip;
165412f080e7Smrj 	hp->dmai_attr = *attr;
165512f080e7Smrj 
165612f080e7Smrj 	/* we don't need to worry about the SPL since we do a tryenter */
165712f080e7Smrj 	mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL);
165812f080e7Smrj 
165912f080e7Smrj 	/*
166012f080e7Smrj 	 * Figure out our maximum segment size. If the segment size is greater
166112f080e7Smrj 	 * than 4G, we will limit it to (4G - 1) since the max size of a dma
166212f080e7Smrj 	 * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and
166312f080e7Smrj 	 * dma_attr_count_max are size-1 type values.
166412f080e7Smrj 	 *
166512f080e7Smrj 	 * Maximum segment size is the largest physically contiguous chunk of
166612f080e7Smrj 	 * memory that we can return from a bind (i.e. the maximum size of a
166712f080e7Smrj 	 * single cookie).
166812f080e7Smrj 	 */
166912f080e7Smrj 
167012f080e7Smrj 	/* handle the rollover cases */
167112f080e7Smrj 	seg = attr->dma_attr_seg + 1;
167212f080e7Smrj 	if (seg < attr->dma_attr_seg) {
167312f080e7Smrj 		seg = attr->dma_attr_seg;
167412f080e7Smrj 	}
167512f080e7Smrj 	count_max = attr->dma_attr_count_max + 1;
167612f080e7Smrj 	if (count_max < attr->dma_attr_count_max) {
167712f080e7Smrj 		count_max = attr->dma_attr_count_max;
167812f080e7Smrj 	}
167912f080e7Smrj 
168012f080e7Smrj 	/*
168112f080e7Smrj 	 * granularity may or may not be a power of two. If it isn't, we can't
168212f080e7Smrj 	 * use a simple mask.
168312f080e7Smrj 	 */
168412f080e7Smrj 	if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) {
168512f080e7Smrj 		dma->dp_granularity_power_2 = B_FALSE;
168612f080e7Smrj 	} else {
168712f080e7Smrj 		dma->dp_granularity_power_2 = B_TRUE;
168812f080e7Smrj 	}
168912f080e7Smrj 
169012f080e7Smrj 	/*
169112f080e7Smrj 	 * maxxfer should be a whole multiple of granularity. If we're going to
169212f080e7Smrj 	 * break up a window because we're greater than maxxfer, we might as
169312f080e7Smrj 	 * well make sure it's maxxfer is a whole multiple so we don't have to
169412f080e7Smrj 	 * worry about triming the window later on for this case.
169512f080e7Smrj 	 */
169612f080e7Smrj 	if (attr->dma_attr_granular > 1) {
169712f080e7Smrj 		if (dma->dp_granularity_power_2) {
169812f080e7Smrj 			dma->dp_maxxfer = attr->dma_attr_maxxfer -
169912f080e7Smrj 			    (attr->dma_attr_maxxfer &
170012f080e7Smrj 			    (attr->dma_attr_granular - 1));
170112f080e7Smrj 		} else {
170212f080e7Smrj 			dma->dp_maxxfer = attr->dma_attr_maxxfer -
170312f080e7Smrj 			    (attr->dma_attr_maxxfer % attr->dma_attr_granular);
170412f080e7Smrj 		}
170512f080e7Smrj 	} else {
170612f080e7Smrj 		dma->dp_maxxfer = attr->dma_attr_maxxfer;
170712f080e7Smrj 	}
170812f080e7Smrj 
170912f080e7Smrj 	maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer);
171012f080e7Smrj 	maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max);
171112f080e7Smrj 	if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) {
171212f080e7Smrj 		maxsegmentsize = 0xFFFFFFFF;
171312f080e7Smrj 	} else {
171412f080e7Smrj 		maxsegmentsize = maxsegmentsize_ll;
171512f080e7Smrj 	}
171612f080e7Smrj 	dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize;
171712f080e7Smrj 	dma->dp_sglinfo.si_segmask = attr->dma_attr_seg;
171812f080e7Smrj 
171912f080e7Smrj 	/* check the ddi_dma_attr arg to make sure it makes a little sense */
172012f080e7Smrj 	if (rootnex_alloc_check_parms) {
172112f080e7Smrj 		e = rootnex_valid_alloc_parms(attr, maxsegmentsize);
172212f080e7Smrj 		if (e != DDI_SUCCESS) {
172312f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]);
172412f080e7Smrj 			(void) rootnex_dma_freehdl(dip, rdip,
172512f080e7Smrj 			    (ddi_dma_handle_t)hp);
172612f080e7Smrj 			return (e);
172712f080e7Smrj 		}
172812f080e7Smrj 	}
172912f080e7Smrj 
173012f080e7Smrj 	*handlep = (ddi_dma_handle_t)hp;
173112f080e7Smrj 
173212f080e7Smrj 	ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
173312f080e7Smrj 	DTRACE_PROBE1(rootnex__alloc__handle, uint64_t,
173412f080e7Smrj 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
173512f080e7Smrj 
173612f080e7Smrj 	return (DDI_SUCCESS);
173712f080e7Smrj }
173812f080e7Smrj 
173912f080e7Smrj 
174012f080e7Smrj /*
174120906b23SVikram Hegde  * rootnex_dma_allochdl()
174220906b23SVikram Hegde  *    called from ddi_dma_alloc_handle().
174312f080e7Smrj  */
174420906b23SVikram Hegde static int
174520906b23SVikram Hegde rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr,
174620906b23SVikram Hegde     int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep)
174720906b23SVikram Hegde {
174820906b23SVikram Hegde #if !defined(__xpv)
174920906b23SVikram Hegde 	uint_t error = ENOTSUP;
175020906b23SVikram Hegde 	int retval;
175120906b23SVikram Hegde 
175220906b23SVikram Hegde 	retval = iommulib_nex_open(rdip, &error);
175320906b23SVikram Hegde 
175420906b23SVikram Hegde 	if (retval != DDI_SUCCESS && error == ENOTSUP) {
175520906b23SVikram Hegde 		/* No IOMMU */
175620906b23SVikram Hegde 		return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg,
175720906b23SVikram Hegde 		    handlep));
175820906b23SVikram Hegde 	} else if (retval != DDI_SUCCESS) {
175920906b23SVikram Hegde 		return (DDI_FAILURE);
176020906b23SVikram Hegde 	}
176120906b23SVikram Hegde 
1762*b51bbbf5SVikram Hegde 	ASSERT(IOMMU_USED(rdip));
176320906b23SVikram Hegde 
176420906b23SVikram Hegde 	/* has an IOMMU */
176520906b23SVikram Hegde 	return (iommulib_nexdma_allochdl(dip, rdip, attr,
176620906b23SVikram Hegde 	    waitfp, arg, handlep));
176720906b23SVikram Hegde #else
176820906b23SVikram Hegde 	return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg,
176920906b23SVikram Hegde 	    handlep));
177020906b23SVikram Hegde #endif
177120906b23SVikram Hegde }
177220906b23SVikram Hegde 
177312f080e7Smrj /*ARGSUSED*/
177412f080e7Smrj static int
177520906b23SVikram Hegde rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip,
177620906b23SVikram Hegde     ddi_dma_handle_t handle)
177712f080e7Smrj {
177812f080e7Smrj 	ddi_dma_impl_t *hp;
177912f080e7Smrj 	rootnex_dma_t *dma;
178012f080e7Smrj 
178112f080e7Smrj 
178212f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
178312f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
178412f080e7Smrj 
178512f080e7Smrj 	/* unbind should have been called first */
178612f080e7Smrj 	ASSERT(!dma->dp_inuse);
178712f080e7Smrj 
178812f080e7Smrj 	mutex_destroy(&dma->dp_mutex);
178912f080e7Smrj 	kmem_cache_free(rootnex_state->r_dmahdl_cache, hp);
179012f080e7Smrj 
179112f080e7Smrj 	ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
179212f080e7Smrj 	DTRACE_PROBE1(rootnex__free__handle, uint64_t,
179312f080e7Smrj 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
179412f080e7Smrj 
179512f080e7Smrj 	if (rootnex_state->r_dvma_call_list_id)
179612f080e7Smrj 		ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
179712f080e7Smrj 
179812f080e7Smrj 	return (DDI_SUCCESS);
179912f080e7Smrj }
180012f080e7Smrj 
180112f080e7Smrj /*
180220906b23SVikram Hegde  * rootnex_dma_freehdl()
180320906b23SVikram Hegde  *    called from ddi_dma_free_handle().
180412f080e7Smrj  */
180520906b23SVikram Hegde static int
180620906b23SVikram Hegde rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle)
180720906b23SVikram Hegde {
180820906b23SVikram Hegde #if !defined(__xpv)
1809*b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
181020906b23SVikram Hegde 		return (iommulib_nexdma_freehdl(dip, rdip, handle));
181120906b23SVikram Hegde 	}
181220906b23SVikram Hegde #endif
181320906b23SVikram Hegde 	return (rootnex_coredma_freehdl(dip, rdip, handle));
181420906b23SVikram Hegde }
181520906b23SVikram Hegde 
181620906b23SVikram Hegde 
181712f080e7Smrj /*ARGSUSED*/
181812f080e7Smrj static int
181920906b23SVikram Hegde rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
182020906b23SVikram Hegde     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
182120906b23SVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t *ccountp)
182212f080e7Smrj {
182312f080e7Smrj 	rootnex_sglinfo_t *sinfo;
182412f080e7Smrj 	ddi_dma_attr_t *attr;
182512f080e7Smrj 	ddi_dma_impl_t *hp;
182612f080e7Smrj 	rootnex_dma_t *dma;
182712f080e7Smrj 	int kmflag;
182812f080e7Smrj 	int e;
182912f080e7Smrj 
183012f080e7Smrj 
183112f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
183212f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
183312f080e7Smrj 	sinfo = &dma->dp_sglinfo;
183412f080e7Smrj 	attr = &hp->dmai_attr;
183512f080e7Smrj 
183694f1124eSVikram Hegde 	if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
183794f1124eSVikram Hegde 		dma->dp_sleep_flags = KM_SLEEP;
183894f1124eSVikram Hegde 	} else {
183994f1124eSVikram Hegde 		dma->dp_sleep_flags = KM_NOSLEEP;
184094f1124eSVikram Hegde 	}
184194f1124eSVikram Hegde 
184212f080e7Smrj 	hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS;
184312f080e7Smrj 
184412f080e7Smrj 	/*
184512f080e7Smrj 	 * This is useful for debugging a driver. Not as useful in a production
184612f080e7Smrj 	 * system. The only time this will fail is if you have a driver bug.
184712f080e7Smrj 	 */
184812f080e7Smrj 	if (rootnex_bind_check_inuse) {
184912f080e7Smrj 		/*
185012f080e7Smrj 		 * No one else should ever have this lock unless someone else
185112f080e7Smrj 		 * is trying to use this handle. So contention on the lock
185212f080e7Smrj 		 * is the same as inuse being set.
185312f080e7Smrj 		 */
185412f080e7Smrj 		e = mutex_tryenter(&dma->dp_mutex);
185512f080e7Smrj 		if (e == 0) {
185612f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
185712f080e7Smrj 			return (DDI_DMA_INUSE);
185812f080e7Smrj 		}
185912f080e7Smrj 		if (dma->dp_inuse) {
186012f080e7Smrj 			mutex_exit(&dma->dp_mutex);
186112f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
186212f080e7Smrj 			return (DDI_DMA_INUSE);
186312f080e7Smrj 		}
186412f080e7Smrj 		dma->dp_inuse = B_TRUE;
186512f080e7Smrj 		mutex_exit(&dma->dp_mutex);
186612f080e7Smrj 	}
186712f080e7Smrj 
186812f080e7Smrj 	/* check the ddi_dma_attr arg to make sure it makes a little sense */
186912f080e7Smrj 	if (rootnex_bind_check_parms) {
187012f080e7Smrj 		e = rootnex_valid_bind_parms(dmareq, attr);
187112f080e7Smrj 		if (e != DDI_SUCCESS) {
187212f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
187312f080e7Smrj 			rootnex_clean_dmahdl(hp);
187412f080e7Smrj 			return (e);
187512f080e7Smrj 		}
187612f080e7Smrj 	}
187712f080e7Smrj 
187812f080e7Smrj 	/* save away the original bind info */
187912f080e7Smrj 	dma->dp_dma = dmareq->dmar_object;
188012f080e7Smrj 
188120906b23SVikram Hegde #if !defined(__xpv)
188286c1f4dcSVikram Hegde 	if (rootnex_state->r_intel_iommu_enabled) {
188386c1f4dcSVikram Hegde 		e = intel_iommu_map_sgl(handle, dmareq,
188486c1f4dcSVikram Hegde 		    rootnex_state->r_prealloc_cookies);
188586c1f4dcSVikram Hegde 
188686c1f4dcSVikram Hegde 		switch (e) {
188786c1f4dcSVikram Hegde 		case IOMMU_SGL_SUCCESS:
188886c1f4dcSVikram Hegde 			goto rootnex_sgl_end;
188986c1f4dcSVikram Hegde 
189086c1f4dcSVikram Hegde 		case IOMMU_SGL_DISABLE:
189186c1f4dcSVikram Hegde 			goto rootnex_sgl_start;
189286c1f4dcSVikram Hegde 
189386c1f4dcSVikram Hegde 		case IOMMU_SGL_NORESOURCES:
189486c1f4dcSVikram Hegde 			cmn_err(CE_WARN, "iommu map sgl failed for %s",
189586c1f4dcSVikram Hegde 			    ddi_node_name(dma->dp_dip));
189686c1f4dcSVikram Hegde 			rootnex_clean_dmahdl(hp);
189786c1f4dcSVikram Hegde 			return (DDI_DMA_NORESOURCES);
189886c1f4dcSVikram Hegde 
189986c1f4dcSVikram Hegde 		default:
190086c1f4dcSVikram Hegde 			cmn_err(CE_WARN,
190186c1f4dcSVikram Hegde 			    "undefined value returned from"
190286c1f4dcSVikram Hegde 			    " intel_iommu_map_sgl: %d",
190386c1f4dcSVikram Hegde 			    e);
190486c1f4dcSVikram Hegde 			rootnex_clean_dmahdl(hp);
190586c1f4dcSVikram Hegde 			return (DDI_DMA_NORESOURCES);
190686c1f4dcSVikram Hegde 		}
190786c1f4dcSVikram Hegde 	}
190820906b23SVikram Hegde #endif
190986c1f4dcSVikram Hegde 
191086c1f4dcSVikram Hegde rootnex_sgl_start:
191112f080e7Smrj 	/*
191212f080e7Smrj 	 * Figure out a rough estimate of what maximum number of pages this
191312f080e7Smrj 	 * buffer could use (a high estimate of course).
191412f080e7Smrj 	 */
191512f080e7Smrj 	sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1;
191612f080e7Smrj 
191712f080e7Smrj 	/*
191812f080e7Smrj 	 * We'll use the pre-allocated cookies for any bind that will *always*
191912f080e7Smrj 	 * fit (more important to be consistent, we don't want to create
192012f080e7Smrj 	 * additional degenerate cases).
192112f080e7Smrj 	 */
192212f080e7Smrj 	if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) {
192312f080e7Smrj 		dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer;
192412f080e7Smrj 		dma->dp_need_to_free_cookie = B_FALSE;
192512f080e7Smrj 		DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip,
192612f080e7Smrj 		    uint_t, sinfo->si_max_pages);
192712f080e7Smrj 
192812f080e7Smrj 	/*
192912f080e7Smrj 	 * For anything larger than that, we'll go ahead and allocate the
193012f080e7Smrj 	 * maximum number of pages we expect to see. Hopefuly, we won't be
193112f080e7Smrj 	 * seeing this path in the fast path for high performance devices very
193212f080e7Smrj 	 * frequently.
193312f080e7Smrj 	 *
193412f080e7Smrj 	 * a ddi bind interface that allowed the driver to provide storage to
193512f080e7Smrj 	 * the bind interface would speed this case up.
193612f080e7Smrj 	 */
193712f080e7Smrj 	} else {
193812f080e7Smrj 		/* convert the sleep flags */
193912f080e7Smrj 		if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
194012f080e7Smrj 			kmflag =  KM_SLEEP;
194112f080e7Smrj 		} else {
194212f080e7Smrj 			kmflag =  KM_NOSLEEP;
194312f080e7Smrj 		}
194412f080e7Smrj 
194512f080e7Smrj 		/*
194612f080e7Smrj 		 * Save away how much memory we allocated. If we're doing a
194712f080e7Smrj 		 * nosleep, the alloc could fail...
194812f080e7Smrj 		 */
194912f080e7Smrj 		dma->dp_cookie_size = sinfo->si_max_pages *
195012f080e7Smrj 		    sizeof (ddi_dma_cookie_t);
195112f080e7Smrj 		dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag);
195212f080e7Smrj 		if (dma->dp_cookies == NULL) {
195312f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
195412f080e7Smrj 			rootnex_clean_dmahdl(hp);
195512f080e7Smrj 			return (DDI_DMA_NORESOURCES);
195612f080e7Smrj 		}
195712f080e7Smrj 		dma->dp_need_to_free_cookie = B_TRUE;
195812f080e7Smrj 		DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t,
195912f080e7Smrj 		    sinfo->si_max_pages);
196012f080e7Smrj 	}
196112f080e7Smrj 	hp->dmai_cookie = dma->dp_cookies;
196212f080e7Smrj 
196312f080e7Smrj 	/*
196412f080e7Smrj 	 * Get the real sgl. rootnex_get_sgl will fill in cookie array while
196512f080e7Smrj 	 * looking at the contraints in the dma structure. It will then put some
196612f080e7Smrj 	 * additional state about the sgl in the dma struct (i.e. is the sgl
196712f080e7Smrj 	 * clean, or do we need to do some munging; how many pages need to be
196812f080e7Smrj 	 * copied, etc.)
196912f080e7Smrj 	 */
197012f080e7Smrj 	rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies,
197112f080e7Smrj 	    &dma->dp_sglinfo);
197212f080e7Smrj 
197386c1f4dcSVikram Hegde rootnex_sgl_end:
197486c1f4dcSVikram Hegde 	ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages);
197512f080e7Smrj 	/* if we don't need a copy buffer, we don't need to sync */
197612f080e7Smrj 	if (sinfo->si_copybuf_req == 0) {
197712f080e7Smrj 		hp->dmai_rflags |= DMP_NOSYNC;
197812f080e7Smrj 	}
197912f080e7Smrj 
198012f080e7Smrj 	/*
198112f080e7Smrj 	 * if we don't need the copybuf and we don't need to do a partial,  we
198212f080e7Smrj 	 * hit the fast path. All the high performance devices should be trying
198312f080e7Smrj 	 * to hit this path. To hit this path, a device should be able to reach
198412f080e7Smrj 	 * all of memory, shouldn't try to bind more than it can transfer, and
198512f080e7Smrj 	 * the buffer shouldn't require more cookies than the driver/device can
198612f080e7Smrj 	 * handle [sgllen]).
198712f080e7Smrj 	 */
198812f080e7Smrj 	if ((sinfo->si_copybuf_req == 0) &&
198912f080e7Smrj 	    (sinfo->si_sgl_size <= attr->dma_attr_sgllen) &&
199012f080e7Smrj 	    (dma->dp_dma.dmao_size < dma->dp_maxxfer)) {
199112f080e7Smrj 		/*
199285c8e0e8Sstephh 		 * If the driver supports FMA, insert the handle in the FMA DMA
199385c8e0e8Sstephh 		 * handle cache.
199485c8e0e8Sstephh 		 */
199585c8e0e8Sstephh 		if (attr->dma_attr_flags & DDI_DMA_FLAGERR) {
199685c8e0e8Sstephh 			hp->dmai_error.err_cf = rootnex_dma_check;
199785c8e0e8Sstephh 			(void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL);
199885c8e0e8Sstephh 		}
199985c8e0e8Sstephh 
200085c8e0e8Sstephh 		/*
200112f080e7Smrj 		 * copy out the first cookie and ccountp, set the cookie
200212f080e7Smrj 		 * pointer to the second cookie. The first cookie is passed
200312f080e7Smrj 		 * back on the stack. Additional cookies are accessed via
200412f080e7Smrj 		 * ddi_dma_nextcookie()
200512f080e7Smrj 		 */
200612f080e7Smrj 		*cookiep = dma->dp_cookies[0];
200712f080e7Smrj 		*ccountp = sinfo->si_sgl_size;
200812f080e7Smrj 		hp->dmai_cookie++;
200912f080e7Smrj 		hp->dmai_rflags &= ~DDI_DMA_PARTIAL;
201012f080e7Smrj 		hp->dmai_nwin = 1;
201112f080e7Smrj 		ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
201212f080e7Smrj 		DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, uint64_t,
201312f080e7Smrj 		    rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t,
201412f080e7Smrj 		    dma->dp_dma.dmao_size);
201512f080e7Smrj 		return (DDI_DMA_MAPPED);
201612f080e7Smrj 	}
201712f080e7Smrj 
201812f080e7Smrj 	/*
201912f080e7Smrj 	 * go to the slow path, we may need to alloc more memory, create
202012f080e7Smrj 	 * multiple windows, and munge up a sgl to make the device happy.
202112f080e7Smrj 	 */
202212f080e7Smrj 	e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag);
202312f080e7Smrj 	if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) {
202412f080e7Smrj 		if (dma->dp_need_to_free_cookie) {
202512f080e7Smrj 			kmem_free(dma->dp_cookies, dma->dp_cookie_size);
202612f080e7Smrj 		}
202712f080e7Smrj 		ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
202812f080e7Smrj 		rootnex_clean_dmahdl(hp); /* must be after free cookie */
202912f080e7Smrj 		return (e);
203012f080e7Smrj 	}
203112f080e7Smrj 
203285c8e0e8Sstephh 	/*
203385c8e0e8Sstephh 	 * If the driver supports FMA, insert the handle in the FMA DMA handle
203485c8e0e8Sstephh 	 * cache.
203585c8e0e8Sstephh 	 */
203685c8e0e8Sstephh 	if (attr->dma_attr_flags & DDI_DMA_FLAGERR) {
203785c8e0e8Sstephh 		hp->dmai_error.err_cf = rootnex_dma_check;
203885c8e0e8Sstephh 		(void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL);
203985c8e0e8Sstephh 	}
204085c8e0e8Sstephh 
204112f080e7Smrj 	/* if the first window uses the copy buffer, sync it for the device */
204212f080e7Smrj 	if ((dma->dp_window[dma->dp_current_win].wd_dosync) &&
204312f080e7Smrj 	    (hp->dmai_rflags & DDI_DMA_WRITE)) {
204494f1124eSVikram Hegde 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
204512f080e7Smrj 		    DDI_DMA_SYNC_FORDEV);
204612f080e7Smrj 	}
204712f080e7Smrj 
204812f080e7Smrj 	/*
204912f080e7Smrj 	 * copy out the first cookie and ccountp, set the cookie pointer to the
205012f080e7Smrj 	 * second cookie. Make sure the partial flag is set/cleared correctly.
205112f080e7Smrj 	 * If we have a partial map (i.e. multiple windows), the number of
205212f080e7Smrj 	 * cookies we return is the number of cookies in the first window.
205312f080e7Smrj 	 */
205412f080e7Smrj 	if (e == DDI_DMA_MAPPED) {
205512f080e7Smrj 		hp->dmai_rflags &= ~DDI_DMA_PARTIAL;
205612f080e7Smrj 		*ccountp = sinfo->si_sgl_size;
205712f080e7Smrj 	} else {
205812f080e7Smrj 		hp->dmai_rflags |= DDI_DMA_PARTIAL;
205912f080e7Smrj 		*ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt;
206012f080e7Smrj 		ASSERT(hp->dmai_nwin <= dma->dp_max_win);
206112f080e7Smrj 	}
206212f080e7Smrj 	*cookiep = dma->dp_cookies[0];
206312f080e7Smrj 	hp->dmai_cookie++;
206412f080e7Smrj 
206512f080e7Smrj 	ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
206612f080e7Smrj 	DTRACE_PROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t,
206712f080e7Smrj 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t,
206812f080e7Smrj 	    dma->dp_dma.dmao_size);
206912f080e7Smrj 	return (e);
207012f080e7Smrj }
207112f080e7Smrj 
207212f080e7Smrj 
207312f080e7Smrj /*
207420906b23SVikram Hegde  * rootnex_dma_bindhdl()
207520906b23SVikram Hegde  *    called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle().
207612f080e7Smrj  */
207720906b23SVikram Hegde static int
207820906b23SVikram Hegde rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
207920906b23SVikram Hegde     ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
208020906b23SVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t *ccountp)
208120906b23SVikram Hegde {
208220906b23SVikram Hegde #if !defined(__xpv)
2083*b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
208420906b23SVikram Hegde 		return (iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq,
208520906b23SVikram Hegde 		    cookiep, ccountp));
208620906b23SVikram Hegde 	}
208720906b23SVikram Hegde #endif
208820906b23SVikram Hegde 	return (rootnex_coredma_bindhdl(dip, rdip, handle, dmareq,
208920906b23SVikram Hegde 	    cookiep, ccountp));
209020906b23SVikram Hegde }
209120906b23SVikram Hegde 
209212f080e7Smrj /*ARGSUSED*/
209312f080e7Smrj static int
209420906b23SVikram Hegde rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
209512f080e7Smrj     ddi_dma_handle_t handle)
209612f080e7Smrj {
209712f080e7Smrj 	ddi_dma_impl_t *hp;
209812f080e7Smrj 	rootnex_dma_t *dma;
209912f080e7Smrj 	int e;
210012f080e7Smrj 
210112f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
210212f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
210312f080e7Smrj 
210412f080e7Smrj 	/* make sure the buffer wasn't free'd before calling unbind */
210512f080e7Smrj 	if (rootnex_unbind_verify_buffer) {
210612f080e7Smrj 		e = rootnex_verify_buffer(dma);
210712f080e7Smrj 		if (e != DDI_SUCCESS) {
210812f080e7Smrj 			ASSERT(0);
210912f080e7Smrj 			return (DDI_FAILURE);
211012f080e7Smrj 		}
211112f080e7Smrj 	}
211212f080e7Smrj 
211312f080e7Smrj 	/* sync the current window before unbinding the buffer */
211412f080e7Smrj 	if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync &&
211512f080e7Smrj 	    (hp->dmai_rflags & DDI_DMA_READ)) {
211694f1124eSVikram Hegde 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
211712f080e7Smrj 		    DDI_DMA_SYNC_FORCPU);
211812f080e7Smrj 	}
211912f080e7Smrj 
212012f080e7Smrj 	/*
212100d0963fSdilpreet 	 * If the driver supports FMA, remove the handle in the FMA DMA handle
212200d0963fSdilpreet 	 * cache.
212300d0963fSdilpreet 	 */
212400d0963fSdilpreet 	if (hp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) {
212500d0963fSdilpreet 		if ((DEVI(rdip)->devi_fmhdl != NULL) &&
212600d0963fSdilpreet 		    (DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap))) {
212700d0963fSdilpreet 			(void) ndi_fmc_remove(rdip, DMA_HANDLE, hp);
212800d0963fSdilpreet 		}
212900d0963fSdilpreet 	}
213000d0963fSdilpreet 
213100d0963fSdilpreet 	/*
213212f080e7Smrj 	 * cleanup and copy buffer or window state. if we didn't use the copy
213312f080e7Smrj 	 * buffer or windows, there won't be much to do :-)
213412f080e7Smrj 	 */
213512f080e7Smrj 	rootnex_teardown_copybuf(dma);
213612f080e7Smrj 	rootnex_teardown_windows(dma);
213712f080e7Smrj 
213820906b23SVikram Hegde #if !defined(__xpv)
213912f080e7Smrj 	/*
214086c1f4dcSVikram Hegde 	 * If intel iommu enabled, clean up the page tables and free the dvma
214186c1f4dcSVikram Hegde 	 */
214286c1f4dcSVikram Hegde 	if (rootnex_state->r_intel_iommu_enabled) {
214386c1f4dcSVikram Hegde 		intel_iommu_unmap_sgl(handle);
214486c1f4dcSVikram Hegde 	}
214520906b23SVikram Hegde #endif
214686c1f4dcSVikram Hegde 
214786c1f4dcSVikram Hegde 	/*
214812f080e7Smrj 	 * If we had to allocate space to for the worse case sgl (it didn't
214912f080e7Smrj 	 * fit into our pre-allocate buffer), free that up now
215012f080e7Smrj 	 */
215112f080e7Smrj 	if (dma->dp_need_to_free_cookie) {
215212f080e7Smrj 		kmem_free(dma->dp_cookies, dma->dp_cookie_size);
215312f080e7Smrj 	}
215412f080e7Smrj 
215512f080e7Smrj 	/*
215612f080e7Smrj 	 * clean up the handle so it's ready for the next bind (i.e. if the
215712f080e7Smrj 	 * handle is reused).
215812f080e7Smrj 	 */
215912f080e7Smrj 	rootnex_clean_dmahdl(hp);
216012f080e7Smrj 
216112f080e7Smrj 	if (rootnex_state->r_dvma_call_list_id)
216212f080e7Smrj 		ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
216312f080e7Smrj 
216412f080e7Smrj 	ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
216512f080e7Smrj 	DTRACE_PROBE1(rootnex__unbind, uint64_t,
216612f080e7Smrj 	    rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
216712f080e7Smrj 
216812f080e7Smrj 	return (DDI_SUCCESS);
216912f080e7Smrj }
217012f080e7Smrj 
217120906b23SVikram Hegde /*
217220906b23SVikram Hegde  * rootnex_dma_unbindhdl()
217320906b23SVikram Hegde  *    called from ddi_dma_unbind_handle()
217420906b23SVikram Hegde  */
217520906b23SVikram Hegde /*ARGSUSED*/
217620906b23SVikram Hegde static int
217720906b23SVikram Hegde rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
217820906b23SVikram Hegde     ddi_dma_handle_t handle)
217920906b23SVikram Hegde {
218020906b23SVikram Hegde #if !defined(__xpv)
2181*b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
218220906b23SVikram Hegde 		return (iommulib_nexdma_unbindhdl(dip, rdip, handle));
218320906b23SVikram Hegde 	}
218420906b23SVikram Hegde #endif
218520906b23SVikram Hegde 	return (rootnex_coredma_unbindhdl(dip, rdip, handle));
218620906b23SVikram Hegde }
218720906b23SVikram Hegde 
21885dfdb46bSVikram Hegde #if !defined(__xpv)
218994f1124eSVikram Hegde 
219094f1124eSVikram Hegde static int
219194f1124eSVikram Hegde rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle)
219294f1124eSVikram Hegde {
219394f1124eSVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
219494f1124eSVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
219594f1124eSVikram Hegde 
219694f1124eSVikram Hegde 	if (dma->dp_sleep_flags != KM_SLEEP &&
219794f1124eSVikram Hegde 	    dma->dp_sleep_flags != KM_NOSLEEP)
219894f1124eSVikram Hegde 		cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle");
219994f1124eSVikram Hegde 	return (dma->dp_sleep_flags);
220094f1124eSVikram Hegde }
220120906b23SVikram Hegde /*ARGSUSED*/
220220906b23SVikram Hegde static void
220320906b23SVikram Hegde rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle)
220420906b23SVikram Hegde {
220520906b23SVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
220620906b23SVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
220794f1124eSVikram Hegde 	rootnex_window_t *window;
220820906b23SVikram Hegde 
220994f1124eSVikram Hegde 	if (dma->dp_window) {
221094f1124eSVikram Hegde 		window = &dma->dp_window[dma->dp_current_win];
221194f1124eSVikram Hegde 		hp->dmai_cookie = window->wd_first_cookie;
221294f1124eSVikram Hegde 	} else {
221394f1124eSVikram Hegde 		hp->dmai_cookie = dma->dp_cookies;
221494f1124eSVikram Hegde 	}
221520906b23SVikram Hegde 	hp->dmai_cookie++;
221620906b23SVikram Hegde }
221720906b23SVikram Hegde 
221820906b23SVikram Hegde /*ARGSUSED*/
221920906b23SVikram Hegde static int
222020906b23SVikram Hegde rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
222194f1124eSVikram Hegde     ddi_dma_cookie_t **cookiepp, uint_t *ccountp)
222220906b23SVikram Hegde {
222394f1124eSVikram Hegde 	int i;
222494f1124eSVikram Hegde 	int km_flags;
222520906b23SVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
222620906b23SVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
222794f1124eSVikram Hegde 	rootnex_window_t *window;
222894f1124eSVikram Hegde 	ddi_dma_cookie_t *cp;
222994f1124eSVikram Hegde 	ddi_dma_cookie_t *cookie;
223020906b23SVikram Hegde 
223194f1124eSVikram Hegde 	ASSERT(*cookiepp == NULL);
223294f1124eSVikram Hegde 	ASSERT(*ccountp == 0);
223320906b23SVikram Hegde 
223494f1124eSVikram Hegde 	if (dma->dp_window) {
223594f1124eSVikram Hegde 		window = &dma->dp_window[dma->dp_current_win];
223694f1124eSVikram Hegde 		cp = window->wd_first_cookie;
223794f1124eSVikram Hegde 		*ccountp = window->wd_cookie_cnt;
223820906b23SVikram Hegde 	} else {
223994f1124eSVikram Hegde 		cp = dma->dp_cookies;
224020906b23SVikram Hegde 		*ccountp = dma->dp_sglinfo.si_sgl_size;
224120906b23SVikram Hegde 	}
224220906b23SVikram Hegde 
224394f1124eSVikram Hegde 	km_flags = rootnex_coredma_get_sleep_flags(handle);
224494f1124eSVikram Hegde 	cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags);
224594f1124eSVikram Hegde 	if (cookie == NULL) {
224694f1124eSVikram Hegde 		return (DDI_DMA_NORESOURCES);
224794f1124eSVikram Hegde 	}
224894f1124eSVikram Hegde 
224994f1124eSVikram Hegde 	for (i = 0; i < *ccountp; i++) {
225094f1124eSVikram Hegde 		cookie[i].dmac_notused = cp[i].dmac_notused;
225194f1124eSVikram Hegde 		cookie[i].dmac_type = cp[i].dmac_type;
225294f1124eSVikram Hegde 		cookie[i].dmac_address = cp[i].dmac_address;
225394f1124eSVikram Hegde 		cookie[i].dmac_size = cp[i].dmac_size;
225494f1124eSVikram Hegde 	}
225594f1124eSVikram Hegde 
225694f1124eSVikram Hegde 	*cookiepp = cookie;
225720906b23SVikram Hegde 
225820906b23SVikram Hegde 	return (DDI_SUCCESS);
225920906b23SVikram Hegde }
226094f1124eSVikram Hegde 
226194f1124eSVikram Hegde /*ARGSUSED*/
226294f1124eSVikram Hegde static int
226394f1124eSVikram Hegde rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
226494f1124eSVikram Hegde     ddi_dma_cookie_t *cookiep, uint_t ccount)
226594f1124eSVikram Hegde {
226694f1124eSVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
226794f1124eSVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
226894f1124eSVikram Hegde 	rootnex_window_t *window;
226994f1124eSVikram Hegde 	ddi_dma_cookie_t *cur_cookiep;
227094f1124eSVikram Hegde 
227194f1124eSVikram Hegde 	ASSERT(cookiep);
227294f1124eSVikram Hegde 	ASSERT(ccount != 0);
227394f1124eSVikram Hegde 	ASSERT(dma->dp_need_to_switch_cookies == B_FALSE);
227494f1124eSVikram Hegde 
227594f1124eSVikram Hegde 	if (dma->dp_window) {
227694f1124eSVikram Hegde 		window = &dma->dp_window[dma->dp_current_win];
227794f1124eSVikram Hegde 		dma->dp_saved_cookies = window->wd_first_cookie;
227894f1124eSVikram Hegde 		window->wd_first_cookie = cookiep;
227994f1124eSVikram Hegde 		ASSERT(ccount == window->wd_cookie_cnt);
228094f1124eSVikram Hegde 		cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies)
228194f1124eSVikram Hegde 		    + window->wd_first_cookie;
228294f1124eSVikram Hegde 	} else {
228394f1124eSVikram Hegde 		dma->dp_saved_cookies = dma->dp_cookies;
228494f1124eSVikram Hegde 		dma->dp_cookies = cookiep;
228594f1124eSVikram Hegde 		ASSERT(ccount == dma->dp_sglinfo.si_sgl_size);
228694f1124eSVikram Hegde 		cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies)
228794f1124eSVikram Hegde 		    + dma->dp_cookies;
228894f1124eSVikram Hegde 	}
228994f1124eSVikram Hegde 
229094f1124eSVikram Hegde 	dma->dp_need_to_switch_cookies = B_TRUE;
229194f1124eSVikram Hegde 	hp->dmai_cookie = cur_cookiep;
229294f1124eSVikram Hegde 
229394f1124eSVikram Hegde 	return (DDI_SUCCESS);
229494f1124eSVikram Hegde }
229594f1124eSVikram Hegde 
229694f1124eSVikram Hegde /*ARGSUSED*/
229794f1124eSVikram Hegde static int
229894f1124eSVikram Hegde rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle)
229994f1124eSVikram Hegde {
230094f1124eSVikram Hegde 	ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
230194f1124eSVikram Hegde 	rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
230294f1124eSVikram Hegde 	rootnex_window_t *window;
230394f1124eSVikram Hegde 	ddi_dma_cookie_t *cur_cookiep;
230494f1124eSVikram Hegde 	ddi_dma_cookie_t *cookie_array;
230594f1124eSVikram Hegde 	uint_t ccount;
230694f1124eSVikram Hegde 
230794f1124eSVikram Hegde 	/* check if cookies have not been switched */
230894f1124eSVikram Hegde 	if (dma->dp_need_to_switch_cookies == B_FALSE)
230994f1124eSVikram Hegde 		return (DDI_SUCCESS);
231094f1124eSVikram Hegde 
231194f1124eSVikram Hegde 	ASSERT(dma->dp_saved_cookies);
231294f1124eSVikram Hegde 
231394f1124eSVikram Hegde 	if (dma->dp_window) {
231494f1124eSVikram Hegde 		window = &dma->dp_window[dma->dp_current_win];
231594f1124eSVikram Hegde 		cookie_array = window->wd_first_cookie;
231694f1124eSVikram Hegde 		window->wd_first_cookie = dma->dp_saved_cookies;
231794f1124eSVikram Hegde 		dma->dp_saved_cookies = NULL;
231894f1124eSVikram Hegde 		ccount = window->wd_cookie_cnt;
231994f1124eSVikram Hegde 		cur_cookiep = (hp->dmai_cookie - cookie_array)
232094f1124eSVikram Hegde 		    + window->wd_first_cookie;
232194f1124eSVikram Hegde 	} else {
232294f1124eSVikram Hegde 		cookie_array = dma->dp_cookies;
232394f1124eSVikram Hegde 		dma->dp_cookies = dma->dp_saved_cookies;
232494f1124eSVikram Hegde 		dma->dp_saved_cookies = NULL;
232594f1124eSVikram Hegde 		ccount = dma->dp_sglinfo.si_sgl_size;
232694f1124eSVikram Hegde 		cur_cookiep = (hp->dmai_cookie - cookie_array)
232794f1124eSVikram Hegde 		    + dma->dp_cookies;
232894f1124eSVikram Hegde 	}
232994f1124eSVikram Hegde 
233094f1124eSVikram Hegde 	kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount);
233194f1124eSVikram Hegde 
233294f1124eSVikram Hegde 	hp->dmai_cookie = cur_cookiep;
233394f1124eSVikram Hegde 
233494f1124eSVikram Hegde 	dma->dp_need_to_switch_cookies = B_FALSE;
233594f1124eSVikram Hegde 
233694f1124eSVikram Hegde 	return (DDI_SUCCESS);
233794f1124eSVikram Hegde }
233894f1124eSVikram Hegde 
23395dfdb46bSVikram Hegde #endif
234012f080e7Smrj 
234112f080e7Smrj /*
234212f080e7Smrj  * rootnex_verify_buffer()
234312f080e7Smrj  *   verify buffer wasn't free'd
234412f080e7Smrj  */
234512f080e7Smrj static int
234612f080e7Smrj rootnex_verify_buffer(rootnex_dma_t *dma)
234712f080e7Smrj {
234812f080e7Smrj 	page_t **pplist;
234912f080e7Smrj 	caddr_t vaddr;
235012f080e7Smrj 	uint_t pcnt;
235112f080e7Smrj 	uint_t poff;
235212f080e7Smrj 	page_t *pp;
235300d0963fSdilpreet 	char b;
235412f080e7Smrj 	int i;
235512f080e7Smrj 
235612f080e7Smrj 	/* Figure out how many pages this buffer occupies */
235712f080e7Smrj 	if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) {
235812f080e7Smrj 		poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET;
235912f080e7Smrj 	} else {
236012f080e7Smrj 		vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr;
236112f080e7Smrj 		poff = (uintptr_t)vaddr & MMU_PAGEOFFSET;
236212f080e7Smrj 	}
236312f080e7Smrj 	pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff);
236412f080e7Smrj 
236512f080e7Smrj 	switch (dma->dp_dma.dmao_type) {
236612f080e7Smrj 	case DMA_OTYP_PAGES:
236712f080e7Smrj 		/*
236812f080e7Smrj 		 * for a linked list of pp's walk through them to make sure
236912f080e7Smrj 		 * they're locked and not free.
237012f080e7Smrj 		 */
237112f080e7Smrj 		pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp;
237212f080e7Smrj 		for (i = 0; i < pcnt; i++) {
237312f080e7Smrj 			if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) {
237412f080e7Smrj 				return (DDI_FAILURE);
237512f080e7Smrj 			}
23767c478bd9Sstevel@tonic-gate 			pp = pp->p_next;
23777c478bd9Sstevel@tonic-gate 		}
23787c478bd9Sstevel@tonic-gate 		break;
237912f080e7Smrj 
23807c478bd9Sstevel@tonic-gate 	case DMA_OTYP_VADDR:
23817c478bd9Sstevel@tonic-gate 	case DMA_OTYP_BUFVADDR:
238212f080e7Smrj 		pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv;
238312f080e7Smrj 		/*
238412f080e7Smrj 		 * for an array of pp's walk through them to make sure they're
238512f080e7Smrj 		 * not free. It's possible that they may not be locked.
238612f080e7Smrj 		 */
238712f080e7Smrj 		if (pplist) {
238812f080e7Smrj 			for (i = 0; i < pcnt; i++) {
238912f080e7Smrj 				if (PP_ISFREE(pplist[i])) {
239012f080e7Smrj 					return (DDI_FAILURE);
239112f080e7Smrj 				}
239212f080e7Smrj 			}
239312f080e7Smrj 
239412f080e7Smrj 		/* For a virtual address, try to peek at each page */
239512f080e7Smrj 		} else {
239612f080e7Smrj 			if (dma->dp_sglinfo.si_asp == &kas) {
239712f080e7Smrj 				for (i = 0; i < pcnt; i++) {
239800d0963fSdilpreet 					if (ddi_peek8(NULL, vaddr, &b) ==
239900d0963fSdilpreet 					    DDI_FAILURE)
240012f080e7Smrj 						return (DDI_FAILURE);
240100d0963fSdilpreet 					vaddr += MMU_PAGESIZE;
240212f080e7Smrj 				}
240312f080e7Smrj 			}
240412f080e7Smrj 		}
240512f080e7Smrj 		break;
240612f080e7Smrj 
240712f080e7Smrj 	default:
240812f080e7Smrj 		ASSERT(0);
240912f080e7Smrj 		break;
241012f080e7Smrj 	}
241112f080e7Smrj 
241212f080e7Smrj 	return (DDI_SUCCESS);
241312f080e7Smrj }
241412f080e7Smrj 
241512f080e7Smrj 
241612f080e7Smrj /*
241712f080e7Smrj  * rootnex_clean_dmahdl()
241812f080e7Smrj  *    Clean the dma handle. This should be called on a handle alloc and an
241912f080e7Smrj  *    unbind handle. Set the handle state to the default settings.
242012f080e7Smrj  */
242112f080e7Smrj static void
242212f080e7Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp)
242312f080e7Smrj {
242412f080e7Smrj 	rootnex_dma_t *dma;
242512f080e7Smrj 
242612f080e7Smrj 
242712f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
242812f080e7Smrj 
242912f080e7Smrj 	hp->dmai_nwin = 0;
243012f080e7Smrj 	dma->dp_current_cookie = 0;
243112f080e7Smrj 	dma->dp_copybuf_size = 0;
243212f080e7Smrj 	dma->dp_window = NULL;
243312f080e7Smrj 	dma->dp_cbaddr = NULL;
243412f080e7Smrj 	dma->dp_inuse = B_FALSE;
243512f080e7Smrj 	dma->dp_need_to_free_cookie = B_FALSE;
243694f1124eSVikram Hegde 	dma->dp_need_to_switch_cookies = B_FALSE;
243794f1124eSVikram Hegde 	dma->dp_saved_cookies = NULL;
243894f1124eSVikram Hegde 	dma->dp_sleep_flags = KM_PANIC;
243912f080e7Smrj 	dma->dp_need_to_free_window = B_FALSE;
244012f080e7Smrj 	dma->dp_partial_required = B_FALSE;
244112f080e7Smrj 	dma->dp_trim_required = B_FALSE;
244212f080e7Smrj 	dma->dp_sglinfo.si_copybuf_req = 0;
244312f080e7Smrj #if !defined(__amd64)
244412f080e7Smrj 	dma->dp_cb_remaping = B_FALSE;
244512f080e7Smrj 	dma->dp_kva = NULL;
244612f080e7Smrj #endif
244712f080e7Smrj 
244812f080e7Smrj 	/* FMA related initialization */
244912f080e7Smrj 	hp->dmai_fault = 0;
245012f080e7Smrj 	hp->dmai_fault_check = NULL;
245112f080e7Smrj 	hp->dmai_fault_notify = NULL;
245212f080e7Smrj 	hp->dmai_error.err_ena = 0;
245312f080e7Smrj 	hp->dmai_error.err_status = DDI_FM_OK;
245412f080e7Smrj 	hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED;
245512f080e7Smrj 	hp->dmai_error.err_ontrap = NULL;
245612f080e7Smrj 	hp->dmai_error.err_fep = NULL;
245700d0963fSdilpreet 	hp->dmai_error.err_cf = NULL;
245812f080e7Smrj }
245912f080e7Smrj 
246012f080e7Smrj 
246112f080e7Smrj /*
246212f080e7Smrj  * rootnex_valid_alloc_parms()
246312f080e7Smrj  *    Called in ddi_dma_alloc_handle path to validate its parameters.
246412f080e7Smrj  */
246512f080e7Smrj static int
246612f080e7Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize)
246712f080e7Smrj {
246812f080e7Smrj 	if ((attr->dma_attr_seg < MMU_PAGEOFFSET) ||
246912f080e7Smrj 	    (attr->dma_attr_count_max < MMU_PAGEOFFSET) ||
247012f080e7Smrj 	    (attr->dma_attr_granular > MMU_PAGESIZE) ||
247112f080e7Smrj 	    (attr->dma_attr_maxxfer < MMU_PAGESIZE)) {
247212f080e7Smrj 		return (DDI_DMA_BADATTR);
247312f080e7Smrj 	}
247412f080e7Smrj 
247512f080e7Smrj 	if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) {
247612f080e7Smrj 		return (DDI_DMA_BADATTR);
247712f080e7Smrj 	}
247812f080e7Smrj 
247912f080e7Smrj 	if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET ||
248012f080e7Smrj 	    MMU_PAGESIZE & (attr->dma_attr_granular - 1) ||
248112f080e7Smrj 	    attr->dma_attr_sgllen <= 0) {
248212f080e7Smrj 		return (DDI_DMA_BADATTR);
248312f080e7Smrj 	}
248412f080e7Smrj 
248512f080e7Smrj 	/* We should be able to DMA into every byte offset in a page */
248612f080e7Smrj 	if (maxsegmentsize < MMU_PAGESIZE) {
248712f080e7Smrj 		return (DDI_DMA_BADATTR);
248812f080e7Smrj 	}
248912f080e7Smrj 
249012f080e7Smrj 	return (DDI_SUCCESS);
249112f080e7Smrj }
249212f080e7Smrj 
249312f080e7Smrj 
249412f080e7Smrj /*
249512f080e7Smrj  * rootnex_valid_bind_parms()
249612f080e7Smrj  *    Called in ddi_dma_*_bind_handle path to validate its parameters.
249712f080e7Smrj  */
249812f080e7Smrj /* ARGSUSED */
249912f080e7Smrj static int
250012f080e7Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr)
250112f080e7Smrj {
250212f080e7Smrj #if !defined(__amd64)
250312f080e7Smrj 	/*
250412f080e7Smrj 	 * we only support up to a 2G-1 transfer size on 32-bit kernels so
250512f080e7Smrj 	 * we can track the offset for the obsoleted interfaces.
250612f080e7Smrj 	 */
250712f080e7Smrj 	if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) {
250812f080e7Smrj 		return (DDI_DMA_TOOBIG);
250912f080e7Smrj 	}
251012f080e7Smrj #endif
251112f080e7Smrj 
251212f080e7Smrj 	return (DDI_SUCCESS);
251312f080e7Smrj }
251412f080e7Smrj 
251512f080e7Smrj 
251612f080e7Smrj /*
251712f080e7Smrj  * rootnex_get_sgl()
251812f080e7Smrj  *    Called in bind fastpath to get the sgl. Most of this will be replaced
251912f080e7Smrj  *    with a call to the vm layer when vm2.0 comes around...
252012f080e7Smrj  */
252112f080e7Smrj static void
252212f080e7Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl,
252312f080e7Smrj     rootnex_sglinfo_t *sglinfo)
252412f080e7Smrj {
252512f080e7Smrj 	ddi_dma_atyp_t buftype;
2526843e1988Sjohnlev 	rootnex_addr_t raddr;
252712f080e7Smrj 	uint64_t last_page;
252812f080e7Smrj 	uint64_t offset;
252912f080e7Smrj 	uint64_t addrhi;
253012f080e7Smrj 	uint64_t addrlo;
253112f080e7Smrj 	uint64_t maxseg;
253212f080e7Smrj 	page_t **pplist;
253312f080e7Smrj 	uint64_t paddr;
253412f080e7Smrj 	uint32_t psize;
253512f080e7Smrj 	uint32_t size;
253612f080e7Smrj 	caddr_t vaddr;
253712f080e7Smrj 	uint_t pcnt;
253812f080e7Smrj 	page_t *pp;
253912f080e7Smrj 	uint_t cnt;
254012f080e7Smrj 
254112f080e7Smrj 
254212f080e7Smrj 	/* shortcuts */
254312f080e7Smrj 	pplist = dmar_object->dmao_obj.virt_obj.v_priv;
254412f080e7Smrj 	vaddr = dmar_object->dmao_obj.virt_obj.v_addr;
254512f080e7Smrj 	maxseg = sglinfo->si_max_cookie_size;
254612f080e7Smrj 	buftype = dmar_object->dmao_type;
254712f080e7Smrj 	addrhi = sglinfo->si_max_addr;
254812f080e7Smrj 	addrlo = sglinfo->si_min_addr;
254912f080e7Smrj 	size = dmar_object->dmao_size;
255012f080e7Smrj 
255112f080e7Smrj 	pcnt = 0;
255212f080e7Smrj 	cnt = 0;
255312f080e7Smrj 
255412f080e7Smrj 	/*
255512f080e7Smrj 	 * if we were passed down a linked list of pages, i.e. pointer to
255612f080e7Smrj 	 * page_t, use this to get our physical address and buf offset.
255712f080e7Smrj 	 */
255812f080e7Smrj 	if (buftype == DMA_OTYP_PAGES) {
255912f080e7Smrj 		pp = dmar_object->dmao_obj.pp_obj.pp_pp;
256012f080e7Smrj 		ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
256112f080e7Smrj 		offset =  dmar_object->dmao_obj.pp_obj.pp_offset &
256212f080e7Smrj 		    MMU_PAGEOFFSET;
2563843e1988Sjohnlev 		paddr = pfn_to_pa(pp->p_pagenum) + offset;
256412f080e7Smrj 		psize = MIN(size, (MMU_PAGESIZE - offset));
256512f080e7Smrj 		pp = pp->p_next;
256612f080e7Smrj 		sglinfo->si_asp = NULL;
256712f080e7Smrj 
256812f080e7Smrj 	/*
256912f080e7Smrj 	 * We weren't passed down a linked list of pages, but if we were passed
257012f080e7Smrj 	 * down an array of pages, use this to get our physical address and buf
257112f080e7Smrj 	 * offset.
257212f080e7Smrj 	 */
257312f080e7Smrj 	} else if (pplist != NULL) {
257412f080e7Smrj 		ASSERT((buftype == DMA_OTYP_VADDR) ||
257512f080e7Smrj 		    (buftype == DMA_OTYP_BUFVADDR));
257612f080e7Smrj 
257712f080e7Smrj 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
257812f080e7Smrj 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
257912f080e7Smrj 		if (sglinfo->si_asp == NULL) {
258012f080e7Smrj 			sglinfo->si_asp = &kas;
258112f080e7Smrj 		}
258212f080e7Smrj 
258312f080e7Smrj 		ASSERT(!PP_ISFREE(pplist[pcnt]));
2584843e1988Sjohnlev 		paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
258512f080e7Smrj 		paddr += offset;
258612f080e7Smrj 		psize = MIN(size, (MMU_PAGESIZE - offset));
258712f080e7Smrj 		pcnt++;
258812f080e7Smrj 
258912f080e7Smrj 	/*
259012f080e7Smrj 	 * All we have is a virtual address, we'll need to call into the VM
259112f080e7Smrj 	 * to get the physical address.
259212f080e7Smrj 	 */
259312f080e7Smrj 	} else {
259412f080e7Smrj 		ASSERT((buftype == DMA_OTYP_VADDR) ||
259512f080e7Smrj 		    (buftype == DMA_OTYP_BUFVADDR));
259612f080e7Smrj 
259712f080e7Smrj 		offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
259812f080e7Smrj 		sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
259912f080e7Smrj 		if (sglinfo->si_asp == NULL) {
260012f080e7Smrj 			sglinfo->si_asp = &kas;
260112f080e7Smrj 		}
260212f080e7Smrj 
2603843e1988Sjohnlev 		paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr));
260412f080e7Smrj 		paddr += offset;
260512f080e7Smrj 		psize = MIN(size, (MMU_PAGESIZE - offset));
260612f080e7Smrj 		vaddr += psize;
260712f080e7Smrj 	}
260812f080e7Smrj 
2609843e1988Sjohnlev #ifdef __xpv
2610843e1988Sjohnlev 	/*
2611843e1988Sjohnlev 	 * If we're dom0, we're using a real device so we need to load
2612843e1988Sjohnlev 	 * the cookies with MFNs instead of PFNs.
2613843e1988Sjohnlev 	 */
2614843e1988Sjohnlev 	raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
2615843e1988Sjohnlev #else
2616843e1988Sjohnlev 	raddr = paddr;
2617843e1988Sjohnlev #endif
2618843e1988Sjohnlev 
261912f080e7Smrj 	/*
262012f080e7Smrj 	 * Setup the first cookie with the physical address of the page and the
262112f080e7Smrj 	 * size of the page (which takes into account the initial offset into
262212f080e7Smrj 	 * the page.
262312f080e7Smrj 	 */
2624843e1988Sjohnlev 	sgl[cnt].dmac_laddress = raddr;
262512f080e7Smrj 	sgl[cnt].dmac_size = psize;
262612f080e7Smrj 	sgl[cnt].dmac_type = 0;
262712f080e7Smrj 
262812f080e7Smrj 	/*
262912f080e7Smrj 	 * Save away the buffer offset into the page. We'll need this later in
263012f080e7Smrj 	 * the copy buffer code to help figure out the page index within the
263112f080e7Smrj 	 * buffer and the offset into the current page.
263212f080e7Smrj 	 */
263312f080e7Smrj 	sglinfo->si_buf_offset = offset;
263412f080e7Smrj 
263512f080e7Smrj 	/*
263612f080e7Smrj 	 * If the DMA engine can't reach the physical address, increase how
263712f080e7Smrj 	 * much copy buffer we need. We always increase by pagesize so we don't
263812f080e7Smrj 	 * have to worry about converting offsets. Set a flag in the cookies
263912f080e7Smrj 	 * dmac_type to indicate that it uses the copy buffer. If this isn't the
264012f080e7Smrj 	 * last cookie, go to the next cookie (since we separate each page which
264112f080e7Smrj 	 * uses the copy buffer in case the copy buffer is not physically
264212f080e7Smrj 	 * contiguous.
264312f080e7Smrj 	 */
2644843e1988Sjohnlev 	if ((raddr < addrlo) || ((raddr + psize) > addrhi)) {
264512f080e7Smrj 		sglinfo->si_copybuf_req += MMU_PAGESIZE;
264612f080e7Smrj 		sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF;
264712f080e7Smrj 		if ((cnt + 1) < sglinfo->si_max_pages) {
264812f080e7Smrj 			cnt++;
264912f080e7Smrj 			sgl[cnt].dmac_laddress = 0;
265012f080e7Smrj 			sgl[cnt].dmac_size = 0;
265112f080e7Smrj 			sgl[cnt].dmac_type = 0;
265212f080e7Smrj 		}
265312f080e7Smrj 	}
265412f080e7Smrj 
265512f080e7Smrj 	/*
265612f080e7Smrj 	 * save this page's physical address so we can figure out if the next
265712f080e7Smrj 	 * page is physically contiguous. Keep decrementing size until we are
265812f080e7Smrj 	 * done with the buffer.
265912f080e7Smrj 	 */
2660843e1988Sjohnlev 	last_page = raddr & MMU_PAGEMASK;
266112f080e7Smrj 	size -= psize;
266212f080e7Smrj 
266312f080e7Smrj 	while (size > 0) {
266412f080e7Smrj 		/* Get the size for this page (i.e. partial or full page) */
266512f080e7Smrj 		psize = MIN(size, MMU_PAGESIZE);
266612f080e7Smrj 
266712f080e7Smrj 		if (buftype == DMA_OTYP_PAGES) {
266812f080e7Smrj 			/* get the paddr from the page_t */
266912f080e7Smrj 			ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
2670843e1988Sjohnlev 			paddr = pfn_to_pa(pp->p_pagenum);
267112f080e7Smrj 			pp = pp->p_next;
267212f080e7Smrj 		} else if (pplist != NULL) {
267312f080e7Smrj 			/* index into the array of page_t's to get the paddr */
267412f080e7Smrj 			ASSERT(!PP_ISFREE(pplist[pcnt]));
2675843e1988Sjohnlev 			paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
267612f080e7Smrj 			pcnt++;
267712f080e7Smrj 		} else {
267812f080e7Smrj 			/* call into the VM to get the paddr */
2679843e1988Sjohnlev 			paddr =  pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat,
268012f080e7Smrj 			    vaddr));
268112f080e7Smrj 			vaddr += psize;
268212f080e7Smrj 		}
268312f080e7Smrj 
2684843e1988Sjohnlev #ifdef __xpv
2685843e1988Sjohnlev 		/*
2686843e1988Sjohnlev 		 * If we're dom0, we're using a real device so we need to load
2687843e1988Sjohnlev 		 * the cookies with MFNs instead of PFNs.
2688843e1988Sjohnlev 		 */
2689843e1988Sjohnlev 		raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
2690843e1988Sjohnlev #else
2691843e1988Sjohnlev 		raddr = paddr;
2692843e1988Sjohnlev #endif
269312f080e7Smrj 		/* check to see if this page needs the copy buffer */
2694843e1988Sjohnlev 		if ((raddr < addrlo) || ((raddr + psize) > addrhi)) {
269512f080e7Smrj 			sglinfo->si_copybuf_req += MMU_PAGESIZE;
269612f080e7Smrj 
269712f080e7Smrj 			/*
269812f080e7Smrj 			 * if there is something in the current cookie, go to
269912f080e7Smrj 			 * the next one. We only want one page in a cookie which
270012f080e7Smrj 			 * uses the copybuf since the copybuf doesn't have to
270112f080e7Smrj 			 * be physically contiguous.
270212f080e7Smrj 			 */
270312f080e7Smrj 			if (sgl[cnt].dmac_size != 0) {
270412f080e7Smrj 				cnt++;
270512f080e7Smrj 			}
2706843e1988Sjohnlev 			sgl[cnt].dmac_laddress = raddr;
270712f080e7Smrj 			sgl[cnt].dmac_size = psize;
270812f080e7Smrj #if defined(__amd64)
270912f080e7Smrj 			sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF;
271012f080e7Smrj #else
271112f080e7Smrj 			/*
271212f080e7Smrj 			 * save the buf offset for 32-bit kernel. used in the
271312f080e7Smrj 			 * obsoleted interfaces.
271412f080e7Smrj 			 */
271512f080e7Smrj 			sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF |
271612f080e7Smrj 			    (dmar_object->dmao_size - size);
271712f080e7Smrj #endif
271812f080e7Smrj 			/* if this isn't the last cookie, go to the next one */
271912f080e7Smrj 			if ((cnt + 1) < sglinfo->si_max_pages) {
272012f080e7Smrj 				cnt++;
272112f080e7Smrj 				sgl[cnt].dmac_laddress = 0;
272212f080e7Smrj 				sgl[cnt].dmac_size = 0;
272312f080e7Smrj 				sgl[cnt].dmac_type = 0;
272412f080e7Smrj 			}
272512f080e7Smrj 
272612f080e7Smrj 		/*
272712f080e7Smrj 		 * this page didn't need the copy buffer, if it's not physically
272812f080e7Smrj 		 * contiguous, or it would put us over a segment boundary, or it
272912f080e7Smrj 		 * puts us over the max cookie size, or the current sgl doesn't
273012f080e7Smrj 		 * have anything in it.
273112f080e7Smrj 		 */
2732843e1988Sjohnlev 		} else if (((last_page + MMU_PAGESIZE) != raddr) ||
2733843e1988Sjohnlev 		    !(raddr & sglinfo->si_segmask) ||
273412f080e7Smrj 		    ((sgl[cnt].dmac_size + psize) > maxseg) ||
273512f080e7Smrj 		    (sgl[cnt].dmac_size == 0)) {
273612f080e7Smrj 			/*
273712f080e7Smrj 			 * if we're not already in a new cookie, go to the next
273812f080e7Smrj 			 * cookie.
273912f080e7Smrj 			 */
274012f080e7Smrj 			if (sgl[cnt].dmac_size != 0) {
274112f080e7Smrj 				cnt++;
274212f080e7Smrj 			}
274312f080e7Smrj 
274412f080e7Smrj 			/* save the cookie information */
2745843e1988Sjohnlev 			sgl[cnt].dmac_laddress = raddr;
274612f080e7Smrj 			sgl[cnt].dmac_size = psize;
274712f080e7Smrj #if defined(__amd64)
274812f080e7Smrj 			sgl[cnt].dmac_type = 0;
274912f080e7Smrj #else
275012f080e7Smrj 			/*
275112f080e7Smrj 			 * save the buf offset for 32-bit kernel. used in the
275212f080e7Smrj 			 * obsoleted interfaces.
275312f080e7Smrj 			 */
275412f080e7Smrj 			sgl[cnt].dmac_type = dmar_object->dmao_size - size;
275512f080e7Smrj #endif
275612f080e7Smrj 
275712f080e7Smrj 		/*
275812f080e7Smrj 		 * this page didn't need the copy buffer, it is physically
275912f080e7Smrj 		 * contiguous with the last page, and it's <= the max cookie
276012f080e7Smrj 		 * size.
276112f080e7Smrj 		 */
276212f080e7Smrj 		} else {
276312f080e7Smrj 			sgl[cnt].dmac_size += psize;
276412f080e7Smrj 
276512f080e7Smrj 			/*
276612f080e7Smrj 			 * if this exactly ==  the maximum cookie size, and
276712f080e7Smrj 			 * it isn't the last cookie, go to the next cookie.
276812f080e7Smrj 			 */
276912f080e7Smrj 			if (((sgl[cnt].dmac_size + psize) == maxseg) &&
277012f080e7Smrj 			    ((cnt + 1) < sglinfo->si_max_pages)) {
277112f080e7Smrj 				cnt++;
277212f080e7Smrj 				sgl[cnt].dmac_laddress = 0;
277312f080e7Smrj 				sgl[cnt].dmac_size = 0;
277412f080e7Smrj 				sgl[cnt].dmac_type = 0;
277512f080e7Smrj 			}
277612f080e7Smrj 		}
277712f080e7Smrj 
277812f080e7Smrj 		/*
277912f080e7Smrj 		 * save this page's physical address so we can figure out if the
278012f080e7Smrj 		 * next page is physically contiguous. Keep decrementing size
278112f080e7Smrj 		 * until we are done with the buffer.
278212f080e7Smrj 		 */
2783843e1988Sjohnlev 		last_page = raddr;
278412f080e7Smrj 		size -= psize;
278512f080e7Smrj 	}
278612f080e7Smrj 
278712f080e7Smrj 	/* we're done, save away how many cookies the sgl has */
278812f080e7Smrj 	if (sgl[cnt].dmac_size == 0) {
278912f080e7Smrj 		ASSERT(cnt < sglinfo->si_max_pages);
279012f080e7Smrj 		sglinfo->si_sgl_size = cnt;
279112f080e7Smrj 	} else {
279212f080e7Smrj 		sglinfo->si_sgl_size = cnt + 1;
279312f080e7Smrj 	}
279412f080e7Smrj }
279512f080e7Smrj 
279612f080e7Smrj 
279712f080e7Smrj /*
279812f080e7Smrj  * rootnex_bind_slowpath()
279912f080e7Smrj  *    Call in the bind path if the calling driver can't use the sgl without
280012f080e7Smrj  *    modifying it. We either need to use the copy buffer and/or we will end up
280112f080e7Smrj  *    with a partial bind.
280212f080e7Smrj  */
280312f080e7Smrj static int
280412f080e7Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
280512f080e7Smrj     rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag)
280612f080e7Smrj {
280712f080e7Smrj 	rootnex_sglinfo_t *sinfo;
280812f080e7Smrj 	rootnex_window_t *window;
280912f080e7Smrj 	ddi_dma_cookie_t *cookie;
281012f080e7Smrj 	size_t copybuf_used;
281112f080e7Smrj 	size_t dmac_size;
281212f080e7Smrj 	boolean_t partial;
281312f080e7Smrj 	off_t cur_offset;
281412f080e7Smrj 	page_t *cur_pp;
281512f080e7Smrj 	major_t mnum;
281612f080e7Smrj 	int e;
281712f080e7Smrj 	int i;
281812f080e7Smrj 
281912f080e7Smrj 
282012f080e7Smrj 	sinfo = &dma->dp_sglinfo;
282112f080e7Smrj 	copybuf_used = 0;
282212f080e7Smrj 	partial = B_FALSE;
282312f080e7Smrj 
282412f080e7Smrj 	/*
282512f080e7Smrj 	 * If we're using the copybuf, set the copybuf state in dma struct.
282612f080e7Smrj 	 * Needs to be first since it sets the copy buffer size.
282712f080e7Smrj 	 */
282812f080e7Smrj 	if (sinfo->si_copybuf_req != 0) {
282912f080e7Smrj 		e = rootnex_setup_copybuf(hp, dmareq, dma, attr);
283012f080e7Smrj 		if (e != DDI_SUCCESS) {
283112f080e7Smrj 			return (e);
283212f080e7Smrj 		}
283312f080e7Smrj 	} else {
283412f080e7Smrj 		dma->dp_copybuf_size = 0;
283512f080e7Smrj 	}
283612f080e7Smrj 
283712f080e7Smrj 	/*
283812f080e7Smrj 	 * Figure out if we need to do a partial mapping. If so, figure out
283912f080e7Smrj 	 * if we need to trim the buffers when we munge the sgl.
284012f080e7Smrj 	 */
284112f080e7Smrj 	if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) ||
284212f080e7Smrj 	    (dma->dp_dma.dmao_size > dma->dp_maxxfer) ||
284312f080e7Smrj 	    (attr->dma_attr_sgllen < sinfo->si_sgl_size)) {
284412f080e7Smrj 		dma->dp_partial_required = B_TRUE;
284512f080e7Smrj 		if (attr->dma_attr_granular != 1) {
284612f080e7Smrj 			dma->dp_trim_required = B_TRUE;
284712f080e7Smrj 		}
284812f080e7Smrj 	} else {
284912f080e7Smrj 		dma->dp_partial_required = B_FALSE;
285012f080e7Smrj 		dma->dp_trim_required = B_FALSE;
285112f080e7Smrj 	}
285212f080e7Smrj 
285312f080e7Smrj 	/* If we need to do a partial bind, make sure the driver supports it */
285412f080e7Smrj 	if (dma->dp_partial_required &&
285512f080e7Smrj 	    !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) {
285612f080e7Smrj 
285712f080e7Smrj 		mnum = ddi_driver_major(dma->dp_dip);
285812f080e7Smrj 		/*
285912f080e7Smrj 		 * patchable which allows us to print one warning per major
286012f080e7Smrj 		 * number.
286112f080e7Smrj 		 */
286212f080e7Smrj 		if ((rootnex_bind_warn) &&
286312f080e7Smrj 		    ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) {
286412f080e7Smrj 			rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING;
286512f080e7Smrj 			cmn_err(CE_WARN, "!%s: coding error detected, the "
286612f080e7Smrj 			    "driver is using ddi_dma_attr(9S) incorrectly. "
286712f080e7Smrj 			    "There is a small risk of data corruption in "
286812f080e7Smrj 			    "particular with large I/Os. The driver should be "
286912f080e7Smrj 			    "replaced with a corrected version for proper "
287012f080e7Smrj 			    "system operation. To disable this warning, add "
287112f080e7Smrj 			    "'set rootnex:rootnex_bind_warn=0' to "
287212f080e7Smrj 			    "/etc/system(4).", ddi_driver_name(dma->dp_dip));
287312f080e7Smrj 		}
287412f080e7Smrj 		return (DDI_DMA_TOOBIG);
287512f080e7Smrj 	}
287612f080e7Smrj 
287712f080e7Smrj 	/*
287812f080e7Smrj 	 * we might need multiple windows, setup state to handle them. In this
287912f080e7Smrj 	 * code path, we will have at least one window.
288012f080e7Smrj 	 */
288112f080e7Smrj 	e = rootnex_setup_windows(hp, dma, attr, kmflag);
288212f080e7Smrj 	if (e != DDI_SUCCESS) {
288312f080e7Smrj 		rootnex_teardown_copybuf(dma);
288412f080e7Smrj 		return (e);
288512f080e7Smrj 	}
288612f080e7Smrj 
288712f080e7Smrj 	window = &dma->dp_window[0];
288812f080e7Smrj 	cookie = &dma->dp_cookies[0];
288912f080e7Smrj 	cur_offset = 0;
289012f080e7Smrj 	rootnex_init_win(hp, dma, window, cookie, cur_offset);
289112f080e7Smrj 	if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) {
289212f080e7Smrj 		cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp;
289312f080e7Smrj 	}
289412f080e7Smrj 
289512f080e7Smrj 	/* loop though all the cookies we got back from get_sgl() */
289612f080e7Smrj 	for (i = 0; i < sinfo->si_sgl_size; i++) {
289712f080e7Smrj 		/*
289812f080e7Smrj 		 * If we're using the copy buffer, check this cookie and setup
289912f080e7Smrj 		 * its associated copy buffer state. If this cookie uses the
290012f080e7Smrj 		 * copy buffer, make sure we sync this window during dma_sync.
290112f080e7Smrj 		 */
290212f080e7Smrj 		if (dma->dp_copybuf_size > 0) {
290312f080e7Smrj 			rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie,
290412f080e7Smrj 			    cur_offset, &copybuf_used, &cur_pp);
290512f080e7Smrj 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
290612f080e7Smrj 				window->wd_dosync = B_TRUE;
290712f080e7Smrj 			}
290812f080e7Smrj 		}
290912f080e7Smrj 
291012f080e7Smrj 		/*
291112f080e7Smrj 		 * save away the cookie size, since it could be modified in
291212f080e7Smrj 		 * the windowing code.
291312f080e7Smrj 		 */
291412f080e7Smrj 		dmac_size = cookie->dmac_size;
291512f080e7Smrj 
291612f080e7Smrj 		/* if we went over max copybuf size */
291712f080e7Smrj 		if (dma->dp_copybuf_size &&
291812f080e7Smrj 		    (copybuf_used > dma->dp_copybuf_size)) {
291912f080e7Smrj 			partial = B_TRUE;
292012f080e7Smrj 			e = rootnex_copybuf_window_boundary(hp, dma, &window,
292112f080e7Smrj 			    cookie, cur_offset, &copybuf_used);
292212f080e7Smrj 			if (e != DDI_SUCCESS) {
292312f080e7Smrj 				rootnex_teardown_copybuf(dma);
292412f080e7Smrj 				rootnex_teardown_windows(dma);
292512f080e7Smrj 				return (e);
292612f080e7Smrj 			}
292712f080e7Smrj 
292812f080e7Smrj 			/*
292912f080e7Smrj 			 * if the coookie uses the copy buffer, make sure the
293012f080e7Smrj 			 * new window we just moved to is set to sync.
293112f080e7Smrj 			 */
293212f080e7Smrj 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
293312f080e7Smrj 				window->wd_dosync = B_TRUE;
293412f080e7Smrj 			}
293512f080e7Smrj 			DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *,
293612f080e7Smrj 			    dma->dp_dip);
293712f080e7Smrj 
293812f080e7Smrj 		/* if the cookie cnt == max sgllen, move to the next window */
293912f080e7Smrj 		} else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) {
294012f080e7Smrj 			partial = B_TRUE;
294112f080e7Smrj 			ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen);
294212f080e7Smrj 			e = rootnex_sgllen_window_boundary(hp, dma, &window,
294312f080e7Smrj 			    cookie, attr, cur_offset);
294412f080e7Smrj 			if (e != DDI_SUCCESS) {
294512f080e7Smrj 				rootnex_teardown_copybuf(dma);
294612f080e7Smrj 				rootnex_teardown_windows(dma);
294712f080e7Smrj 				return (e);
294812f080e7Smrj 			}
294912f080e7Smrj 
295012f080e7Smrj 			/*
295112f080e7Smrj 			 * if the coookie uses the copy buffer, make sure the
295212f080e7Smrj 			 * new window we just moved to is set to sync.
295312f080e7Smrj 			 */
295412f080e7Smrj 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
295512f080e7Smrj 				window->wd_dosync = B_TRUE;
295612f080e7Smrj 			}
295712f080e7Smrj 			DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *,
295812f080e7Smrj 			    dma->dp_dip);
295912f080e7Smrj 
296012f080e7Smrj 		/* else if we will be over maxxfer */
296112f080e7Smrj 		} else if ((window->wd_size + dmac_size) >
296212f080e7Smrj 		    dma->dp_maxxfer) {
296312f080e7Smrj 			partial = B_TRUE;
296412f080e7Smrj 			e = rootnex_maxxfer_window_boundary(hp, dma, &window,
296512f080e7Smrj 			    cookie);
296612f080e7Smrj 			if (e != DDI_SUCCESS) {
296712f080e7Smrj 				rootnex_teardown_copybuf(dma);
296812f080e7Smrj 				rootnex_teardown_windows(dma);
296912f080e7Smrj 				return (e);
297012f080e7Smrj 			}
297112f080e7Smrj 
297212f080e7Smrj 			/*
297312f080e7Smrj 			 * if the coookie uses the copy buffer, make sure the
297412f080e7Smrj 			 * new window we just moved to is set to sync.
297512f080e7Smrj 			 */
297612f080e7Smrj 			if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
297712f080e7Smrj 				window->wd_dosync = B_TRUE;
297812f080e7Smrj 			}
297912f080e7Smrj 			DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *,
298012f080e7Smrj 			    dma->dp_dip);
298112f080e7Smrj 
298212f080e7Smrj 		/* else this cookie fits in the current window */
298312f080e7Smrj 		} else {
298412f080e7Smrj 			window->wd_cookie_cnt++;
298512f080e7Smrj 			window->wd_size += dmac_size;
298612f080e7Smrj 		}
298712f080e7Smrj 
298812f080e7Smrj 		/* track our offset into the buffer, go to the next cookie */
298912f080e7Smrj 		ASSERT(dmac_size <= dma->dp_dma.dmao_size);
299012f080e7Smrj 		ASSERT(cookie->dmac_size <= dmac_size);
299112f080e7Smrj 		cur_offset += dmac_size;
299212f080e7Smrj 		cookie++;
299312f080e7Smrj 	}
299412f080e7Smrj 
299512f080e7Smrj 	/* if we ended up with a zero sized window in the end, clean it up */
299612f080e7Smrj 	if (window->wd_size == 0) {
299712f080e7Smrj 		hp->dmai_nwin--;
299812f080e7Smrj 		window--;
299912f080e7Smrj 	}
300012f080e7Smrj 
300112f080e7Smrj 	ASSERT(window->wd_trim.tr_trim_last == B_FALSE);
300212f080e7Smrj 
300312f080e7Smrj 	if (!partial) {
300412f080e7Smrj 		return (DDI_DMA_MAPPED);
300512f080e7Smrj 	}
300612f080e7Smrj 
300712f080e7Smrj 	ASSERT(dma->dp_partial_required);
300812f080e7Smrj 	return (DDI_DMA_PARTIAL_MAP);
300912f080e7Smrj }
301012f080e7Smrj 
301112f080e7Smrj 
301212f080e7Smrj /*
301312f080e7Smrj  * rootnex_setup_copybuf()
301412f080e7Smrj  *    Called in bind slowpath. Figures out if we're going to use the copy
301512f080e7Smrj  *    buffer, and if we do, sets up the basic state to handle it.
301612f080e7Smrj  */
301712f080e7Smrj static int
301812f080e7Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
301912f080e7Smrj     rootnex_dma_t *dma, ddi_dma_attr_t *attr)
302012f080e7Smrj {
302112f080e7Smrj 	rootnex_sglinfo_t *sinfo;
302212f080e7Smrj 	ddi_dma_attr_t lattr;
302312f080e7Smrj 	size_t max_copybuf;
302412f080e7Smrj 	int cansleep;
302512f080e7Smrj 	int e;
302612f080e7Smrj #if !defined(__amd64)
302712f080e7Smrj 	int vmflag;
302812f080e7Smrj #endif
302912f080e7Smrj 
303012f080e7Smrj 
303112f080e7Smrj 	sinfo = &dma->dp_sglinfo;
303212f080e7Smrj 
303336945f79Smrj 	/* read this first so it's consistent through the routine  */
303436945f79Smrj 	max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK;
303512f080e7Smrj 
303612f080e7Smrj 	/* We need to call into the rootnex on ddi_dma_sync() */
303712f080e7Smrj 	hp->dmai_rflags &= ~DMP_NOSYNC;
303812f080e7Smrj 
303912f080e7Smrj 	/* make sure the copybuf size <= the max size */
304012f080e7Smrj 	dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf);
304112f080e7Smrj 	ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0);
304212f080e7Smrj 
304312f080e7Smrj #if !defined(__amd64)
304412f080e7Smrj 	/*
304512f080e7Smrj 	 * if we don't have kva space to copy to/from, allocate the KVA space
304612f080e7Smrj 	 * now. We only do this for the 32-bit kernel. We use seg kpm space for
304712f080e7Smrj 	 * the 64-bit kernel.
304812f080e7Smrj 	 */
304912f080e7Smrj 	if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) ||
305012f080e7Smrj 	    (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) {
305112f080e7Smrj 
305212f080e7Smrj 		/* convert the sleep flags */
305312f080e7Smrj 		if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
305412f080e7Smrj 			vmflag = VM_SLEEP;
305512f080e7Smrj 		} else {
305612f080e7Smrj 			vmflag = VM_NOSLEEP;
305712f080e7Smrj 		}
305812f080e7Smrj 
305912f080e7Smrj 		/* allocate Kernel VA space that we can bcopy to/from */
306012f080e7Smrj 		dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size,
306112f080e7Smrj 		    vmflag);
306212f080e7Smrj 		if (dma->dp_kva == NULL) {
306312f080e7Smrj 			return (DDI_DMA_NORESOURCES);
306412f080e7Smrj 		}
306512f080e7Smrj 	}
306612f080e7Smrj #endif
306712f080e7Smrj 
306812f080e7Smrj 	/* convert the sleep flags */
306912f080e7Smrj 	if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
307012f080e7Smrj 		cansleep = 1;
307112f080e7Smrj 	} else {
307212f080e7Smrj 		cansleep = 0;
307312f080e7Smrj 	}
307412f080e7Smrj 
307512f080e7Smrj 	/*
3076d21b39ddSmrj 	 * Allocate the actual copy buffer. This needs to fit within the DMA
3077d21b39ddSmrj 	 * engine limits, so we can't use kmem_alloc... We don't need
3078d21b39ddSmrj 	 * contiguous memory (sgllen) since we will be forcing windows on
3079d21b39ddSmrj 	 * sgllen anyway.
308012f080e7Smrj 	 */
308112f080e7Smrj 	lattr = *attr;
308212f080e7Smrj 	lattr.dma_attr_align = MMU_PAGESIZE;
3083d21b39ddSmrj 	/*
3084d21b39ddSmrj 	 * this should be < 0 to indicate no limit, but due to a bug in
3085d21b39ddSmrj 	 * the rootnex, we'll set it to the maximum positive int.
3086d21b39ddSmrj 	 */
3087d21b39ddSmrj 	lattr.dma_attr_sgllen = 0x7fffffff;
308812f080e7Smrj 	e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep,
308912f080e7Smrj 	    0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL);
309012f080e7Smrj 	if (e != DDI_SUCCESS) {
309112f080e7Smrj #if !defined(__amd64)
309212f080e7Smrj 		if (dma->dp_kva != NULL) {
309312f080e7Smrj 			vmem_free(heap_arena, dma->dp_kva,
309412f080e7Smrj 			    dma->dp_copybuf_size);
309512f080e7Smrj 		}
309612f080e7Smrj #endif
309712f080e7Smrj 		return (DDI_DMA_NORESOURCES);
309812f080e7Smrj 	}
309912f080e7Smrj 
310012f080e7Smrj 	DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip,
310112f080e7Smrj 	    size_t, dma->dp_copybuf_size);
310212f080e7Smrj 
310312f080e7Smrj 	return (DDI_SUCCESS);
310412f080e7Smrj }
310512f080e7Smrj 
310612f080e7Smrj 
310712f080e7Smrj /*
310812f080e7Smrj  * rootnex_setup_windows()
310912f080e7Smrj  *    Called in bind slowpath to setup the window state. We always have windows
311012f080e7Smrj  *    in the slowpath. Even if the window count = 1.
311112f080e7Smrj  */
311212f080e7Smrj static int
311312f080e7Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
311412f080e7Smrj     ddi_dma_attr_t *attr, int kmflag)
311512f080e7Smrj {
311612f080e7Smrj 	rootnex_window_t *windowp;
311712f080e7Smrj 	rootnex_sglinfo_t *sinfo;
311812f080e7Smrj 	size_t copy_state_size;
311912f080e7Smrj 	size_t win_state_size;
312012f080e7Smrj 	size_t state_available;
312112f080e7Smrj 	size_t space_needed;
312212f080e7Smrj 	uint_t copybuf_win;
312312f080e7Smrj 	uint_t maxxfer_win;
312412f080e7Smrj 	size_t space_used;
312512f080e7Smrj 	uint_t sglwin;
312612f080e7Smrj 
312712f080e7Smrj 
312812f080e7Smrj 	sinfo = &dma->dp_sglinfo;
312912f080e7Smrj 
313012f080e7Smrj 	dma->dp_current_win = 0;
313112f080e7Smrj 	hp->dmai_nwin = 0;
313212f080e7Smrj 
313312f080e7Smrj 	/* If we don't need to do a partial, we only have one window */
313412f080e7Smrj 	if (!dma->dp_partial_required) {
313512f080e7Smrj 		dma->dp_max_win = 1;
313612f080e7Smrj 
313712f080e7Smrj 	/*
313812f080e7Smrj 	 * we need multiple windows, need to figure out the worse case number
313912f080e7Smrj 	 * of windows.
314012f080e7Smrj 	 */
31417c478bd9Sstevel@tonic-gate 	} else {
31427c478bd9Sstevel@tonic-gate 		/*
314312f080e7Smrj 		 * if we need windows because we need more copy buffer that
314412f080e7Smrj 		 * we allow, the worse case number of windows we could need
314512f080e7Smrj 		 * here would be (copybuf space required / copybuf space that
314612f080e7Smrj 		 * we have) plus one for remainder, and plus 2 to handle the
314712f080e7Smrj 		 * extra pages on the trim for the first and last pages of the
314812f080e7Smrj 		 * buffer (a page is the minimum window size so under the right
314912f080e7Smrj 		 * attr settings, you could have a window for each page).
315012f080e7Smrj 		 * The last page will only be hit here if the size is not a
315112f080e7Smrj 		 * multiple of the granularity (which theoretically shouldn't
315212f080e7Smrj 		 * be the case but never has been enforced, so we could have
315312f080e7Smrj 		 * broken things without it).
31547c478bd9Sstevel@tonic-gate 		 */
315512f080e7Smrj 		if (sinfo->si_copybuf_req > dma->dp_copybuf_size) {
315612f080e7Smrj 			ASSERT(dma->dp_copybuf_size > 0);
315712f080e7Smrj 			copybuf_win = (sinfo->si_copybuf_req /
315812f080e7Smrj 			    dma->dp_copybuf_size) + 1 + 2;
31597c478bd9Sstevel@tonic-gate 		} else {
316012f080e7Smrj 			copybuf_win = 0;
31617c478bd9Sstevel@tonic-gate 		}
316212f080e7Smrj 
316312f080e7Smrj 		/*
316412f080e7Smrj 		 * if we need windows because we have more cookies than the H/W
316512f080e7Smrj 		 * can handle, the number of windows we would need here would
316612f080e7Smrj 		 * be (cookie count / cookies count H/W supports) plus one for
316712f080e7Smrj 		 * remainder, and plus 2 to handle the extra pages on the trim
316812f080e7Smrj 		 * (see above comment about trim)
316912f080e7Smrj 		 */
317012f080e7Smrj 		if (attr->dma_attr_sgllen < sinfo->si_sgl_size) {
317112f080e7Smrj 			sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen)
317212f080e7Smrj 			    + 1) + 2;
31737c478bd9Sstevel@tonic-gate 		} else {
317412f080e7Smrj 			sglwin = 0;
31757c478bd9Sstevel@tonic-gate 		}
317612f080e7Smrj 
317712f080e7Smrj 		/*
317812f080e7Smrj 		 * if we need windows because we're binding more memory than the
317912f080e7Smrj 		 * H/W can transfer at once, the number of windows we would need
318012f080e7Smrj 		 * here would be (xfer count / max xfer H/W supports) plus one
318112f080e7Smrj 		 * for remainder, and plus 2 to handle the extra pages on the
318212f080e7Smrj 		 * trim (see above comment about trim)
318312f080e7Smrj 		 */
318412f080e7Smrj 		if (dma->dp_dma.dmao_size > dma->dp_maxxfer) {
318512f080e7Smrj 			maxxfer_win = (dma->dp_dma.dmao_size /
318612f080e7Smrj 			    dma->dp_maxxfer) + 1 + 2;
318712f080e7Smrj 		} else {
318812f080e7Smrj 			maxxfer_win = 0;
31897c478bd9Sstevel@tonic-gate 		}
319012f080e7Smrj 		dma->dp_max_win =  copybuf_win + sglwin + maxxfer_win;
319112f080e7Smrj 		ASSERT(dma->dp_max_win > 0);
319212f080e7Smrj 	}
319312f080e7Smrj 	win_state_size = dma->dp_max_win * sizeof (rootnex_window_t);
319412f080e7Smrj 
319512f080e7Smrj 	/*
319612f080e7Smrj 	 * Get space for window and potential copy buffer state. Before we
319712f080e7Smrj 	 * go and allocate memory, see if we can get away with using what's
319812f080e7Smrj 	 * left in the pre-allocted state or the dynamically allocated sgl.
319912f080e7Smrj 	 */
320012f080e7Smrj 	space_used = (uintptr_t)(sinfo->si_sgl_size *
320112f080e7Smrj 	    sizeof (ddi_dma_cookie_t));
320212f080e7Smrj 
320312f080e7Smrj 	/* if we dynamically allocated space for the cookies */
320412f080e7Smrj 	if (dma->dp_need_to_free_cookie) {
320512f080e7Smrj 		/* if we have more space in the pre-allocted buffer, use it */
320612f080e7Smrj 		ASSERT(space_used <= dma->dp_cookie_size);
320712f080e7Smrj 		if ((dma->dp_cookie_size - space_used) <=
320812f080e7Smrj 		    rootnex_state->r_prealloc_size) {
320912f080e7Smrj 			state_available = rootnex_state->r_prealloc_size;
321012f080e7Smrj 			windowp = (rootnex_window_t *)dma->dp_prealloc_buffer;
321112f080e7Smrj 
321212f080e7Smrj 		/*
321312f080e7Smrj 		 * else, we have more free space in the dynamically allocated
321412f080e7Smrj 		 * buffer, i.e. the buffer wasn't worse case fragmented so we
321512f080e7Smrj 		 * didn't need a lot of cookies.
321612f080e7Smrj 		 */
321712f080e7Smrj 		} else {
321812f080e7Smrj 			state_available = dma->dp_cookie_size - space_used;
321912f080e7Smrj 			windowp = (rootnex_window_t *)
322012f080e7Smrj 			    &dma->dp_cookies[sinfo->si_sgl_size];
322112f080e7Smrj 		}
322212f080e7Smrj 
322312f080e7Smrj 	/* we used the pre-alloced buffer */
322412f080e7Smrj 	} else {
322512f080e7Smrj 		ASSERT(space_used <= rootnex_state->r_prealloc_size);
322612f080e7Smrj 		state_available = rootnex_state->r_prealloc_size - space_used;
322712f080e7Smrj 		windowp = (rootnex_window_t *)
322812f080e7Smrj 		    &dma->dp_cookies[sinfo->si_sgl_size];
322912f080e7Smrj 	}
323012f080e7Smrj 
323112f080e7Smrj 	/*
323212f080e7Smrj 	 * figure out how much state we need to track the copy buffer. Add an
323312f080e7Smrj 	 * addition 8 bytes for pointer alignemnt later.
323412f080e7Smrj 	 */
323512f080e7Smrj 	if (dma->dp_copybuf_size > 0) {
323612f080e7Smrj 		copy_state_size = sinfo->si_max_pages *
323712f080e7Smrj 		    sizeof (rootnex_pgmap_t);
323812f080e7Smrj 	} else {
323912f080e7Smrj 		copy_state_size = 0;
324012f080e7Smrj 	}
324112f080e7Smrj 	/* add an additional 8 bytes for pointer alignment */
324212f080e7Smrj 	space_needed = win_state_size + copy_state_size + 0x8;
324312f080e7Smrj 
324412f080e7Smrj 	/* if we have enough space already, use it */
324512f080e7Smrj 	if (state_available >= space_needed) {
324612f080e7Smrj 		dma->dp_window = windowp;
324712f080e7Smrj 		dma->dp_need_to_free_window = B_FALSE;
324812f080e7Smrj 
324912f080e7Smrj 	/* not enough space, need to allocate more. */
325012f080e7Smrj 	} else {
325112f080e7Smrj 		dma->dp_window = kmem_alloc(space_needed, kmflag);
325212f080e7Smrj 		if (dma->dp_window == NULL) {
325312f080e7Smrj 			return (DDI_DMA_NORESOURCES);
325412f080e7Smrj 		}
325512f080e7Smrj 		dma->dp_need_to_free_window = B_TRUE;
325612f080e7Smrj 		dma->dp_window_size = space_needed;
325712f080e7Smrj 		DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *,
325812f080e7Smrj 		    dma->dp_dip, size_t, space_needed);
325912f080e7Smrj 	}
326012f080e7Smrj 
326112f080e7Smrj 	/*
326212f080e7Smrj 	 * we allocate copy buffer state and window state at the same time.
326312f080e7Smrj 	 * setup our copy buffer state pointers. Make sure it's aligned.
326412f080e7Smrj 	 */
326512f080e7Smrj 	if (dma->dp_copybuf_size > 0) {
326612f080e7Smrj 		dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t)
326712f080e7Smrj 		    &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7);
326812f080e7Smrj 
326912f080e7Smrj #if !defined(__amd64)
327012f080e7Smrj 		/*
327112f080e7Smrj 		 * make sure all pm_mapped, pm_vaddr, and pm_pp are set to
327212f080e7Smrj 		 * false/NULL. Should be quicker to bzero vs loop and set.
327312f080e7Smrj 		 */
327412f080e7Smrj 		bzero(dma->dp_pgmap, copy_state_size);
327512f080e7Smrj #endif
327612f080e7Smrj 	} else {
327712f080e7Smrj 		dma->dp_pgmap = NULL;
327812f080e7Smrj 	}
327912f080e7Smrj 
328012f080e7Smrj 	return (DDI_SUCCESS);
328112f080e7Smrj }
328212f080e7Smrj 
328312f080e7Smrj 
328412f080e7Smrj /*
328512f080e7Smrj  * rootnex_teardown_copybuf()
328612f080e7Smrj  *    cleans up after rootnex_setup_copybuf()
328712f080e7Smrj  */
328812f080e7Smrj static void
328912f080e7Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma)
329012f080e7Smrj {
329112f080e7Smrj #if !defined(__amd64)
329212f080e7Smrj 	int i;
329312f080e7Smrj 
329412f080e7Smrj 	/*
329512f080e7Smrj 	 * if we allocated kernel heap VMEM space, go through all the pages and
329612f080e7Smrj 	 * map out any of the ones that we're mapped into the kernel heap VMEM
329712f080e7Smrj 	 * arena. Then free the VMEM space.
329812f080e7Smrj 	 */
329912f080e7Smrj 	if (dma->dp_kva != NULL) {
330012f080e7Smrj 		for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) {
330112f080e7Smrj 			if (dma->dp_pgmap[i].pm_mapped) {
330212f080e7Smrj 				hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr,
330312f080e7Smrj 				    MMU_PAGESIZE, HAT_UNLOAD);
330412f080e7Smrj 				dma->dp_pgmap[i].pm_mapped = B_FALSE;
330512f080e7Smrj 			}
330612f080e7Smrj 		}
330712f080e7Smrj 
330812f080e7Smrj 		vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size);
330912f080e7Smrj 	}
331012f080e7Smrj 
331112f080e7Smrj #endif
331212f080e7Smrj 
331312f080e7Smrj 	/* if we allocated a copy buffer, free it */
331412f080e7Smrj 	if (dma->dp_cbaddr != NULL) {
33157b93957cSeota 		i_ddi_mem_free(dma->dp_cbaddr, NULL);
331612f080e7Smrj 	}
331712f080e7Smrj }
331812f080e7Smrj 
331912f080e7Smrj 
332012f080e7Smrj /*
332112f080e7Smrj  * rootnex_teardown_windows()
332212f080e7Smrj  *    cleans up after rootnex_setup_windows()
332312f080e7Smrj  */
332412f080e7Smrj static void
332512f080e7Smrj rootnex_teardown_windows(rootnex_dma_t *dma)
332612f080e7Smrj {
332712f080e7Smrj 	/*
332812f080e7Smrj 	 * if we had to allocate window state on the last bind (because we
332912f080e7Smrj 	 * didn't have enough pre-allocated space in the handle), free it.
333012f080e7Smrj 	 */
333112f080e7Smrj 	if (dma->dp_need_to_free_window) {
333212f080e7Smrj 		kmem_free(dma->dp_window, dma->dp_window_size);
333312f080e7Smrj 	}
333412f080e7Smrj }
333512f080e7Smrj 
333612f080e7Smrj 
333712f080e7Smrj /*
333812f080e7Smrj  * rootnex_init_win()
333912f080e7Smrj  *    Called in bind slow path during creation of a new window. Initializes
334012f080e7Smrj  *    window state to default values.
334112f080e7Smrj  */
334212f080e7Smrj /*ARGSUSED*/
334312f080e7Smrj static void
334412f080e7Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
334512f080e7Smrj     rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset)
334612f080e7Smrj {
334712f080e7Smrj 	hp->dmai_nwin++;
334812f080e7Smrj 	window->wd_dosync = B_FALSE;
334912f080e7Smrj 	window->wd_offset = cur_offset;
335012f080e7Smrj 	window->wd_size = 0;
335112f080e7Smrj 	window->wd_first_cookie = cookie;
335212f080e7Smrj 	window->wd_cookie_cnt = 0;
335312f080e7Smrj 	window->wd_trim.tr_trim_first = B_FALSE;
335412f080e7Smrj 	window->wd_trim.tr_trim_last = B_FALSE;
335512f080e7Smrj 	window->wd_trim.tr_first_copybuf_win = B_FALSE;
335612f080e7Smrj 	window->wd_trim.tr_last_copybuf_win = B_FALSE;
335712f080e7Smrj #if !defined(__amd64)
335812f080e7Smrj 	window->wd_remap_copybuf = dma->dp_cb_remaping;
335912f080e7Smrj #endif
336012f080e7Smrj }
336112f080e7Smrj 
336212f080e7Smrj 
336312f080e7Smrj /*
336412f080e7Smrj  * rootnex_setup_cookie()
336512f080e7Smrj  *    Called in the bind slow path when the sgl uses the copy buffer. If any of
336612f080e7Smrj  *    the sgl uses the copy buffer, we need to go through each cookie, figure
336712f080e7Smrj  *    out if it uses the copy buffer, and if it does, save away everything we'll
336812f080e7Smrj  *    need during sync.
336912f080e7Smrj  */
337012f080e7Smrj static void
337112f080e7Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma,
337212f080e7Smrj     ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used,
337312f080e7Smrj     page_t **cur_pp)
337412f080e7Smrj {
337512f080e7Smrj 	boolean_t copybuf_sz_power_2;
337612f080e7Smrj 	rootnex_sglinfo_t *sinfo;
3377843e1988Sjohnlev 	paddr_t paddr;
337812f080e7Smrj 	uint_t pidx;
337912f080e7Smrj 	uint_t pcnt;
338012f080e7Smrj 	off_t poff;
338112f080e7Smrj #if defined(__amd64)
338212f080e7Smrj 	pfn_t pfn;
338312f080e7Smrj #else
338412f080e7Smrj 	page_t **pplist;
338512f080e7Smrj #endif
338612f080e7Smrj 
338712f080e7Smrj 	sinfo = &dma->dp_sglinfo;
338812f080e7Smrj 
338912f080e7Smrj 	/*
339012f080e7Smrj 	 * Calculate the page index relative to the start of the buffer. The
339112f080e7Smrj 	 * index to the current page for our buffer is the offset into the
339212f080e7Smrj 	 * first page of the buffer plus our current offset into the buffer
339312f080e7Smrj 	 * itself, shifted of course...
339412f080e7Smrj 	 */
339512f080e7Smrj 	pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT;
339612f080e7Smrj 	ASSERT(pidx < sinfo->si_max_pages);
339712f080e7Smrj 
339812f080e7Smrj 	/* if this cookie uses the copy buffer */
339912f080e7Smrj 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
340012f080e7Smrj 		/*
340112f080e7Smrj 		 * NOTE: we know that since this cookie uses the copy buffer, it
340212f080e7Smrj 		 * is <= MMU_PAGESIZE.
340312f080e7Smrj 		 */
340412f080e7Smrj 
340512f080e7Smrj 		/*
340612f080e7Smrj 		 * get the offset into the page. For the 64-bit kernel, get the
340712f080e7Smrj 		 * pfn which we'll use with seg kpm.
340812f080e7Smrj 		 */
3409843e1988Sjohnlev 		poff = cookie->dmac_laddress & MMU_PAGEOFFSET;
341012f080e7Smrj #if defined(__amd64)
3411843e1988Sjohnlev 		/* mfn_to_pfn() is a NOP on i86pc */
3412843e1988Sjohnlev 		pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT);
3413843e1988Sjohnlev #endif /* __amd64 */
341412f080e7Smrj 
341512f080e7Smrj 		/* figure out if the copybuf size is a power of 2 */
341612f080e7Smrj 		if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) {
341712f080e7Smrj 			copybuf_sz_power_2 = B_FALSE;
341812f080e7Smrj 		} else {
341912f080e7Smrj 			copybuf_sz_power_2 = B_TRUE;
342012f080e7Smrj 		}
342112f080e7Smrj 
342212f080e7Smrj 		/* This page uses the copy buffer */
342312f080e7Smrj 		dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE;
342412f080e7Smrj 
342512f080e7Smrj 		/*
342612f080e7Smrj 		 * save the copy buffer KVA that we'll use with this page.
342712f080e7Smrj 		 * if we still fit within the copybuf, it's a simple add.
342812f080e7Smrj 		 * otherwise, we need to wrap over using & or % accordingly.
342912f080e7Smrj 		 */
343012f080e7Smrj 		if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) {
343112f080e7Smrj 			dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr +
343212f080e7Smrj 			    *copybuf_used;
343312f080e7Smrj 		} else {
343412f080e7Smrj 			if (copybuf_sz_power_2) {
343512f080e7Smrj 				dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)(
343612f080e7Smrj 				    (uintptr_t)dma->dp_cbaddr +
343712f080e7Smrj 				    (*copybuf_used &
343812f080e7Smrj 				    (dma->dp_copybuf_size - 1)));
343912f080e7Smrj 			} else {
344012f080e7Smrj 				dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)(
344112f080e7Smrj 				    (uintptr_t)dma->dp_cbaddr +
344212f080e7Smrj 				    (*copybuf_used % dma->dp_copybuf_size));
344312f080e7Smrj 			}
344412f080e7Smrj 		}
344512f080e7Smrj 
344612f080e7Smrj 		/*
344712f080e7Smrj 		 * over write the cookie physical address with the address of
344812f080e7Smrj 		 * the physical address of the copy buffer page that we will
344912f080e7Smrj 		 * use.
345012f080e7Smrj 		 */
3451843e1988Sjohnlev 		paddr = pfn_to_pa(hat_getpfnum(kas.a_hat,
345212f080e7Smrj 		    dma->dp_pgmap[pidx].pm_cbaddr)) + poff;
345312f080e7Smrj 
3454843e1988Sjohnlev #ifdef __xpv
3455843e1988Sjohnlev 		/*
3456843e1988Sjohnlev 		 * If we're dom0, we're using a real device so we need to load
3457843e1988Sjohnlev 		 * the cookies with MAs instead of PAs.
3458843e1988Sjohnlev 		 */
3459843e1988Sjohnlev 		cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
3460843e1988Sjohnlev #else
3461843e1988Sjohnlev 		cookie->dmac_laddress = paddr;
3462843e1988Sjohnlev #endif
3463843e1988Sjohnlev 
346412f080e7Smrj 		/* if we have a kernel VA, it's easy, just save that address */
346512f080e7Smrj 		if ((dmar_object->dmao_type != DMA_OTYP_PAGES) &&
346612f080e7Smrj 		    (sinfo->si_asp == &kas)) {
346712f080e7Smrj 			/*
346812f080e7Smrj 			 * save away the page aligned virtual address of the
346912f080e7Smrj 			 * driver buffer. Offsets are handled in the sync code.
347012f080e7Smrj 			 */
347112f080e7Smrj 			dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t)
347212f080e7Smrj 			    dmar_object->dmao_obj.virt_obj.v_addr + cur_offset)
347312f080e7Smrj 			    & MMU_PAGEMASK);
347412f080e7Smrj #if !defined(__amd64)
347512f080e7Smrj 			/*
347612f080e7Smrj 			 * we didn't need to, and will never need to map this
347712f080e7Smrj 			 * page.
347812f080e7Smrj 			 */
347912f080e7Smrj 			dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
348012f080e7Smrj #endif
348112f080e7Smrj 
348212f080e7Smrj 		/* we don't have a kernel VA. We need one for the bcopy. */
348312f080e7Smrj 		} else {
348412f080e7Smrj #if defined(__amd64)
348512f080e7Smrj 			/*
348612f080e7Smrj 			 * for the 64-bit kernel, it's easy. We use seg kpm to
348712f080e7Smrj 			 * get a Kernel VA for the corresponding pfn.
348812f080e7Smrj 			 */
348912f080e7Smrj 			dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn);
349012f080e7Smrj #else
349112f080e7Smrj 			/*
349212f080e7Smrj 			 * for the 32-bit kernel, this is a pain. First we'll
349312f080e7Smrj 			 * save away the page_t or user VA for this page. This
349412f080e7Smrj 			 * is needed in rootnex_dma_win() when we switch to a
349512f080e7Smrj 			 * new window which requires us to re-map the copy
349612f080e7Smrj 			 * buffer.
349712f080e7Smrj 			 */
349812f080e7Smrj 			pplist = dmar_object->dmao_obj.virt_obj.v_priv;
349912f080e7Smrj 			if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
350012f080e7Smrj 				dma->dp_pgmap[pidx].pm_pp = *cur_pp;
350112f080e7Smrj 				dma->dp_pgmap[pidx].pm_vaddr = NULL;
350212f080e7Smrj 			} else if (pplist != NULL) {
350312f080e7Smrj 				dma->dp_pgmap[pidx].pm_pp = pplist[pidx];
350412f080e7Smrj 				dma->dp_pgmap[pidx].pm_vaddr = NULL;
350512f080e7Smrj 			} else {
350612f080e7Smrj 				dma->dp_pgmap[pidx].pm_pp = NULL;
350712f080e7Smrj 				dma->dp_pgmap[pidx].pm_vaddr = (caddr_t)
350812f080e7Smrj 				    (((uintptr_t)
350912f080e7Smrj 				    dmar_object->dmao_obj.virt_obj.v_addr +
351012f080e7Smrj 				    cur_offset) & MMU_PAGEMASK);
351112f080e7Smrj 			}
351212f080e7Smrj 
351312f080e7Smrj 			/*
351412f080e7Smrj 			 * save away the page aligned virtual address which was
351512f080e7Smrj 			 * allocated from the kernel heap arena (taking into
351612f080e7Smrj 			 * account if we need more copy buffer than we alloced
351712f080e7Smrj 			 * and use multiple windows to handle this, i.e. &,%).
351812f080e7Smrj 			 * NOTE: there isn't and physical memory backing up this
351912f080e7Smrj 			 * virtual address space currently.
352012f080e7Smrj 			 */
352112f080e7Smrj 			if ((*copybuf_used + MMU_PAGESIZE) <=
352212f080e7Smrj 			    dma->dp_copybuf_size) {
352312f080e7Smrj 				dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
352412f080e7Smrj 				    (((uintptr_t)dma->dp_kva + *copybuf_used) &
352512f080e7Smrj 				    MMU_PAGEMASK);
352612f080e7Smrj 			} else {
352712f080e7Smrj 				if (copybuf_sz_power_2) {
352812f080e7Smrj 					dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
352912f080e7Smrj 					    (((uintptr_t)dma->dp_kva +
353012f080e7Smrj 					    (*copybuf_used &
353112f080e7Smrj 					    (dma->dp_copybuf_size - 1))) &
353212f080e7Smrj 					    MMU_PAGEMASK);
353312f080e7Smrj 				} else {
353412f080e7Smrj 					dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
353512f080e7Smrj 					    (((uintptr_t)dma->dp_kva +
353612f080e7Smrj 					    (*copybuf_used %
353712f080e7Smrj 					    dma->dp_copybuf_size)) &
353812f080e7Smrj 					    MMU_PAGEMASK);
353912f080e7Smrj 				}
354012f080e7Smrj 			}
354112f080e7Smrj 
354212f080e7Smrj 			/*
354312f080e7Smrj 			 * if we haven't used up the available copy buffer yet,
354412f080e7Smrj 			 * map the kva to the physical page.
354512f080e7Smrj 			 */
354612f080e7Smrj 			if (!dma->dp_cb_remaping && ((*copybuf_used +
354712f080e7Smrj 			    MMU_PAGESIZE) <= dma->dp_copybuf_size)) {
354812f080e7Smrj 				dma->dp_pgmap[pidx].pm_mapped = B_TRUE;
354912f080e7Smrj 				if (dma->dp_pgmap[pidx].pm_pp != NULL) {
355012f080e7Smrj 					i86_pp_map(dma->dp_pgmap[pidx].pm_pp,
355112f080e7Smrj 					    dma->dp_pgmap[pidx].pm_kaddr);
355212f080e7Smrj 				} else {
355312f080e7Smrj 					i86_va_map(dma->dp_pgmap[pidx].pm_vaddr,
355412f080e7Smrj 					    sinfo->si_asp,
355512f080e7Smrj 					    dma->dp_pgmap[pidx].pm_kaddr);
355612f080e7Smrj 				}
355712f080e7Smrj 
355812f080e7Smrj 			/*
355912f080e7Smrj 			 * we've used up the available copy buffer, this page
356012f080e7Smrj 			 * will have to be mapped during rootnex_dma_win() when
356112f080e7Smrj 			 * we switch to a new window which requires a re-map
356212f080e7Smrj 			 * the copy buffer. (32-bit kernel only)
356312f080e7Smrj 			 */
356412f080e7Smrj 			} else {
356512f080e7Smrj 				dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
356612f080e7Smrj 			}
356712f080e7Smrj #endif
356812f080e7Smrj 			/* go to the next page_t */
356912f080e7Smrj 			if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
357012f080e7Smrj 				*cur_pp = (*cur_pp)->p_next;
357112f080e7Smrj 			}
357212f080e7Smrj 		}
357312f080e7Smrj 
357412f080e7Smrj 		/* add to the copy buffer count */
357512f080e7Smrj 		*copybuf_used += MMU_PAGESIZE;
357612f080e7Smrj 
357712f080e7Smrj 	/*
357812f080e7Smrj 	 * This cookie doesn't use the copy buffer. Walk through the pages this
357912f080e7Smrj 	 * cookie occupies to reflect this.
358012f080e7Smrj 	 */
358112f080e7Smrj 	} else {
358212f080e7Smrj 		/*
358312f080e7Smrj 		 * figure out how many pages the cookie occupies. We need to
358412f080e7Smrj 		 * use the original page offset of the buffer and the cookies
358512f080e7Smrj 		 * offset in the buffer to do this.
358612f080e7Smrj 		 */
358712f080e7Smrj 		poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET;
358812f080e7Smrj 		pcnt = mmu_btopr(cookie->dmac_size + poff);
358912f080e7Smrj 
359012f080e7Smrj 		while (pcnt > 0) {
359112f080e7Smrj #if !defined(__amd64)
359212f080e7Smrj 			/*
359312f080e7Smrj 			 * the 32-bit kernel doesn't have seg kpm, so we need
359412f080e7Smrj 			 * to map in the driver buffer (if it didn't come down
359512f080e7Smrj 			 * with a kernel VA) on the fly. Since this page doesn't
359612f080e7Smrj 			 * use the copy buffer, it's not, or will it ever, have
359712f080e7Smrj 			 * to be mapped in.
359812f080e7Smrj 			 */
359912f080e7Smrj 			dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
360012f080e7Smrj #endif
360112f080e7Smrj 			dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE;
360212f080e7Smrj 
360312f080e7Smrj 			/*
360412f080e7Smrj 			 * we need to update pidx and cur_pp or we'll loose
360512f080e7Smrj 			 * track of where we are.
360612f080e7Smrj 			 */
360712f080e7Smrj 			if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
360812f080e7Smrj 				*cur_pp = (*cur_pp)->p_next;
360912f080e7Smrj 			}
361012f080e7Smrj 			pidx++;
361112f080e7Smrj 			pcnt--;
361212f080e7Smrj 		}
361312f080e7Smrj 	}
361412f080e7Smrj }
361512f080e7Smrj 
361612f080e7Smrj 
361712f080e7Smrj /*
361812f080e7Smrj  * rootnex_sgllen_window_boundary()
361912f080e7Smrj  *    Called in the bind slow path when the next cookie causes us to exceed (in
362012f080e7Smrj  *    this case == since we start at 0 and sgllen starts at 1) the maximum sgl
362112f080e7Smrj  *    length supported by the DMA H/W.
362212f080e7Smrj  */
362312f080e7Smrj static int
362412f080e7Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
362512f080e7Smrj     rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr,
362612f080e7Smrj     off_t cur_offset)
362712f080e7Smrj {
362812f080e7Smrj 	off_t new_offset;
362912f080e7Smrj 	size_t trim_sz;
363012f080e7Smrj 	off_t coffset;
363112f080e7Smrj 
363212f080e7Smrj 
363312f080e7Smrj 	/*
363412f080e7Smrj 	 * if we know we'll never have to trim, it's pretty easy. Just move to
363512f080e7Smrj 	 * the next window and init it. We're done.
363612f080e7Smrj 	 */
363712f080e7Smrj 	if (!dma->dp_trim_required) {
363812f080e7Smrj 		(*windowp)++;
363912f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
364012f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
364112f080e7Smrj 		(*windowp)->wd_size = cookie->dmac_size;
364212f080e7Smrj 		return (DDI_SUCCESS);
364312f080e7Smrj 	}
364412f080e7Smrj 
364512f080e7Smrj 	/* figure out how much we need to trim from the window */
364612f080e7Smrj 	ASSERT(attr->dma_attr_granular != 0);
364712f080e7Smrj 	if (dma->dp_granularity_power_2) {
364812f080e7Smrj 		trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1);
364912f080e7Smrj 	} else {
365012f080e7Smrj 		trim_sz = (*windowp)->wd_size % attr->dma_attr_granular;
365112f080e7Smrj 	}
365212f080e7Smrj 
365312f080e7Smrj 	/* The window's a whole multiple of granularity. We're done */
365412f080e7Smrj 	if (trim_sz == 0) {
365512f080e7Smrj 		(*windowp)++;
365612f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
365712f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
365812f080e7Smrj 		(*windowp)->wd_size = cookie->dmac_size;
365912f080e7Smrj 		return (DDI_SUCCESS);
366012f080e7Smrj 	}
366112f080e7Smrj 
366212f080e7Smrj 	/*
366312f080e7Smrj 	 * The window's not a whole multiple of granularity, since we know this
366412f080e7Smrj 	 * is due to the sgllen, we need to go back to the last cookie and trim
366512f080e7Smrj 	 * that one, add the left over part of the old cookie into the new
366612f080e7Smrj 	 * window, and then add in the new cookie into the new window.
366712f080e7Smrj 	 */
366812f080e7Smrj 
366912f080e7Smrj 	/*
367012f080e7Smrj 	 * make sure the driver isn't making us do something bad... Trimming and
367112f080e7Smrj 	 * sgllen == 1 don't go together.
367212f080e7Smrj 	 */
367312f080e7Smrj 	if (attr->dma_attr_sgllen == 1) {
367412f080e7Smrj 		return (DDI_DMA_NOMAPPING);
367512f080e7Smrj 	}
367612f080e7Smrj 
367712f080e7Smrj 	/*
367812f080e7Smrj 	 * first, setup the current window to account for the trim. Need to go
367912f080e7Smrj 	 * back to the last cookie for this.
368012f080e7Smrj 	 */
368112f080e7Smrj 	cookie--;
368212f080e7Smrj 	(*windowp)->wd_trim.tr_trim_last = B_TRUE;
368312f080e7Smrj 	(*windowp)->wd_trim.tr_last_cookie = cookie;
3684843e1988Sjohnlev 	(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
368512f080e7Smrj 	ASSERT(cookie->dmac_size > trim_sz);
368612f080e7Smrj 	(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
368712f080e7Smrj 	(*windowp)->wd_size -= trim_sz;
368812f080e7Smrj 
368912f080e7Smrj 	/* save the buffer offsets for the next window */
369012f080e7Smrj 	coffset = cookie->dmac_size - trim_sz;
369112f080e7Smrj 	new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
369212f080e7Smrj 
369312f080e7Smrj 	/*
369412f080e7Smrj 	 * set this now in case this is the first window. all other cases are
369512f080e7Smrj 	 * set in dma_win()
369612f080e7Smrj 	 */
369712f080e7Smrj 	cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
369812f080e7Smrj 
369912f080e7Smrj 	/*
370012f080e7Smrj 	 * initialize the next window using what's left over in the previous
370112f080e7Smrj 	 * cookie.
370212f080e7Smrj 	 */
370312f080e7Smrj 	(*windowp)++;
370412f080e7Smrj 	rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
370512f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
370612f080e7Smrj 	(*windowp)->wd_trim.tr_trim_first = B_TRUE;
3707843e1988Sjohnlev 	(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset;
370812f080e7Smrj 	(*windowp)->wd_trim.tr_first_size = trim_sz;
370912f080e7Smrj 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
371012f080e7Smrj 		(*windowp)->wd_dosync = B_TRUE;
371112f080e7Smrj 	}
371212f080e7Smrj 
371312f080e7Smrj 	/*
371412f080e7Smrj 	 * now go back to the current cookie and add it to the new window. set
371512f080e7Smrj 	 * the new window size to the what was left over from the previous
371612f080e7Smrj 	 * cookie and what's in the current cookie.
371712f080e7Smrj 	 */
371812f080e7Smrj 	cookie++;
371912f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
372012f080e7Smrj 	(*windowp)->wd_size = trim_sz + cookie->dmac_size;
372112f080e7Smrj 
372212f080e7Smrj 	/*
372312f080e7Smrj 	 * trim plus the next cookie could put us over maxxfer (a cookie can be
372412f080e7Smrj 	 * a max size of maxxfer). Handle that case.
372512f080e7Smrj 	 */
372612f080e7Smrj 	if ((*windowp)->wd_size > dma->dp_maxxfer) {
372712f080e7Smrj 		/*
372812f080e7Smrj 		 * maxxfer is already a whole multiple of granularity, and this
372912f080e7Smrj 		 * trim will be <= the previous trim (since a cookie can't be
373012f080e7Smrj 		 * larger than maxxfer). Make things simple here.
373112f080e7Smrj 		 */
373212f080e7Smrj 		trim_sz = (*windowp)->wd_size - dma->dp_maxxfer;
373312f080e7Smrj 		(*windowp)->wd_trim.tr_trim_last = B_TRUE;
373412f080e7Smrj 		(*windowp)->wd_trim.tr_last_cookie = cookie;
3735843e1988Sjohnlev 		(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
373612f080e7Smrj 		(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
373712f080e7Smrj 		(*windowp)->wd_size -= trim_sz;
373812f080e7Smrj 		ASSERT((*windowp)->wd_size == dma->dp_maxxfer);
373912f080e7Smrj 
374012f080e7Smrj 		/* save the buffer offsets for the next window */
374112f080e7Smrj 		coffset = cookie->dmac_size - trim_sz;
374212f080e7Smrj 		new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
374312f080e7Smrj 
374412f080e7Smrj 		/* setup the next window */
374512f080e7Smrj 		(*windowp)++;
374612f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
374712f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
374812f080e7Smrj 		(*windowp)->wd_trim.tr_trim_first = B_TRUE;
3749843e1988Sjohnlev 		(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress +
375012f080e7Smrj 		    coffset;
375112f080e7Smrj 		(*windowp)->wd_trim.tr_first_size = trim_sz;
375212f080e7Smrj 	}
375312f080e7Smrj 
375412f080e7Smrj 	return (DDI_SUCCESS);
375512f080e7Smrj }
375612f080e7Smrj 
375712f080e7Smrj 
375812f080e7Smrj /*
375912f080e7Smrj  * rootnex_copybuf_window_boundary()
376012f080e7Smrj  *    Called in bind slowpath when we get to a window boundary because we used
376112f080e7Smrj  *    up all the copy buffer that we have.
376212f080e7Smrj  */
376312f080e7Smrj static int
376412f080e7Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
376512f080e7Smrj     rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset,
376612f080e7Smrj     size_t *copybuf_used)
376712f080e7Smrj {
376812f080e7Smrj 	rootnex_sglinfo_t *sinfo;
376912f080e7Smrj 	off_t new_offset;
377012f080e7Smrj 	size_t trim_sz;
3771843e1988Sjohnlev 	paddr_t paddr;
377212f080e7Smrj 	off_t coffset;
377312f080e7Smrj 	uint_t pidx;
377412f080e7Smrj 	off_t poff;
377512f080e7Smrj 
377612f080e7Smrj 
377712f080e7Smrj 	sinfo = &dma->dp_sglinfo;
377812f080e7Smrj 
377912f080e7Smrj 	/*
378012f080e7Smrj 	 * the copy buffer should be a whole multiple of page size. We know that
378112f080e7Smrj 	 * this cookie is <= MMU_PAGESIZE.
378212f080e7Smrj 	 */
378312f080e7Smrj 	ASSERT(cookie->dmac_size <= MMU_PAGESIZE);
378412f080e7Smrj 
378512f080e7Smrj 	/*
378612f080e7Smrj 	 * from now on, all new windows in this bind need to be re-mapped during
378712f080e7Smrj 	 * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf
378812f080e7Smrj 	 * space...
378912f080e7Smrj 	 */
379012f080e7Smrj #if !defined(__amd64)
379112f080e7Smrj 	dma->dp_cb_remaping = B_TRUE;
379212f080e7Smrj #endif
379312f080e7Smrj 
379412f080e7Smrj 	/* reset copybuf used */
379512f080e7Smrj 	*copybuf_used = 0;
379612f080e7Smrj 
379712f080e7Smrj 	/*
379812f080e7Smrj 	 * if we don't have to trim (since granularity is set to 1), go to the
379912f080e7Smrj 	 * next window and add the current cookie to it. We know the current
380012f080e7Smrj 	 * cookie uses the copy buffer since we're in this code path.
380112f080e7Smrj 	 */
380212f080e7Smrj 	if (!dma->dp_trim_required) {
380312f080e7Smrj 		(*windowp)++;
380412f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
380512f080e7Smrj 
380612f080e7Smrj 		/* Add this cookie to the new window */
380712f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
380812f080e7Smrj 		(*windowp)->wd_size += cookie->dmac_size;
380912f080e7Smrj 		*copybuf_used += MMU_PAGESIZE;
381012f080e7Smrj 		return (DDI_SUCCESS);
381112f080e7Smrj 	}
381212f080e7Smrj 
381312f080e7Smrj 	/*
381412f080e7Smrj 	 * *** may need to trim, figure it out.
381512f080e7Smrj 	 */
381612f080e7Smrj 
381712f080e7Smrj 	/* figure out how much we need to trim from the window */
381812f080e7Smrj 	if (dma->dp_granularity_power_2) {
381912f080e7Smrj 		trim_sz = (*windowp)->wd_size &
382012f080e7Smrj 		    (hp->dmai_attr.dma_attr_granular - 1);
382112f080e7Smrj 	} else {
382212f080e7Smrj 		trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular;
382312f080e7Smrj 	}
382412f080e7Smrj 
382512f080e7Smrj 	/*
382612f080e7Smrj 	 * if the window's a whole multiple of granularity, go to the next
382712f080e7Smrj 	 * window, init it, then add in the current cookie. We know the current
382812f080e7Smrj 	 * cookie uses the copy buffer since we're in this code path.
382912f080e7Smrj 	 */
383012f080e7Smrj 	if (trim_sz == 0) {
383112f080e7Smrj 		(*windowp)++;
383212f080e7Smrj 		rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
383312f080e7Smrj 
383412f080e7Smrj 		/* Add this cookie to the new window */
383512f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
383612f080e7Smrj 		(*windowp)->wd_size += cookie->dmac_size;
383712f080e7Smrj 		*copybuf_used += MMU_PAGESIZE;
383812f080e7Smrj 		return (DDI_SUCCESS);
383912f080e7Smrj 	}
384012f080e7Smrj 
384112f080e7Smrj 	/*
384212f080e7Smrj 	 * *** We figured it out, we definitly need to trim
384312f080e7Smrj 	 */
384412f080e7Smrj 
384512f080e7Smrj 	/*
384612f080e7Smrj 	 * make sure the driver isn't making us do something bad...
384712f080e7Smrj 	 * Trimming and sgllen == 1 don't go together.
384812f080e7Smrj 	 */
384912f080e7Smrj 	if (hp->dmai_attr.dma_attr_sgllen == 1) {
385012f080e7Smrj 		return (DDI_DMA_NOMAPPING);
385112f080e7Smrj 	}
385212f080e7Smrj 
385312f080e7Smrj 	/*
385412f080e7Smrj 	 * first, setup the current window to account for the trim. Need to go
385512f080e7Smrj 	 * back to the last cookie for this. Some of the last cookie will be in
385612f080e7Smrj 	 * the current window, and some of the last cookie will be in the new
385712f080e7Smrj 	 * window. All of the current cookie will be in the new window.
385812f080e7Smrj 	 */
385912f080e7Smrj 	cookie--;
386012f080e7Smrj 	(*windowp)->wd_trim.tr_trim_last = B_TRUE;
386112f080e7Smrj 	(*windowp)->wd_trim.tr_last_cookie = cookie;
3862843e1988Sjohnlev 	(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
386312f080e7Smrj 	ASSERT(cookie->dmac_size > trim_sz);
386412f080e7Smrj 	(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
386512f080e7Smrj 	(*windowp)->wd_size -= trim_sz;
386612f080e7Smrj 
386712f080e7Smrj 	/*
386812f080e7Smrj 	 * we're trimming the last cookie (not the current cookie). So that
386912f080e7Smrj 	 * last cookie may have or may not have been using the copy buffer (
387012f080e7Smrj 	 * we know the cookie passed in uses the copy buffer since we're in
387112f080e7Smrj 	 * this code path).
387212f080e7Smrj 	 *
387312f080e7Smrj 	 * If the last cookie doesn't use the copy buffer, nothing special to
387412f080e7Smrj 	 * do. However, if it does uses the copy buffer, it will be both the
387512f080e7Smrj 	 * last page in the current window and the first page in the next
387612f080e7Smrj 	 * window. Since we are reusing the copy buffer (and KVA space on the
387712f080e7Smrj 	 * 32-bit kernel), this page will use the end of the copy buffer in the
387812f080e7Smrj 	 * current window, and the start of the copy buffer in the next window.
387912f080e7Smrj 	 * Track that info... The cookie physical address was already set to
388012f080e7Smrj 	 * the copy buffer physical address in setup_cookie..
388112f080e7Smrj 	 */
388212f080e7Smrj 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
388312f080e7Smrj 		pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset +
388412f080e7Smrj 		    (*windowp)->wd_size) >> MMU_PAGESHIFT;
388512f080e7Smrj 		(*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE;
388612f080e7Smrj 		(*windowp)->wd_trim.tr_last_pidx = pidx;
388712f080e7Smrj 		(*windowp)->wd_trim.tr_last_cbaddr =
388812f080e7Smrj 		    dma->dp_pgmap[pidx].pm_cbaddr;
388912f080e7Smrj #if !defined(__amd64)
389012f080e7Smrj 		(*windowp)->wd_trim.tr_last_kaddr =
389112f080e7Smrj 		    dma->dp_pgmap[pidx].pm_kaddr;
389212f080e7Smrj #endif
389312f080e7Smrj 	}
389412f080e7Smrj 
389512f080e7Smrj 	/* save the buffer offsets for the next window */
389612f080e7Smrj 	coffset = cookie->dmac_size - trim_sz;
389712f080e7Smrj 	new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
389812f080e7Smrj 
389912f080e7Smrj 	/*
390012f080e7Smrj 	 * set this now in case this is the first window. all other cases are
390112f080e7Smrj 	 * set in dma_win()
390212f080e7Smrj 	 */
390312f080e7Smrj 	cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
390412f080e7Smrj 
390512f080e7Smrj 	/*
390612f080e7Smrj 	 * initialize the next window using what's left over in the previous
390712f080e7Smrj 	 * cookie.
390812f080e7Smrj 	 */
390912f080e7Smrj 	(*windowp)++;
391012f080e7Smrj 	rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
391112f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
391212f080e7Smrj 	(*windowp)->wd_trim.tr_trim_first = B_TRUE;
3913843e1988Sjohnlev 	(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset;
391412f080e7Smrj 	(*windowp)->wd_trim.tr_first_size = trim_sz;
391512f080e7Smrj 
391612f080e7Smrj 	/*
391712f080e7Smrj 	 * again, we're tracking if the last cookie uses the copy buffer.
391812f080e7Smrj 	 * read the comment above for more info on why we need to track
391912f080e7Smrj 	 * additional state.
392012f080e7Smrj 	 *
392112f080e7Smrj 	 * For the first cookie in the new window, we need reset the physical
392212f080e7Smrj 	 * address to DMA into to the start of the copy buffer plus any
392312f080e7Smrj 	 * initial page offset which may be present.
392412f080e7Smrj 	 */
392512f080e7Smrj 	if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
392612f080e7Smrj 		(*windowp)->wd_dosync = B_TRUE;
392712f080e7Smrj 		(*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE;
392812f080e7Smrj 		(*windowp)->wd_trim.tr_first_pidx = pidx;
392912f080e7Smrj 		(*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr;
393012f080e7Smrj 		poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET;
3931843e1988Sjohnlev 
3932843e1988Sjohnlev 		paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) +
3933843e1988Sjohnlev 		    poff;
3934843e1988Sjohnlev #ifdef __xpv
3935843e1988Sjohnlev 		/*
3936843e1988Sjohnlev 		 * If we're dom0, we're using a real device so we need to load
3937843e1988Sjohnlev 		 * the cookies with MAs instead of PAs.
3938843e1988Sjohnlev 		 */
3939843e1988Sjohnlev 		(*windowp)->wd_trim.tr_first_paddr =
3940843e1988Sjohnlev 		    ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
3941843e1988Sjohnlev #else
3942843e1988Sjohnlev 		(*windowp)->wd_trim.tr_first_paddr = paddr;
3943843e1988Sjohnlev #endif
3944843e1988Sjohnlev 
394512f080e7Smrj #if !defined(__amd64)
394612f080e7Smrj 		(*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva;
394712f080e7Smrj #endif
394812f080e7Smrj 		/* account for the cookie copybuf usage in the new window */
394912f080e7Smrj 		*copybuf_used += MMU_PAGESIZE;
395012f080e7Smrj 
395112f080e7Smrj 		/*
395212f080e7Smrj 		 * every piece of code has to have a hack, and here is this
395312f080e7Smrj 		 * ones :-)
395412f080e7Smrj 		 *
395512f080e7Smrj 		 * There is a complex interaction between setup_cookie and the
395612f080e7Smrj 		 * copybuf window boundary. The complexity had to be in either
395712f080e7Smrj 		 * the maxxfer window, or the copybuf window, and I chose the
395812f080e7Smrj 		 * copybuf code.
395912f080e7Smrj 		 *
396012f080e7Smrj 		 * So in this code path, we have taken the last cookie,
396112f080e7Smrj 		 * virtually broken it in half due to the trim, and it happens
396212f080e7Smrj 		 * to use the copybuf which further complicates life. At the
396312f080e7Smrj 		 * same time, we have already setup the current cookie, which
396412f080e7Smrj 		 * is now wrong. More background info: the current cookie uses
396512f080e7Smrj 		 * the copybuf, so it is only a page long max. So we need to
396612f080e7Smrj 		 * fix the current cookies copy buffer address, physical
396712f080e7Smrj 		 * address, and kva for the 32-bit kernel. We due this by
396812f080e7Smrj 		 * bumping them by page size (of course, we can't due this on
396912f080e7Smrj 		 * the physical address since the copy buffer may not be
397012f080e7Smrj 		 * physically contiguous).
397112f080e7Smrj 		 */
397212f080e7Smrj 		cookie++;
397312f080e7Smrj 		dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE;
3974843e1988Sjohnlev 		poff = cookie->dmac_laddress & MMU_PAGEOFFSET;
3975843e1988Sjohnlev 
3976843e1988Sjohnlev 		paddr = pfn_to_pa(hat_getpfnum(kas.a_hat,
397712f080e7Smrj 		    dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff;
3978843e1988Sjohnlev #ifdef __xpv
3979843e1988Sjohnlev 		/*
3980843e1988Sjohnlev 		 * If we're dom0, we're using a real device so we need to load
3981843e1988Sjohnlev 		 * the cookies with MAs instead of PAs.
3982843e1988Sjohnlev 		 */
3983843e1988Sjohnlev 		cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr);
3984843e1988Sjohnlev #else
3985843e1988Sjohnlev 		cookie->dmac_laddress = paddr;
3986843e1988Sjohnlev #endif
3987843e1988Sjohnlev 
398812f080e7Smrj #if !defined(__amd64)
398912f080e7Smrj 		ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE);
399012f080e7Smrj 		dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE;
399112f080e7Smrj #endif
399212f080e7Smrj 	} else {
399312f080e7Smrj 		/* go back to the current cookie */
399412f080e7Smrj 		cookie++;
399512f080e7Smrj 	}
399612f080e7Smrj 
399712f080e7Smrj 	/*
399812f080e7Smrj 	 * add the current cookie to the new window. set the new window size to
399912f080e7Smrj 	 * the what was left over from the previous cookie and what's in the
400012f080e7Smrj 	 * current cookie.
400112f080e7Smrj 	 */
400212f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
400312f080e7Smrj 	(*windowp)->wd_size = trim_sz + cookie->dmac_size;
400412f080e7Smrj 	ASSERT((*windowp)->wd_size < dma->dp_maxxfer);
400512f080e7Smrj 
400612f080e7Smrj 	/*
400712f080e7Smrj 	 * we know that the cookie passed in always uses the copy buffer. We
400812f080e7Smrj 	 * wouldn't be here if it didn't.
400912f080e7Smrj 	 */
401012f080e7Smrj 	*copybuf_used += MMU_PAGESIZE;
401112f080e7Smrj 
401212f080e7Smrj 	return (DDI_SUCCESS);
401312f080e7Smrj }
401412f080e7Smrj 
401512f080e7Smrj 
401612f080e7Smrj /*
401712f080e7Smrj  * rootnex_maxxfer_window_boundary()
401812f080e7Smrj  *    Called in bind slowpath when we get to a window boundary because we will
401912f080e7Smrj  *    go over maxxfer.
402012f080e7Smrj  */
402112f080e7Smrj static int
402212f080e7Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
402312f080e7Smrj     rootnex_window_t **windowp, ddi_dma_cookie_t *cookie)
402412f080e7Smrj {
402512f080e7Smrj 	size_t dmac_size;
402612f080e7Smrj 	off_t new_offset;
402712f080e7Smrj 	size_t trim_sz;
402812f080e7Smrj 	off_t coffset;
402912f080e7Smrj 
403012f080e7Smrj 
403112f080e7Smrj 	/*
403212f080e7Smrj 	 * calculate how much we have to trim off of the current cookie to equal
403312f080e7Smrj 	 * maxxfer. We don't have to account for granularity here since our
403412f080e7Smrj 	 * maxxfer already takes that into account.
403512f080e7Smrj 	 */
403612f080e7Smrj 	trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer;
403712f080e7Smrj 	ASSERT(trim_sz <= cookie->dmac_size);
403812f080e7Smrj 	ASSERT(trim_sz <= dma->dp_maxxfer);
403912f080e7Smrj 
404012f080e7Smrj 	/* save cookie size since we need it later and we might change it */
404112f080e7Smrj 	dmac_size = cookie->dmac_size;
404212f080e7Smrj 
404312f080e7Smrj 	/*
404412f080e7Smrj 	 * if we're not trimming the entire cookie, setup the current window to
404512f080e7Smrj 	 * account for the trim.
404612f080e7Smrj 	 */
404712f080e7Smrj 	if (trim_sz < cookie->dmac_size) {
404812f080e7Smrj 		(*windowp)->wd_cookie_cnt++;
404912f080e7Smrj 		(*windowp)->wd_trim.tr_trim_last = B_TRUE;
405012f080e7Smrj 		(*windowp)->wd_trim.tr_last_cookie = cookie;
4051843e1988Sjohnlev 		(*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
405212f080e7Smrj 		(*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
405312f080e7Smrj 		(*windowp)->wd_size = dma->dp_maxxfer;
405412f080e7Smrj 
405512f080e7Smrj 		/*
405612f080e7Smrj 		 * set the adjusted cookie size now in case this is the first
405712f080e7Smrj 		 * window. All other windows are taken care of in get win
405812f080e7Smrj 		 */
405912f080e7Smrj 		cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
406012f080e7Smrj 	}
406112f080e7Smrj 
406212f080e7Smrj 	/*
406312f080e7Smrj 	 * coffset is the current offset within the cookie, new_offset is the
406412f080e7Smrj 	 * current offset with the entire buffer.
406512f080e7Smrj 	 */
406612f080e7Smrj 	coffset = dmac_size - trim_sz;
406712f080e7Smrj 	new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
406812f080e7Smrj 
406912f080e7Smrj 	/* initialize the next window */
407012f080e7Smrj 	(*windowp)++;
407112f080e7Smrj 	rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
407212f080e7Smrj 	(*windowp)->wd_cookie_cnt++;
407312f080e7Smrj 	(*windowp)->wd_size = trim_sz;
407412f080e7Smrj 	if (trim_sz < dmac_size) {
407512f080e7Smrj 		(*windowp)->wd_trim.tr_trim_first = B_TRUE;
4076843e1988Sjohnlev 		(*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress +
407712f080e7Smrj 		    coffset;
407812f080e7Smrj 		(*windowp)->wd_trim.tr_first_size = trim_sz;
407912f080e7Smrj 	}
408012f080e7Smrj 
408112f080e7Smrj 	return (DDI_SUCCESS);
408212f080e7Smrj }
408312f080e7Smrj 
408412f080e7Smrj 
408512f080e7Smrj /*ARGSUSED*/
408612f080e7Smrj static int
408720906b23SVikram Hegde rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
408812f080e7Smrj     off_t off, size_t len, uint_t cache_flags)
408912f080e7Smrj {
409012f080e7Smrj 	rootnex_sglinfo_t *sinfo;
409112f080e7Smrj 	rootnex_pgmap_t *cbpage;
409212f080e7Smrj 	rootnex_window_t *win;
409312f080e7Smrj 	ddi_dma_impl_t *hp;
409412f080e7Smrj 	rootnex_dma_t *dma;
409512f080e7Smrj 	caddr_t fromaddr;
409612f080e7Smrj 	caddr_t toaddr;
409712f080e7Smrj 	uint_t psize;
409812f080e7Smrj 	off_t offset;
409912f080e7Smrj 	uint_t pidx;
410012f080e7Smrj 	size_t size;
410112f080e7Smrj 	off_t poff;
410212f080e7Smrj 	int e;
410312f080e7Smrj 
410412f080e7Smrj 
410512f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
410612f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
410712f080e7Smrj 	sinfo = &dma->dp_sglinfo;
410812f080e7Smrj 
410912f080e7Smrj 	/*
411012f080e7Smrj 	 * if we don't have any windows, we don't need to sync. A copybuf
411112f080e7Smrj 	 * will cause us to have at least one window.
411212f080e7Smrj 	 */
411312f080e7Smrj 	if (dma->dp_window == NULL) {
411412f080e7Smrj 		return (DDI_SUCCESS);
411512f080e7Smrj 	}
411612f080e7Smrj 
411712f080e7Smrj 	/* This window may not need to be sync'd */
411812f080e7Smrj 	win = &dma->dp_window[dma->dp_current_win];
411912f080e7Smrj 	if (!win->wd_dosync) {
412012f080e7Smrj 		return (DDI_SUCCESS);
412112f080e7Smrj 	}
412212f080e7Smrj 
412394f1124eSVikram Hegde 	if (strcmp(ddi_driver_name(rdip), "bnx") == 0 ||
412494f1124eSVikram Hegde 	    strcmp(ddi_driver_name(rdip), "ohci") == 0)
412594f1124eSVikram Hegde 		cmn_err(CE_WARN, "%s: syncing DMA ...",
412694f1124eSVikram Hegde 		    ddi_driver_name(rdip));
412794f1124eSVikram Hegde 
412812f080e7Smrj 	/* handle off and len special cases */
412912f080e7Smrj 	if ((off == 0) || (rootnex_sync_ignore_params)) {
413012f080e7Smrj 		offset = win->wd_offset;
413112f080e7Smrj 	} else {
413212f080e7Smrj 		offset = off;
413312f080e7Smrj 	}
413412f080e7Smrj 	if ((len == 0) || (rootnex_sync_ignore_params)) {
413512f080e7Smrj 		size = win->wd_size;
413612f080e7Smrj 	} else {
413712f080e7Smrj 		size = len;
413812f080e7Smrj 	}
413912f080e7Smrj 
414012f080e7Smrj 	/* check the sync args to make sure they make a little sense */
414112f080e7Smrj 	if (rootnex_sync_check_parms) {
414212f080e7Smrj 		e = rootnex_valid_sync_parms(hp, win, offset, size,
414312f080e7Smrj 		    cache_flags);
414412f080e7Smrj 		if (e != DDI_SUCCESS) {
414512f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]);
414612f080e7Smrj 			return (DDI_FAILURE);
414712f080e7Smrj 		}
414812f080e7Smrj 	}
414912f080e7Smrj 
415012f080e7Smrj 	/*
415112f080e7Smrj 	 * special case the first page to handle the offset into the page. The
415212f080e7Smrj 	 * offset to the current page for our buffer is the offset into the
415312f080e7Smrj 	 * first page of the buffer plus our current offset into the buffer
415412f080e7Smrj 	 * itself, masked of course.
415512f080e7Smrj 	 */
415612f080e7Smrj 	poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET;
415712f080e7Smrj 	psize = MIN((MMU_PAGESIZE - poff), size);
415812f080e7Smrj 
415912f080e7Smrj 	/* go through all the pages that we want to sync */
416012f080e7Smrj 	while (size > 0) {
416112f080e7Smrj 		/*
416212f080e7Smrj 		 * Calculate the page index relative to the start of the buffer.
416312f080e7Smrj 		 * The index to the current page for our buffer is the offset
416412f080e7Smrj 		 * into the first page of the buffer plus our current offset
416512f080e7Smrj 		 * into the buffer itself, shifted of course...
416612f080e7Smrj 		 */
416712f080e7Smrj 		pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT;
416812f080e7Smrj 		ASSERT(pidx < sinfo->si_max_pages);
416912f080e7Smrj 
417012f080e7Smrj 		/*
417112f080e7Smrj 		 * if this page uses the copy buffer, we need to sync it,
417212f080e7Smrj 		 * otherwise, go on to the next page.
417312f080e7Smrj 		 */
417412f080e7Smrj 		cbpage = &dma->dp_pgmap[pidx];
417512f080e7Smrj 		ASSERT((cbpage->pm_uses_copybuf == B_TRUE) ||
417612f080e7Smrj 		    (cbpage->pm_uses_copybuf == B_FALSE));
417712f080e7Smrj 		if (cbpage->pm_uses_copybuf) {
417812f080e7Smrj 			/* cbaddr and kaddr should be page aligned */
417912f080e7Smrj 			ASSERT(((uintptr_t)cbpage->pm_cbaddr &
418012f080e7Smrj 			    MMU_PAGEOFFSET) == 0);
418112f080e7Smrj 			ASSERT(((uintptr_t)cbpage->pm_kaddr &
418212f080e7Smrj 			    MMU_PAGEOFFSET) == 0);
418312f080e7Smrj 
418412f080e7Smrj 			/*
418512f080e7Smrj 			 * if we're copying for the device, we are going to
418612f080e7Smrj 			 * copy from the drivers buffer and to the rootnex
418712f080e7Smrj 			 * allocated copy buffer.
418812f080e7Smrj 			 */
418912f080e7Smrj 			if (cache_flags == DDI_DMA_SYNC_FORDEV) {
419012f080e7Smrj 				fromaddr = cbpage->pm_kaddr + poff;
419112f080e7Smrj 				toaddr = cbpage->pm_cbaddr + poff;
419212f080e7Smrj 				DTRACE_PROBE2(rootnex__sync__dev,
419312f080e7Smrj 				    dev_info_t *, dma->dp_dip, size_t, psize);
419412f080e7Smrj 
419512f080e7Smrj 			/*
419612f080e7Smrj 			 * if we're copying for the cpu/kernel, we are going to
419712f080e7Smrj 			 * copy from the rootnex allocated copy buffer to the
419812f080e7Smrj 			 * drivers buffer.
419912f080e7Smrj 			 */
420012f080e7Smrj 			} else {
420112f080e7Smrj 				fromaddr = cbpage->pm_cbaddr + poff;
420212f080e7Smrj 				toaddr = cbpage->pm_kaddr + poff;
420312f080e7Smrj 				DTRACE_PROBE2(rootnex__sync__cpu,
420412f080e7Smrj 				    dev_info_t *, dma->dp_dip, size_t, psize);
420512f080e7Smrj 			}
420612f080e7Smrj 
420712f080e7Smrj 			bcopy(fromaddr, toaddr, psize);
420812f080e7Smrj 		}
420912f080e7Smrj 
421012f080e7Smrj 		/*
421112f080e7Smrj 		 * decrement size until we're done, update our offset into the
421212f080e7Smrj 		 * buffer, and get the next page size.
421312f080e7Smrj 		 */
421412f080e7Smrj 		size -= psize;
421512f080e7Smrj 		offset += psize;
421612f080e7Smrj 		psize = MIN(MMU_PAGESIZE, size);
421712f080e7Smrj 
421812f080e7Smrj 		/* page offset is zero for the rest of this loop */
421912f080e7Smrj 		poff = 0;
422012f080e7Smrj 	}
422112f080e7Smrj 
422212f080e7Smrj 	return (DDI_SUCCESS);
422312f080e7Smrj }
422412f080e7Smrj 
422520906b23SVikram Hegde /*
422620906b23SVikram Hegde  * rootnex_dma_sync()
422720906b23SVikram Hegde  *    called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags.
422820906b23SVikram Hegde  *    We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC
422920906b23SVikram Hegde  *    is set, ddi_dma_sync() returns immediately passing back success.
423020906b23SVikram Hegde  */
423120906b23SVikram Hegde /*ARGSUSED*/
423220906b23SVikram Hegde static int
423320906b23SVikram Hegde rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
423420906b23SVikram Hegde     off_t off, size_t len, uint_t cache_flags)
423520906b23SVikram Hegde {
423620906b23SVikram Hegde #if !defined(__xpv)
4237*b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
423820906b23SVikram Hegde 		return (iommulib_nexdma_sync(dip, rdip, handle, off, len,
423920906b23SVikram Hegde 		    cache_flags));
424020906b23SVikram Hegde 	}
424120906b23SVikram Hegde #endif
424220906b23SVikram Hegde 	return (rootnex_coredma_sync(dip, rdip, handle, off, len,
424320906b23SVikram Hegde 	    cache_flags));
424420906b23SVikram Hegde }
424512f080e7Smrj 
424612f080e7Smrj /*
424712f080e7Smrj  * rootnex_valid_sync_parms()
424812f080e7Smrj  *    checks the parameters passed to sync to verify they are correct.
424912f080e7Smrj  */
425012f080e7Smrj static int
425112f080e7Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win,
425212f080e7Smrj     off_t offset, size_t size, uint_t cache_flags)
425312f080e7Smrj {
425412f080e7Smrj 	off_t woffset;
425512f080e7Smrj 
425612f080e7Smrj 
425712f080e7Smrj 	/*
425812f080e7Smrj 	 * the first part of the test to make sure the offset passed in is
425912f080e7Smrj 	 * within the window.
426012f080e7Smrj 	 */
426112f080e7Smrj 	if (offset < win->wd_offset) {
426212f080e7Smrj 		return (DDI_FAILURE);
426312f080e7Smrj 	}
426412f080e7Smrj 
426512f080e7Smrj 	/*
426612f080e7Smrj 	 * second and last part of the test to make sure the offset and length
426712f080e7Smrj 	 * passed in is within the window.
426812f080e7Smrj 	 */
426912f080e7Smrj 	woffset = offset - win->wd_offset;
427012f080e7Smrj 	if ((woffset + size) > win->wd_size) {
427112f080e7Smrj 		return (DDI_FAILURE);
427212f080e7Smrj 	}
427312f080e7Smrj 
427412f080e7Smrj 	/*
427512f080e7Smrj 	 * if we are sync'ing for the device, the DDI_DMA_WRITE flag should
427612f080e7Smrj 	 * be set too.
427712f080e7Smrj 	 */
427812f080e7Smrj 	if ((cache_flags == DDI_DMA_SYNC_FORDEV) &&
427912f080e7Smrj 	    (hp->dmai_rflags & DDI_DMA_WRITE)) {
428012f080e7Smrj 		return (DDI_SUCCESS);
428112f080e7Smrj 	}
428212f080e7Smrj 
428312f080e7Smrj 	/*
428412f080e7Smrj 	 * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL
428512f080e7Smrj 	 * should be set. Also DDI_DMA_READ should be set in the flags.
428612f080e7Smrj 	 */
428712f080e7Smrj 	if (((cache_flags == DDI_DMA_SYNC_FORCPU) ||
428812f080e7Smrj 	    (cache_flags == DDI_DMA_SYNC_FORKERNEL)) &&
428912f080e7Smrj 	    (hp->dmai_rflags & DDI_DMA_READ)) {
429012f080e7Smrj 		return (DDI_SUCCESS);
429112f080e7Smrj 	}
429212f080e7Smrj 
429312f080e7Smrj 	return (DDI_FAILURE);
429412f080e7Smrj }
429512f080e7Smrj 
429612f080e7Smrj 
429712f080e7Smrj /*ARGSUSED*/
429812f080e7Smrj static int
429920906b23SVikram Hegde rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
430012f080e7Smrj     uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep,
430112f080e7Smrj     uint_t *ccountp)
430212f080e7Smrj {
430312f080e7Smrj 	rootnex_window_t *window;
430412f080e7Smrj 	rootnex_trim_t *trim;
430512f080e7Smrj 	ddi_dma_impl_t *hp;
430612f080e7Smrj 	rootnex_dma_t *dma;
430712f080e7Smrj #if !defined(__amd64)
430812f080e7Smrj 	rootnex_sglinfo_t *sinfo;
430912f080e7Smrj 	rootnex_pgmap_t *pmap;
431012f080e7Smrj 	uint_t pidx;
431112f080e7Smrj 	uint_t pcnt;
431212f080e7Smrj 	off_t poff;
431312f080e7Smrj 	int i;
431412f080e7Smrj #endif
431512f080e7Smrj 
431612f080e7Smrj 
431712f080e7Smrj 	hp = (ddi_dma_impl_t *)handle;
431812f080e7Smrj 	dma = (rootnex_dma_t *)hp->dmai_private;
431912f080e7Smrj #if !defined(__amd64)
432012f080e7Smrj 	sinfo = &dma->dp_sglinfo;
432112f080e7Smrj #endif
432212f080e7Smrj 
432312f080e7Smrj 	/* If we try and get a window which doesn't exist, return failure */
432412f080e7Smrj 	if (win >= hp->dmai_nwin) {
432512f080e7Smrj 		ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]);
432612f080e7Smrj 		return (DDI_FAILURE);
432712f080e7Smrj 	}
432812f080e7Smrj 
432912f080e7Smrj 	/*
433012f080e7Smrj 	 * if we don't have any windows, and they're asking for the first
433112f080e7Smrj 	 * window, setup the cookie pointer to the first cookie in the bind.
433212f080e7Smrj 	 * setup our return values, then increment the cookie since we return
433312f080e7Smrj 	 * the first cookie on the stack.
433412f080e7Smrj 	 */
433512f080e7Smrj 	if (dma->dp_window == NULL) {
433612f080e7Smrj 		if (win != 0) {
433712f080e7Smrj 			ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]);
433812f080e7Smrj 			return (DDI_FAILURE);
433912f080e7Smrj 		}
434012f080e7Smrj 		hp->dmai_cookie = dma->dp_cookies;
434112f080e7Smrj 		*offp = 0;
434212f080e7Smrj 		*lenp = dma->dp_dma.dmao_size;
434312f080e7Smrj 		*ccountp = dma->dp_sglinfo.si_sgl_size;
434412f080e7Smrj 		*cookiep = hp->dmai_cookie[0];
434512f080e7Smrj 		hp->dmai_cookie++;
434612f080e7Smrj 		return (DDI_SUCCESS);
434712f080e7Smrj 	}
434812f080e7Smrj 
434912f080e7Smrj 	/* sync the old window before moving on to the new one */
435012f080e7Smrj 	window = &dma->dp_window[dma->dp_current_win];
435112f080e7Smrj 	if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) {
435294f1124eSVikram Hegde 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
435312f080e7Smrj 		    DDI_DMA_SYNC_FORCPU);
435412f080e7Smrj 	}
435512f080e7Smrj 
435612f080e7Smrj #if !defined(__amd64)
435712f080e7Smrj 	/*
435812f080e7Smrj 	 * before we move to the next window, if we need to re-map, unmap all
435912f080e7Smrj 	 * the pages in this window.
436012f080e7Smrj 	 */
436112f080e7Smrj 	if (dma->dp_cb_remaping) {
436212f080e7Smrj 		/*
436312f080e7Smrj 		 * If we switch to this window again, we'll need to map in
436412f080e7Smrj 		 * on the fly next time.
436512f080e7Smrj 		 */
436612f080e7Smrj 		window->wd_remap_copybuf = B_TRUE;
436712f080e7Smrj 
436812f080e7Smrj 		/*
436912f080e7Smrj 		 * calculate the page index into the buffer where this window
437012f080e7Smrj 		 * starts, and the number of pages this window takes up.
437112f080e7Smrj 		 */
437212f080e7Smrj 		pidx = (sinfo->si_buf_offset + window->wd_offset) >>
437312f080e7Smrj 		    MMU_PAGESHIFT;
437412f080e7Smrj 		poff = (sinfo->si_buf_offset + window->wd_offset) &
437512f080e7Smrj 		    MMU_PAGEOFFSET;
437612f080e7Smrj 		pcnt = mmu_btopr(window->wd_size + poff);
437712f080e7Smrj 		ASSERT((pidx + pcnt) <= sinfo->si_max_pages);
437812f080e7Smrj 
437912f080e7Smrj 		/* unmap pages which are currently mapped in this window */
438012f080e7Smrj 		for (i = 0; i < pcnt; i++) {
438112f080e7Smrj 			if (dma->dp_pgmap[pidx].pm_mapped) {
438212f080e7Smrj 				hat_unload(kas.a_hat,
438312f080e7Smrj 				    dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE,
438412f080e7Smrj 				    HAT_UNLOAD);
438512f080e7Smrj 				dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
438612f080e7Smrj 			}
438712f080e7Smrj 			pidx++;
438812f080e7Smrj 		}
438912f080e7Smrj 	}
439012f080e7Smrj #endif
439112f080e7Smrj 
439212f080e7Smrj 	/*
439312f080e7Smrj 	 * Move to the new window.
439412f080e7Smrj 	 * NOTE: current_win must be set for sync to work right
439512f080e7Smrj 	 */
439612f080e7Smrj 	dma->dp_current_win = win;
439712f080e7Smrj 	window = &dma->dp_window[win];
439812f080e7Smrj 
439912f080e7Smrj 	/* if needed, adjust the first and/or last cookies for trim */
440012f080e7Smrj 	trim = &window->wd_trim;
440112f080e7Smrj 	if (trim->tr_trim_first) {
4402843e1988Sjohnlev 		window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr;
440312f080e7Smrj 		window->wd_first_cookie->dmac_size = trim->tr_first_size;
440412f080e7Smrj #if !defined(__amd64)
440512f080e7Smrj 		window->wd_first_cookie->dmac_type =
440612f080e7Smrj 		    (window->wd_first_cookie->dmac_type &
440712f080e7Smrj 		    ROOTNEX_USES_COPYBUF) + window->wd_offset;
440812f080e7Smrj #endif
440912f080e7Smrj 		if (trim->tr_first_copybuf_win) {
441012f080e7Smrj 			dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr =
441112f080e7Smrj 			    trim->tr_first_cbaddr;
441212f080e7Smrj #if !defined(__amd64)
441312f080e7Smrj 			dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr =
441412f080e7Smrj 			    trim->tr_first_kaddr;
441512f080e7Smrj #endif
441612f080e7Smrj 		}
441712f080e7Smrj 	}
441812f080e7Smrj 	if (trim->tr_trim_last) {
4419843e1988Sjohnlev 		trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr;
442012f080e7Smrj 		trim->tr_last_cookie->dmac_size = trim->tr_last_size;
442112f080e7Smrj 		if (trim->tr_last_copybuf_win) {
442212f080e7Smrj 			dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr =
442312f080e7Smrj 			    trim->tr_last_cbaddr;
442412f080e7Smrj #if !defined(__amd64)
442512f080e7Smrj 			dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr =
442612f080e7Smrj 			    trim->tr_last_kaddr;
442712f080e7Smrj #endif
442812f080e7Smrj 		}
442912f080e7Smrj 	}
443012f080e7Smrj 
443112f080e7Smrj 	/*
443212f080e7Smrj 	 * setup the cookie pointer to the first cookie in the window. setup
443312f080e7Smrj 	 * our return values, then increment the cookie since we return the
443412f080e7Smrj 	 * first cookie on the stack.
443512f080e7Smrj 	 */
443612f080e7Smrj 	hp->dmai_cookie = window->wd_first_cookie;
443712f080e7Smrj 	*offp = window->wd_offset;
443812f080e7Smrj 	*lenp = window->wd_size;
443912f080e7Smrj 	*ccountp = window->wd_cookie_cnt;
444012f080e7Smrj 	*cookiep = hp->dmai_cookie[0];
444112f080e7Smrj 	hp->dmai_cookie++;
444212f080e7Smrj 
444312f080e7Smrj #if !defined(__amd64)
444412f080e7Smrj 	/* re-map copybuf if required for this window */
444512f080e7Smrj 	if (dma->dp_cb_remaping) {
444612f080e7Smrj 		/*
444712f080e7Smrj 		 * calculate the page index into the buffer where this
444812f080e7Smrj 		 * window starts.
444912f080e7Smrj 		 */
445012f080e7Smrj 		pidx = (sinfo->si_buf_offset + window->wd_offset) >>
445112f080e7Smrj 		    MMU_PAGESHIFT;
445212f080e7Smrj 		ASSERT(pidx < sinfo->si_max_pages);
445312f080e7Smrj 
445412f080e7Smrj 		/*
445512f080e7Smrj 		 * the first page can get unmapped if it's shared with the
445612f080e7Smrj 		 * previous window. Even if the rest of this window is already
445712f080e7Smrj 		 * mapped in, we need to still check this one.
445812f080e7Smrj 		 */
445912f080e7Smrj 		pmap = &dma->dp_pgmap[pidx];
446012f080e7Smrj 		if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) {
446112f080e7Smrj 			if (pmap->pm_pp != NULL) {
446212f080e7Smrj 				pmap->pm_mapped = B_TRUE;
446312f080e7Smrj 				i86_pp_map(pmap->pm_pp, pmap->pm_kaddr);
446412f080e7Smrj 			} else if (pmap->pm_vaddr != NULL) {
446512f080e7Smrj 				pmap->pm_mapped = B_TRUE;
446612f080e7Smrj 				i86_va_map(pmap->pm_vaddr, sinfo->si_asp,
446712f080e7Smrj 				    pmap->pm_kaddr);
446812f080e7Smrj 			}
446912f080e7Smrj 		}
447012f080e7Smrj 		pidx++;
447112f080e7Smrj 
447212f080e7Smrj 		/* map in the rest of the pages if required */
447312f080e7Smrj 		if (window->wd_remap_copybuf) {
447412f080e7Smrj 			window->wd_remap_copybuf = B_FALSE;
447512f080e7Smrj 
447612f080e7Smrj 			/* figure out many pages this window takes up */
447712f080e7Smrj 			poff = (sinfo->si_buf_offset + window->wd_offset) &
447812f080e7Smrj 			    MMU_PAGEOFFSET;
447912f080e7Smrj 			pcnt = mmu_btopr(window->wd_size + poff);
448012f080e7Smrj 			ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages);
448112f080e7Smrj 
448212f080e7Smrj 			/* map pages which require it */
448312f080e7Smrj 			for (i = 1; i < pcnt; i++) {
448412f080e7Smrj 				pmap = &dma->dp_pgmap[pidx];
448512f080e7Smrj 				if (pmap->pm_uses_copybuf) {
448612f080e7Smrj 					ASSERT(pmap->pm_mapped == B_FALSE);
448712f080e7Smrj 					if (pmap->pm_pp != NULL) {
448812f080e7Smrj 						pmap->pm_mapped = B_TRUE;
448912f080e7Smrj 						i86_pp_map(pmap->pm_pp,
449012f080e7Smrj 						    pmap->pm_kaddr);
449112f080e7Smrj 					} else if (pmap->pm_vaddr != NULL) {
449212f080e7Smrj 						pmap->pm_mapped = B_TRUE;
449312f080e7Smrj 						i86_va_map(pmap->pm_vaddr,
449412f080e7Smrj 						    sinfo->si_asp,
449512f080e7Smrj 						    pmap->pm_kaddr);
449612f080e7Smrj 					}
449712f080e7Smrj 				}
449812f080e7Smrj 				pidx++;
449912f080e7Smrj 			}
450012f080e7Smrj 		}
450112f080e7Smrj 	}
450212f080e7Smrj #endif
450312f080e7Smrj 
450412f080e7Smrj 	/* if the new window uses the copy buffer, sync it for the device */
450512f080e7Smrj 	if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) {
450694f1124eSVikram Hegde 		(void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
450712f080e7Smrj 		    DDI_DMA_SYNC_FORDEV);
450812f080e7Smrj 	}
450912f080e7Smrj 
451012f080e7Smrj 	return (DDI_SUCCESS);
451112f080e7Smrj }
451212f080e7Smrj 
451320906b23SVikram Hegde /*
451420906b23SVikram Hegde  * rootnex_dma_win()
451520906b23SVikram Hegde  *    called from ddi_dma_getwin()
451620906b23SVikram Hegde  */
451720906b23SVikram Hegde /*ARGSUSED*/
451820906b23SVikram Hegde static int
451920906b23SVikram Hegde rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
452020906b23SVikram Hegde     uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep,
452120906b23SVikram Hegde     uint_t *ccountp)
452220906b23SVikram Hegde {
452320906b23SVikram Hegde #if !defined(__xpv)
4524*b51bbbf5SVikram Hegde 	if (IOMMU_USED(rdip)) {
452520906b23SVikram Hegde 		return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp,
452620906b23SVikram Hegde 		    cookiep, ccountp));
452720906b23SVikram Hegde 	}
452820906b23SVikram Hegde #endif
452912f080e7Smrj 
453020906b23SVikram Hegde 	return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp,
453120906b23SVikram Hegde 	    cookiep, ccountp));
453220906b23SVikram Hegde }
453312f080e7Smrj 
453412f080e7Smrj /*
453512f080e7Smrj  * ************************
453612f080e7Smrj  *  obsoleted dma routines
453712f080e7Smrj  * ************************
453812f080e7Smrj  */
453912f080e7Smrj 
4540*b51bbbf5SVikram Hegde /*
4541*b51bbbf5SVikram Hegde  * rootnex_dma_map()
4542*b51bbbf5SVikram Hegde  *    called from ddi_dma_setup()
4543*b51bbbf5SVikram Hegde  * NO IOMMU in 32 bit mode. The below routines doesn't work in 64 bit mode.
4544*b51bbbf5SVikram Hegde  */
454512f080e7Smrj /* ARGSUSED */
454612f080e7Smrj static int
4547*b51bbbf5SVikram Hegde rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip,
454820906b23SVikram Hegde     struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep)
454912f080e7Smrj {
455012f080e7Smrj #if defined(__amd64)
455112f080e7Smrj 	/*
455212f080e7Smrj 	 * this interface is not supported in 64-bit x86 kernel. See comment in
455312f080e7Smrj 	 * rootnex_dma_mctl()
455412f080e7Smrj 	 */
455512f080e7Smrj 	return (DDI_DMA_NORESOURCES);
455612f080e7Smrj 
455712f080e7Smrj #else /* 32-bit x86 kernel */
455812f080e7Smrj 	ddi_dma_handle_t *lhandlep;
455912f080e7Smrj 	ddi_dma_handle_t lhandle;
456012f080e7Smrj 	ddi_dma_cookie_t cookie;
456112f080e7Smrj 	ddi_dma_attr_t dma_attr;
456212f080e7Smrj 	ddi_dma_lim_t *dma_lim;
456312f080e7Smrj 	uint_t ccnt;
456412f080e7Smrj 	int e;
456512f080e7Smrj 
456612f080e7Smrj 
456712f080e7Smrj 	/*
456812f080e7Smrj 	 * if the driver is just testing to see if it's possible to do the bind,
456912f080e7Smrj 	 * we'll use local state. Otherwise, use the handle pointer passed in.
457012f080e7Smrj 	 */
457112f080e7Smrj 	if (handlep == NULL) {
457212f080e7Smrj 		lhandlep = &lhandle;
457312f080e7Smrj 	} else {
457412f080e7Smrj 		lhandlep = handlep;
457512f080e7Smrj 	}
457612f080e7Smrj 
457712f080e7Smrj 	/* convert the limit structure to a dma_attr one */
457812f080e7Smrj 	dma_lim = dmareq->dmar_limits;
457912f080e7Smrj 	dma_attr.dma_attr_version = DMA_ATTR_V0;
458012f080e7Smrj 	dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo;
458112f080e7Smrj 	dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi;
458212f080e7Smrj 	dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer;
458312f080e7Smrj 	dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max;
458412f080e7Smrj 	dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max;
458512f080e7Smrj 	dma_attr.dma_attr_granular = dma_lim->dlim_granular;
458612f080e7Smrj 	dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen;
458712f080e7Smrj 	dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize;
458812f080e7Smrj 	dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes;
458912f080e7Smrj 	dma_attr.dma_attr_align = MMU_PAGESIZE;
459012f080e7Smrj 	dma_attr.dma_attr_flags = 0;
459112f080e7Smrj 
459212f080e7Smrj 	e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp,
459312f080e7Smrj 	    dmareq->dmar_arg, lhandlep);
459412f080e7Smrj 	if (e != DDI_SUCCESS) {
459512f080e7Smrj 		return (e);
459612f080e7Smrj 	}
459712f080e7Smrj 
459812f080e7Smrj 	e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt);
459912f080e7Smrj 	if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) {
460012f080e7Smrj 		(void) rootnex_dma_freehdl(dip, rdip, *lhandlep);
460112f080e7Smrj 		return (e);
460212f080e7Smrj 	}
460312f080e7Smrj 
460412f080e7Smrj 	/*
460512f080e7Smrj 	 * if the driver is just testing to see if it's possible to do the bind,
460612f080e7Smrj 	 * free up the local state and return the result.
460712f080e7Smrj 	 */
460812f080e7Smrj 	if (handlep == NULL) {
460912f080e7Smrj 		(void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep);
461012f080e7Smrj 		(void) rootnex_dma_freehdl(dip, rdip, *lhandlep);
461112f080e7Smrj 		if (e == DDI_DMA_MAPPED) {
461212f080e7Smrj 			return (DDI_DMA_MAPOK);
461312f080e7Smrj 		} else {
461412f080e7Smrj 			return (DDI_DMA_NOMAPPING);
461512f080e7Smrj 		}
461612f080e7Smrj 	}
461712f080e7Smrj 
461812f080e7Smrj 	return (e);
461912f080e7Smrj #endif /* defined(__amd64) */
462012f080e7Smrj }
462112f080e7Smrj 
462220906b23SVikram Hegde /*
462312f080e7Smrj  * rootnex_dma_mctl()
462412f080e7Smrj  *
4625*b51bbbf5SVikram Hegde  * No IOMMU in 32 bit mode. The below routine doesn't work in 64 bit mode.
462612f080e7Smrj  */
462712f080e7Smrj /* ARGSUSED */
462812f080e7Smrj static int
4629*b51bbbf5SVikram Hegde rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
463012f080e7Smrj     enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp,
463112f080e7Smrj     uint_t cache_flags)
463212f080e7Smrj {
463312f080e7Smrj #if defined(__amd64)
463412f080e7Smrj 	/*
463512f080e7Smrj 	 * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a
463612f080e7Smrj 	 * common implementation in genunix, so they no longer have x86
463712f080e7Smrj 	 * specific functionality which called into dma_ctl.
463812f080e7Smrj 	 *
463912f080e7Smrj 	 * The rest of the obsoleted interfaces were never supported in the
464012f080e7Smrj 	 * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface
464112f080e7Smrj 	 * was not ported to the x86 64-bit kernel do to serious x86 rootnex
464212f080e7Smrj 	 * implementation issues.
464312f080e7Smrj 	 *
464412f080e7Smrj 	 * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and
464512f080e7Smrj 	 * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we
464612f080e7Smrj 	 * reflect that now too...
464712f080e7Smrj 	 *
464812f080e7Smrj 	 * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are
464912f080e7Smrj 	 * not going to put this functionality into the 64-bit x86 kernel now.
465012f080e7Smrj 	 * It wasn't ported to the 64-bit kernel for s10, no reason to change
465112f080e7Smrj 	 * that in a future release.
465212f080e7Smrj 	 */
465312f080e7Smrj 	return (DDI_FAILURE);
465412f080e7Smrj 
465512f080e7Smrj #else /* 32-bit x86 kernel */
465612f080e7Smrj 	ddi_dma_cookie_t lcookie;
465712f080e7Smrj 	ddi_dma_cookie_t *cookie;
465812f080e7Smrj 	rootnex_window_t *window;
465912f080e7Smrj 	ddi_dma_impl_t *hp;
466012f080e7Smrj 	rootnex_dma_t *dma;
466112f080e7Smrj 	uint_t nwin;
466212f080e7Smrj 	uint_t ccnt;
466312f080e7Smrj 	size_t len;
466412f080e7Smrj 	off_t off;
466512f080e7Smrj 	int e;
466612f080e7Smrj 
466712f080e7Smrj 
466812f080e7Smrj 	/*
466912f080e7Smrj 	 * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little
467012f080e7Smrj 	 * hacky since were optimizing for the current interfaces and so we can
467112f080e7Smrj 	 * cleanup the mess in genunix. Hopefully we will remove the this
467212f080e7Smrj 	 * obsoleted routines someday soon.
467312f080e7Smrj 	 */
467412f080e7Smrj 
467512f080e7Smrj 	switch (request) {
467612f080e7Smrj 
467712f080e7Smrj 	case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */
467812f080e7Smrj 		hp = (ddi_dma_impl_t *)handle;
467912f080e7Smrj 		cookie = (ddi_dma_cookie_t *)objpp;
468012f080e7Smrj 
468112f080e7Smrj 		/*
468212f080e7Smrj 		 * convert segment to cookie. We don't distinguish between the
468312f080e7Smrj 		 * two :-)
468412f080e7Smrj 		 */
468512f080e7Smrj 		*cookie = *hp->dmai_cookie;
468612f080e7Smrj 		*lenp = cookie->dmac_size;
468712f080e7Smrj 		*offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF;
468812f080e7Smrj 		return (DDI_SUCCESS);
468912f080e7Smrj 
469012f080e7Smrj 	case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */
469112f080e7Smrj 		hp = (ddi_dma_impl_t *)handle;
469212f080e7Smrj 		dma = (rootnex_dma_t *)hp->dmai_private;
469312f080e7Smrj 
469412f080e7Smrj 		if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) {
469512f080e7Smrj 			return (DDI_DMA_STALE);
469612f080e7Smrj 		}
469712f080e7Smrj 
469812f080e7Smrj 		/* handle the case where we don't have any windows */
469912f080e7Smrj 		if (dma->dp_window == NULL) {
470012f080e7Smrj 			/*
470112f080e7Smrj 			 * if seg == NULL, and we don't have any windows,
470212f080e7Smrj 			 * return the first cookie in the sgl.
470312f080e7Smrj 			 */
470412f080e7Smrj 			if (*lenp == NULL) {
470512f080e7Smrj 				dma->dp_current_cookie = 0;
470612f080e7Smrj 				hp->dmai_cookie = dma->dp_cookies;
470712f080e7Smrj 				*objpp = (caddr_t)handle;
470812f080e7Smrj 				return (DDI_SUCCESS);
470912f080e7Smrj 
471012f080e7Smrj 			/* if we have more cookies, go to the next cookie */
471112f080e7Smrj 			} else {
471212f080e7Smrj 				if ((dma->dp_current_cookie + 1) >=
471312f080e7Smrj 				    dma->dp_sglinfo.si_sgl_size) {
471412f080e7Smrj 					return (DDI_DMA_DONE);
471512f080e7Smrj 				}
471612f080e7Smrj 				dma->dp_current_cookie++;
471712f080e7Smrj 				hp->dmai_cookie++;
471812f080e7Smrj 				return (DDI_SUCCESS);
471912f080e7Smrj 			}
472012f080e7Smrj 		}
472112f080e7Smrj 
472212f080e7Smrj 		/* We have one or more windows */
472312f080e7Smrj 		window = &dma->dp_window[dma->dp_current_win];
472412f080e7Smrj 
472512f080e7Smrj 		/*
472612f080e7Smrj 		 * if seg == NULL, return the first cookie in the current
472712f080e7Smrj 		 * window
472812f080e7Smrj 		 */
472912f080e7Smrj 		if (*lenp == NULL) {
473012f080e7Smrj 			dma->dp_current_cookie = 0;
4731cf4e9a1dSmrj 			hp->dmai_cookie = window->wd_first_cookie;
473212f080e7Smrj 
473312f080e7Smrj 		/*
473412f080e7Smrj 		 * go to the next cookie in the window then see if we done with
473512f080e7Smrj 		 * this window.
473612f080e7Smrj 		 */
473712f080e7Smrj 		} else {
473812f080e7Smrj 			if ((dma->dp_current_cookie + 1) >=
473912f080e7Smrj 			    window->wd_cookie_cnt) {
474012f080e7Smrj 				return (DDI_DMA_DONE);
474112f080e7Smrj 			}
474212f080e7Smrj 			dma->dp_current_cookie++;
474312f080e7Smrj 			hp->dmai_cookie++;
474412f080e7Smrj 		}
474512f080e7Smrj 		*objpp = (caddr_t)handle;
474612f080e7Smrj 		return (DDI_SUCCESS);
474712f080e7Smrj 
474812f080e7Smrj 	case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */
474912f080e7Smrj 		hp = (ddi_dma_impl_t *)handle;
475012f080e7Smrj 		dma = (rootnex_dma_t *)hp->dmai_private;
475112f080e7Smrj 
475212f080e7Smrj 		if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) {
475312f080e7Smrj 			return (DDI_DMA_STALE);
475412f080e7Smrj 		}
475512f080e7Smrj 
475612f080e7Smrj 		/* if win == NULL, return the first window in the bind */
475712f080e7Smrj 		if (*offp == NULL) {
475812f080e7Smrj 			nwin = 0;
475912f080e7Smrj 
476012f080e7Smrj 		/*
476112f080e7Smrj 		 * else, go to the next window then see if we're done with all
476212f080e7Smrj 		 * the windows.
476312f080e7Smrj 		 */
476412f080e7Smrj 		} else {
476512f080e7Smrj 			nwin = dma->dp_current_win + 1;
476612f080e7Smrj 			if (nwin >= hp->dmai_nwin) {
476712f080e7Smrj 				return (DDI_DMA_DONE);
476812f080e7Smrj 			}
476912f080e7Smrj 		}
477012f080e7Smrj 
477112f080e7Smrj 		/* switch to the next window */
477212f080e7Smrj 		e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len,
477312f080e7Smrj 		    &lcookie, &ccnt);
477412f080e7Smrj 		ASSERT(e == DDI_SUCCESS);
477512f080e7Smrj 		if (e != DDI_SUCCESS) {
477612f080e7Smrj 			return (DDI_DMA_STALE);
477712f080e7Smrj 		}
477812f080e7Smrj 
477912f080e7Smrj 		/* reset the cookie back to the first cookie in the window */
478012f080e7Smrj 		if (dma->dp_window != NULL) {
478112f080e7Smrj 			window = &dma->dp_window[dma->dp_current_win];
478212f080e7Smrj 			hp->dmai_cookie = window->wd_first_cookie;
478312f080e7Smrj 		} else {
478412f080e7Smrj 			hp->dmai_cookie = dma->dp_cookies;
478512f080e7Smrj 		}
478612f080e7Smrj 
478712f080e7Smrj 		*objpp = (caddr_t)handle;
478812f080e7Smrj 		return (DDI_SUCCESS);
478912f080e7Smrj 
479012f080e7Smrj 	case DDI_DMA_FREE: /* ddi_dma_free() */
479112f080e7Smrj 		(void) rootnex_dma_unbindhdl(dip, rdip, handle);
479212f080e7Smrj 		(void) rootnex_dma_freehdl(dip, rdip, handle);
479312f080e7Smrj 		if (rootnex_state->r_dvma_call_list_id) {
479412f080e7Smrj 			ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
479512f080e7Smrj 		}
479612f080e7Smrj 		return (DDI_SUCCESS);
479712f080e7Smrj 
479812f080e7Smrj 	case DDI_DMA_IOPB_ALLOC:	/* get contiguous DMA-able memory */
479912f080e7Smrj 	case DDI_DMA_SMEM_ALLOC:	/* get contiguous DMA-able memory */
480012f080e7Smrj 		/* should never get here, handled in genunix */
480112f080e7Smrj 		ASSERT(0);
480212f080e7Smrj 		return (DDI_FAILURE);
480312f080e7Smrj 
480412f080e7Smrj 	case DDI_DMA_KVADDR:
480512f080e7Smrj 	case DDI_DMA_GETERR:
480612f080e7Smrj 	case DDI_DMA_COFF:
480712f080e7Smrj 		return (DDI_FAILURE);
480812f080e7Smrj 	}
480912f080e7Smrj 
481012f080e7Smrj 	return (DDI_FAILURE);
481112f080e7Smrj #endif /* defined(__amd64) */
48127c478bd9Sstevel@tonic-gate }
48137aec1d6eScindi 
481420906b23SVikram Hegde /*
481500d0963fSdilpreet  * *********
481600d0963fSdilpreet  *  FMA Code
481700d0963fSdilpreet  * *********
481800d0963fSdilpreet  */
481900d0963fSdilpreet 
482000d0963fSdilpreet /*
482100d0963fSdilpreet  * rootnex_fm_init()
482200d0963fSdilpreet  *    FMA init busop
482300d0963fSdilpreet  */
48247aec1d6eScindi /* ARGSUSED */
48257aec1d6eScindi static int
482600d0963fSdilpreet rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap,
482700d0963fSdilpreet     ddi_iblock_cookie_t *ibc)
48287aec1d6eScindi {
482900d0963fSdilpreet 	*ibc = rootnex_state->r_err_ibc;
483000d0963fSdilpreet 
483100d0963fSdilpreet 	return (ddi_system_fmcap);
483200d0963fSdilpreet }
483300d0963fSdilpreet 
483400d0963fSdilpreet /*
483500d0963fSdilpreet  * rootnex_dma_check()
483600d0963fSdilpreet  *    Function called after a dma fault occurred to find out whether the
483700d0963fSdilpreet  *    fault address is associated with a driver that is able to handle faults
483800d0963fSdilpreet  *    and recover from faults.
483900d0963fSdilpreet  */
484000d0963fSdilpreet /* ARGSUSED */
484100d0963fSdilpreet static int
484200d0963fSdilpreet rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr,
484300d0963fSdilpreet     const void *not_used)
484400d0963fSdilpreet {
484500d0963fSdilpreet 	rootnex_window_t *window;
484600d0963fSdilpreet 	uint64_t start_addr;
484700d0963fSdilpreet 	uint64_t fault_addr;
484800d0963fSdilpreet 	ddi_dma_impl_t *hp;
484900d0963fSdilpreet 	rootnex_dma_t *dma;
485000d0963fSdilpreet 	uint64_t end_addr;
485100d0963fSdilpreet 	size_t csize;
485200d0963fSdilpreet 	int i;
485300d0963fSdilpreet 	int j;
485400d0963fSdilpreet 
485500d0963fSdilpreet 
485600d0963fSdilpreet 	/* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */
485700d0963fSdilpreet 	hp = (ddi_dma_impl_t *)handle;
485800d0963fSdilpreet 	ASSERT(hp);
485900d0963fSdilpreet 
486000d0963fSdilpreet 	dma = (rootnex_dma_t *)hp->dmai_private;
486100d0963fSdilpreet 
486200d0963fSdilpreet 	/* Get the address that we need to search for */
486300d0963fSdilpreet 	fault_addr = *(uint64_t *)addr;
486400d0963fSdilpreet 
486500d0963fSdilpreet 	/*
486600d0963fSdilpreet 	 * if we don't have any windows, we can just walk through all the
486700d0963fSdilpreet 	 * cookies.
486800d0963fSdilpreet 	 */
486900d0963fSdilpreet 	if (dma->dp_window == NULL) {
487000d0963fSdilpreet 		/* for each cookie */
487100d0963fSdilpreet 		for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) {
487200d0963fSdilpreet 			/*
487300d0963fSdilpreet 			 * if the faulted address is within the physical address
487400d0963fSdilpreet 			 * range of the cookie, return DDI_FM_NONFATAL.
487500d0963fSdilpreet 			 */
487600d0963fSdilpreet 			if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) &&
487700d0963fSdilpreet 			    (fault_addr <= (dma->dp_cookies[i].dmac_laddress +
487800d0963fSdilpreet 			    dma->dp_cookies[i].dmac_size))) {
487900d0963fSdilpreet 				return (DDI_FM_NONFATAL);
488000d0963fSdilpreet 			}
488100d0963fSdilpreet 		}
488200d0963fSdilpreet 
488300d0963fSdilpreet 		/* fault_addr not within this DMA handle */
488400d0963fSdilpreet 		return (DDI_FM_UNKNOWN);
488500d0963fSdilpreet 	}
488600d0963fSdilpreet 
488700d0963fSdilpreet 	/* we have mutiple windows, walk through each window */
488800d0963fSdilpreet 	for (i = 0; i < hp->dmai_nwin; i++) {
488900d0963fSdilpreet 		window = &dma->dp_window[i];
489000d0963fSdilpreet 
489100d0963fSdilpreet 		/* Go through all the cookies in the window */
489200d0963fSdilpreet 		for (j = 0; j < window->wd_cookie_cnt; j++) {
489300d0963fSdilpreet 
489400d0963fSdilpreet 			start_addr = window->wd_first_cookie[j].dmac_laddress;
489500d0963fSdilpreet 			csize = window->wd_first_cookie[j].dmac_size;
489600d0963fSdilpreet 
489700d0963fSdilpreet 			/*
489800d0963fSdilpreet 			 * if we are trimming the first cookie in the window,
489900d0963fSdilpreet 			 * and this is the first cookie, adjust the start
490000d0963fSdilpreet 			 * address and size of the cookie to account for the
490100d0963fSdilpreet 			 * trim.
490200d0963fSdilpreet 			 */
490300d0963fSdilpreet 			if (window->wd_trim.tr_trim_first && (j == 0)) {
490400d0963fSdilpreet 				start_addr = window->wd_trim.tr_first_paddr;
490500d0963fSdilpreet 				csize = window->wd_trim.tr_first_size;
490600d0963fSdilpreet 			}
490700d0963fSdilpreet 
490800d0963fSdilpreet 			/*
490900d0963fSdilpreet 			 * if we are trimming the last cookie in the window,
491000d0963fSdilpreet 			 * and this is the last cookie, adjust the start
491100d0963fSdilpreet 			 * address and size of the cookie to account for the
491200d0963fSdilpreet 			 * trim.
491300d0963fSdilpreet 			 */
491400d0963fSdilpreet 			if (window->wd_trim.tr_trim_last &&
491500d0963fSdilpreet 			    (j == (window->wd_cookie_cnt - 1))) {
491600d0963fSdilpreet 				start_addr = window->wd_trim.tr_last_paddr;
491700d0963fSdilpreet 				csize = window->wd_trim.tr_last_size;
491800d0963fSdilpreet 			}
491900d0963fSdilpreet 
492000d0963fSdilpreet 			end_addr = start_addr + csize;
492100d0963fSdilpreet 
492200d0963fSdilpreet 			/*
492300d0963fSdilpreet 			 * if the faulted address is within the physical address
492400d0963fSdilpreet 			 * range of the cookie, return DDI_FM_NONFATAL.
492500d0963fSdilpreet 			 */
492600d0963fSdilpreet 			if ((fault_addr >= start_addr) &&
492700d0963fSdilpreet 			    (fault_addr <= end_addr)) {
492800d0963fSdilpreet 				return (DDI_FM_NONFATAL);
492900d0963fSdilpreet 			}
493000d0963fSdilpreet 		}
493100d0963fSdilpreet 	}
493200d0963fSdilpreet 
493300d0963fSdilpreet 	/* fault_addr not within this DMA handle */
493400d0963fSdilpreet 	return (DDI_FM_UNKNOWN);
49357aec1d6eScindi }
4936