17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 500d0963fSdilpreet * Common Development and Distribution License (the "License"). 600d0963fSdilpreet * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 217c478bd9Sstevel@tonic-gate /* 2286a9c507SGuoli Shu * Copyright 2010 Sun Microsystems, Inc. All rights reserved. 237c478bd9Sstevel@tonic-gate * Use is subject to license terms. 247c478bd9Sstevel@tonic-gate */ 257c478bd9Sstevel@tonic-gate 267c478bd9Sstevel@tonic-gate /* 2712f080e7Smrj * x86 root nexus driver 287c478bd9Sstevel@tonic-gate */ 297c478bd9Sstevel@tonic-gate 307c478bd9Sstevel@tonic-gate #include <sys/sysmacros.h> 317c478bd9Sstevel@tonic-gate #include <sys/conf.h> 327c478bd9Sstevel@tonic-gate #include <sys/autoconf.h> 337c478bd9Sstevel@tonic-gate #include <sys/sysmacros.h> 347c478bd9Sstevel@tonic-gate #include <sys/debug.h> 357c478bd9Sstevel@tonic-gate #include <sys/psw.h> 367c478bd9Sstevel@tonic-gate #include <sys/ddidmareq.h> 377c478bd9Sstevel@tonic-gate #include <sys/promif.h> 387c478bd9Sstevel@tonic-gate #include <sys/devops.h> 397c478bd9Sstevel@tonic-gate #include <sys/kmem.h> 407c478bd9Sstevel@tonic-gate #include <sys/cmn_err.h> 417c478bd9Sstevel@tonic-gate #include <vm/seg.h> 427c478bd9Sstevel@tonic-gate #include <vm/seg_kmem.h> 437c478bd9Sstevel@tonic-gate #include <vm/seg_dev.h> 447c478bd9Sstevel@tonic-gate #include <sys/vmem.h> 457c478bd9Sstevel@tonic-gate #include <sys/mman.h> 467c478bd9Sstevel@tonic-gate #include <vm/hat.h> 477c478bd9Sstevel@tonic-gate #include <vm/as.h> 487c478bd9Sstevel@tonic-gate #include <vm/page.h> 497c478bd9Sstevel@tonic-gate #include <sys/avintr.h> 507c478bd9Sstevel@tonic-gate #include <sys/errno.h> 517c478bd9Sstevel@tonic-gate #include <sys/modctl.h> 527c478bd9Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 537c478bd9Sstevel@tonic-gate #include <sys/sunddi.h> 547c478bd9Sstevel@tonic-gate #include <sys/sunndi.h> 557a364d25Sschwartz #include <sys/mach_intr.h> 567c478bd9Sstevel@tonic-gate #include <sys/psm.h> 577c478bd9Sstevel@tonic-gate #include <sys/ontrap.h> 5812f080e7Smrj #include <sys/atomic.h> 5912f080e7Smrj #include <sys/sdt.h> 6012f080e7Smrj #include <sys/rootnex.h> 6112f080e7Smrj #include <vm/hat_i86.h> 6200d0963fSdilpreet #include <sys/ddifm.h> 6336945f79Smrj #include <sys/ddi_isa.h> 647c478bd9Sstevel@tonic-gate 65843e1988Sjohnlev #ifdef __xpv 66843e1988Sjohnlev #include <sys/bootinfo.h> 67843e1988Sjohnlev #include <sys/hypervisor.h> 68843e1988Sjohnlev #include <sys/bootconf.h> 69843e1988Sjohnlev #include <vm/kboot_mmu.h> 70*3a634bfcSVikram Hegde #endif 71*3a634bfcSVikram Hegde 72*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 73*3a634bfcSVikram Hegde #include <sys/immu.h> 74843e1988Sjohnlev #endif 75843e1988Sjohnlev 7686c1f4dcSVikram Hegde 7712f080e7Smrj /* 7812f080e7Smrj * enable/disable extra checking of function parameters. Useful for debugging 7912f080e7Smrj * drivers. 8012f080e7Smrj */ 8112f080e7Smrj #ifdef DEBUG 8212f080e7Smrj int rootnex_alloc_check_parms = 1; 8312f080e7Smrj int rootnex_bind_check_parms = 1; 8412f080e7Smrj int rootnex_bind_check_inuse = 1; 8512f080e7Smrj int rootnex_unbind_verify_buffer = 0; 8612f080e7Smrj int rootnex_sync_check_parms = 1; 8712f080e7Smrj #else 8812f080e7Smrj int rootnex_alloc_check_parms = 0; 8912f080e7Smrj int rootnex_bind_check_parms = 0; 9012f080e7Smrj int rootnex_bind_check_inuse = 0; 9112f080e7Smrj int rootnex_unbind_verify_buffer = 0; 9212f080e7Smrj int rootnex_sync_check_parms = 0; 9312f080e7Smrj #endif 947c478bd9Sstevel@tonic-gate 95*3a634bfcSVikram Hegde boolean_t rootnex_dmar_not_setup; 96*3a634bfcSVikram Hegde 977aec1d6eScindi /* Master Abort and Target Abort panic flag */ 987aec1d6eScindi int rootnex_fm_ma_ta_panic_flag = 0; 997aec1d6eScindi 10012f080e7Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 1017c478bd9Sstevel@tonic-gate int rootnex_bind_fail = 1; 1027c478bd9Sstevel@tonic-gate int rootnex_bind_warn = 1; 1037c478bd9Sstevel@tonic-gate uint8_t *rootnex_warn_list; 1047c478bd9Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 1057c478bd9Sstevel@tonic-gate #define ROOTNEX_BIND_WARNING (0x1 << 0) 1067c478bd9Sstevel@tonic-gate 1077c478bd9Sstevel@tonic-gate /* 10812f080e7Smrj * revert back to old broken behavior of always sync'ing entire copy buffer. 10912f080e7Smrj * This is useful if be have a buggy driver which doesn't correctly pass in 11012f080e7Smrj * the offset and size into ddi_dma_sync(). 1117c478bd9Sstevel@tonic-gate */ 11212f080e7Smrj int rootnex_sync_ignore_params = 0; 1137c478bd9Sstevel@tonic-gate 1147c478bd9Sstevel@tonic-gate /* 11512f080e7Smrj * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 11612f080e7Smrj * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 11712f080e7Smrj * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 11812f080e7Smrj * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 11912f080e7Smrj * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 12012f080e7Smrj * (< 8K). We will still need to allocate the copy buffer during bind though 12112f080e7Smrj * (if we need one). These can only be modified in /etc/system before rootnex 12212f080e7Smrj * attach. 1237c478bd9Sstevel@tonic-gate */ 12412f080e7Smrj #if defined(__amd64) 12512f080e7Smrj int rootnex_prealloc_cookies = 65; 12612f080e7Smrj int rootnex_prealloc_windows = 4; 12712f080e7Smrj int rootnex_prealloc_copybuf = 2; 12812f080e7Smrj #else 12912f080e7Smrj int rootnex_prealloc_cookies = 33; 13012f080e7Smrj int rootnex_prealloc_windows = 4; 13112f080e7Smrj int rootnex_prealloc_copybuf = 2; 13212f080e7Smrj #endif 1337c478bd9Sstevel@tonic-gate 13412f080e7Smrj /* driver global state */ 13512f080e7Smrj static rootnex_state_t *rootnex_state; 13612f080e7Smrj 13712f080e7Smrj /* shortcut to rootnex counters */ 13812f080e7Smrj static uint64_t *rootnex_cnt; 1397c478bd9Sstevel@tonic-gate 1407c478bd9Sstevel@tonic-gate /* 14112f080e7Smrj * XXX - does x86 even need these or are they left over from the SPARC days? 1427c478bd9Sstevel@tonic-gate */ 14312f080e7Smrj /* statically defined integer/boolean properties for the root node */ 14412f080e7Smrj static rootnex_intprop_t rootnex_intprp[] = { 14512f080e7Smrj { "PAGESIZE", PAGESIZE }, 14612f080e7Smrj { "MMU_PAGESIZE", MMU_PAGESIZE }, 14712f080e7Smrj { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 14812f080e7Smrj { DDI_RELATIVE_ADDRESSING, 1 }, 14912f080e7Smrj }; 15012f080e7Smrj #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 1517c478bd9Sstevel@tonic-gate 152843e1988Sjohnlev #ifdef __xpv 153843e1988Sjohnlev typedef maddr_t rootnex_addr_t; 154843e1988Sjohnlev #define ROOTNEX_PADDR_TO_RBASE(xinfo, pa) \ 155843e1988Sjohnlev (DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa)) 156843e1988Sjohnlev #else 157843e1988Sjohnlev typedef paddr_t rootnex_addr_t; 158843e1988Sjohnlev #endif 159843e1988Sjohnlev 16020906b23SVikram Hegde #if !defined(__xpv) 1617e301000SVikram Hegde char _depends_on[] = "mach/pcplusmp misc/iommulib misc/acpica"; 16220906b23SVikram Hegde #endif 1637c478bd9Sstevel@tonic-gate 16412f080e7Smrj static struct cb_ops rootnex_cb_ops = { 16512f080e7Smrj nodev, /* open */ 16612f080e7Smrj nodev, /* close */ 16712f080e7Smrj nodev, /* strategy */ 16812f080e7Smrj nodev, /* print */ 16912f080e7Smrj nodev, /* dump */ 17012f080e7Smrj nodev, /* read */ 17112f080e7Smrj nodev, /* write */ 17212f080e7Smrj nodev, /* ioctl */ 17312f080e7Smrj nodev, /* devmap */ 17412f080e7Smrj nodev, /* mmap */ 17512f080e7Smrj nodev, /* segmap */ 17612f080e7Smrj nochpoll, /* chpoll */ 17712f080e7Smrj ddi_prop_op, /* cb_prop_op */ 17812f080e7Smrj NULL, /* struct streamtab */ 17912f080e7Smrj D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 18012f080e7Smrj CB_REV, /* Rev */ 18112f080e7Smrj nodev, /* cb_aread */ 18212f080e7Smrj nodev /* cb_awrite */ 18312f080e7Smrj }; 1847c478bd9Sstevel@tonic-gate 18512f080e7Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 1867c478bd9Sstevel@tonic-gate off_t offset, off_t len, caddr_t *vaddrp); 18712f080e7Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 1887c478bd9Sstevel@tonic-gate struct hat *hat, struct seg *seg, caddr_t addr, 1897c478bd9Sstevel@tonic-gate struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 19012f080e7Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 1917c478bd9Sstevel@tonic-gate struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 19212f080e7Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 19312f080e7Smrj ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 19412f080e7Smrj ddi_dma_handle_t *handlep); 19512f080e7Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 19612f080e7Smrj ddi_dma_handle_t handle); 19712f080e7Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 19812f080e7Smrj ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 19912f080e7Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 20012f080e7Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 20112f080e7Smrj ddi_dma_handle_t handle); 20212f080e7Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 20312f080e7Smrj ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 20412f080e7Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 20512f080e7Smrj ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 20612f080e7Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 20712f080e7Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 2087c478bd9Sstevel@tonic-gate ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 2097c478bd9Sstevel@tonic-gate off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 21012f080e7Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 21112f080e7Smrj ddi_ctl_enum_t ctlop, void *arg, void *result); 21200d0963fSdilpreet static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 21300d0963fSdilpreet ddi_iblock_cookie_t *ibc); 21412f080e7Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 21512f080e7Smrj ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 2167c478bd9Sstevel@tonic-gate 21720906b23SVikram Hegde static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 21820906b23SVikram Hegde ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 21920906b23SVikram Hegde ddi_dma_handle_t *handlep); 22020906b23SVikram Hegde static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 22120906b23SVikram Hegde ddi_dma_handle_t handle); 22220906b23SVikram Hegde static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 22320906b23SVikram Hegde ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 22420906b23SVikram Hegde ddi_dma_cookie_t *cookiep, uint_t *ccountp); 22520906b23SVikram Hegde static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 22620906b23SVikram Hegde ddi_dma_handle_t handle); 227*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 22820906b23SVikram Hegde static void rootnex_coredma_reset_cookies(dev_info_t *dip, 22920906b23SVikram Hegde ddi_dma_handle_t handle); 23020906b23SVikram Hegde static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 23194f1124eSVikram Hegde ddi_dma_cookie_t **cookiepp, uint_t *ccountp); 23294f1124eSVikram Hegde static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 23394f1124eSVikram Hegde ddi_dma_cookie_t *cookiep, uint_t ccount); 23494f1124eSVikram Hegde static int rootnex_coredma_clear_cookies(dev_info_t *dip, 23594f1124eSVikram Hegde ddi_dma_handle_t handle); 23694f1124eSVikram Hegde static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle); 2375dfdb46bSVikram Hegde #endif 23820906b23SVikram Hegde static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, 23920906b23SVikram Hegde ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 24020906b23SVikram Hegde static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, 24120906b23SVikram Hegde ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 24220906b23SVikram Hegde ddi_dma_cookie_t *cookiep, uint_t *ccountp); 2437c478bd9Sstevel@tonic-gate 2447c478bd9Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = { 2457c478bd9Sstevel@tonic-gate BUSO_REV, 2467c478bd9Sstevel@tonic-gate rootnex_map, 2477c478bd9Sstevel@tonic-gate NULL, 2487c478bd9Sstevel@tonic-gate NULL, 2497c478bd9Sstevel@tonic-gate NULL, 2507c478bd9Sstevel@tonic-gate rootnex_map_fault, 2517c478bd9Sstevel@tonic-gate rootnex_dma_map, 2527c478bd9Sstevel@tonic-gate rootnex_dma_allochdl, 2537c478bd9Sstevel@tonic-gate rootnex_dma_freehdl, 2547c478bd9Sstevel@tonic-gate rootnex_dma_bindhdl, 2557c478bd9Sstevel@tonic-gate rootnex_dma_unbindhdl, 25612f080e7Smrj rootnex_dma_sync, 2577c478bd9Sstevel@tonic-gate rootnex_dma_win, 2587c478bd9Sstevel@tonic-gate rootnex_dma_mctl, 2597c478bd9Sstevel@tonic-gate rootnex_ctlops, 2607c478bd9Sstevel@tonic-gate ddi_bus_prop_op, 2617c478bd9Sstevel@tonic-gate i_ddi_rootnex_get_eventcookie, 2627c478bd9Sstevel@tonic-gate i_ddi_rootnex_add_eventcall, 2637c478bd9Sstevel@tonic-gate i_ddi_rootnex_remove_eventcall, 2647c478bd9Sstevel@tonic-gate i_ddi_rootnex_post_event, 2657c478bd9Sstevel@tonic-gate 0, /* bus_intr_ctl */ 2667c478bd9Sstevel@tonic-gate 0, /* bus_config */ 2677c478bd9Sstevel@tonic-gate 0, /* bus_unconfig */ 26800d0963fSdilpreet rootnex_fm_init, /* bus_fm_init */ 2697c478bd9Sstevel@tonic-gate NULL, /* bus_fm_fini */ 2707c478bd9Sstevel@tonic-gate NULL, /* bus_fm_access_enter */ 2717c478bd9Sstevel@tonic-gate NULL, /* bus_fm_access_exit */ 2727c478bd9Sstevel@tonic-gate NULL, /* bus_powr */ 2737c478bd9Sstevel@tonic-gate rootnex_intr_ops /* bus_intr_op */ 2747c478bd9Sstevel@tonic-gate }; 2757c478bd9Sstevel@tonic-gate 27612f080e7Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 27712f080e7Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 278*3a634bfcSVikram Hegde static int rootnex_quiesce(dev_info_t *dip); 2797c478bd9Sstevel@tonic-gate 2807c478bd9Sstevel@tonic-gate static struct dev_ops rootnex_ops = { 2817c478bd9Sstevel@tonic-gate DEVO_REV, 28212f080e7Smrj 0, 28312f080e7Smrj ddi_no_info, 2847c478bd9Sstevel@tonic-gate nulldev, 28512f080e7Smrj nulldev, 2867c478bd9Sstevel@tonic-gate rootnex_attach, 28712f080e7Smrj rootnex_detach, 28812f080e7Smrj nulldev, 28912f080e7Smrj &rootnex_cb_ops, 29019397407SSherry Moore &rootnex_bus_ops, 29119397407SSherry Moore NULL, 292*3a634bfcSVikram Hegde rootnex_quiesce, /* quiesce */ 2937c478bd9Sstevel@tonic-gate }; 2947c478bd9Sstevel@tonic-gate 29512f080e7Smrj static struct modldrv rootnex_modldrv = { 29612f080e7Smrj &mod_driverops, 297613b2871SRichard Bean "i86pc root nexus", 29812f080e7Smrj &rootnex_ops 2997c478bd9Sstevel@tonic-gate }; 3007c478bd9Sstevel@tonic-gate 30112f080e7Smrj static struct modlinkage rootnex_modlinkage = { 30212f080e7Smrj MODREV_1, 30312f080e7Smrj (void *)&rootnex_modldrv, 30412f080e7Smrj NULL 3057c478bd9Sstevel@tonic-gate }; 3067c478bd9Sstevel@tonic-gate 307*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 30820906b23SVikram Hegde static iommulib_nexops_t iommulib_nexops = { 30920906b23SVikram Hegde IOMMU_NEXOPS_VERSION, 31020906b23SVikram Hegde "Rootnex IOMMU ops Vers 1.1", 31120906b23SVikram Hegde NULL, 31220906b23SVikram Hegde rootnex_coredma_allochdl, 31320906b23SVikram Hegde rootnex_coredma_freehdl, 31420906b23SVikram Hegde rootnex_coredma_bindhdl, 31520906b23SVikram Hegde rootnex_coredma_unbindhdl, 31620906b23SVikram Hegde rootnex_coredma_reset_cookies, 31720906b23SVikram Hegde rootnex_coredma_get_cookies, 31894f1124eSVikram Hegde rootnex_coredma_set_cookies, 31994f1124eSVikram Hegde rootnex_coredma_clear_cookies, 32094f1124eSVikram Hegde rootnex_coredma_get_sleep_flags, 32120906b23SVikram Hegde rootnex_coredma_sync, 32220906b23SVikram Hegde rootnex_coredma_win, 323b51bbbf5SVikram Hegde rootnex_dma_map, 324b51bbbf5SVikram Hegde rootnex_dma_mctl 32520906b23SVikram Hegde }; 3265dfdb46bSVikram Hegde #endif 3277c478bd9Sstevel@tonic-gate 32812f080e7Smrj /* 32912f080e7Smrj * extern hacks 33012f080e7Smrj */ 33112f080e7Smrj extern struct seg_ops segdev_ops; 33212f080e7Smrj extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 33312f080e7Smrj #ifdef DDI_MAP_DEBUG 33412f080e7Smrj extern int ddi_map_debug_flag; 33512f080e7Smrj #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 33612f080e7Smrj #endif 33712f080e7Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr); 33812f080e7Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 33912f080e7Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 34012f080e7Smrj psm_intr_op_t, int *); 34112f080e7Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 34212f080e7Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 34336945f79Smrj 34412f080e7Smrj /* 34512f080e7Smrj * Use device arena to use for device control register mappings. 34612f080e7Smrj * Various kernel memory walkers (debugger, dtrace) need to know 34712f080e7Smrj * to avoid this address range to prevent undesired device activity. 34812f080e7Smrj */ 34912f080e7Smrj extern void *device_arena_alloc(size_t size, int vm_flag); 35012f080e7Smrj extern void device_arena_free(void * vaddr, size_t size); 35112f080e7Smrj 35212f080e7Smrj 35312f080e7Smrj /* 35412f080e7Smrj * Internal functions 35512f080e7Smrj */ 35612f080e7Smrj static int rootnex_dma_init(); 35712f080e7Smrj static void rootnex_add_props(dev_info_t *); 35812f080e7Smrj static int rootnex_ctl_reportdev(dev_info_t *dip); 35912f080e7Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 36012f080e7Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 36112f080e7Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 36212f080e7Smrj static int rootnex_map_handle(ddi_map_req_t *mp); 36312f080e7Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 36412f080e7Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 36512f080e7Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 36612f080e7Smrj ddi_dma_attr_t *attr); 36712f080e7Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 36812f080e7Smrj rootnex_sglinfo_t *sglinfo); 36912f080e7Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 37012f080e7Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 37112f080e7Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 37212f080e7Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr); 37312f080e7Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 37412f080e7Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 37512f080e7Smrj ddi_dma_attr_t *attr, int kmflag); 37612f080e7Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma); 37712f080e7Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 37812f080e7Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 37912f080e7Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 38012f080e7Smrj rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 38112f080e7Smrj size_t *copybuf_used, page_t **cur_pp); 38212f080e7Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 38312f080e7Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 38412f080e7Smrj ddi_dma_attr_t *attr, off_t cur_offset); 38512f080e7Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 38612f080e7Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, 38712f080e7Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 38812f080e7Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 38912f080e7Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 39012f080e7Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 39112f080e7Smrj off_t offset, size_t size, uint_t cache_flags); 39212f080e7Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma); 39300d0963fSdilpreet static int rootnex_dma_check(dev_info_t *dip, const void *handle, 39400d0963fSdilpreet const void *comp_addr, const void *not_used); 39512f080e7Smrj 39612f080e7Smrj /* 39712f080e7Smrj * _init() 39812f080e7Smrj * 39912f080e7Smrj */ 4007c478bd9Sstevel@tonic-gate int 4017c478bd9Sstevel@tonic-gate _init(void) 4027c478bd9Sstevel@tonic-gate { 40312f080e7Smrj 40412f080e7Smrj rootnex_state = NULL; 40512f080e7Smrj return (mod_install(&rootnex_modlinkage)); 4067c478bd9Sstevel@tonic-gate } 4077c478bd9Sstevel@tonic-gate 40812f080e7Smrj 40912f080e7Smrj /* 41012f080e7Smrj * _info() 41112f080e7Smrj * 41212f080e7Smrj */ 41312f080e7Smrj int 41412f080e7Smrj _info(struct modinfo *modinfop) 41512f080e7Smrj { 41612f080e7Smrj return (mod_info(&rootnex_modlinkage, modinfop)); 41712f080e7Smrj } 41812f080e7Smrj 41912f080e7Smrj 42012f080e7Smrj /* 42112f080e7Smrj * _fini() 42212f080e7Smrj * 42312f080e7Smrj */ 4247c478bd9Sstevel@tonic-gate int 4257c478bd9Sstevel@tonic-gate _fini(void) 4267c478bd9Sstevel@tonic-gate { 4277c478bd9Sstevel@tonic-gate return (EBUSY); 4287c478bd9Sstevel@tonic-gate } 4297c478bd9Sstevel@tonic-gate 43012f080e7Smrj 43112f080e7Smrj /* 43212f080e7Smrj * rootnex_attach() 43312f080e7Smrj * 43412f080e7Smrj */ 43512f080e7Smrj static int 43612f080e7Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 4377c478bd9Sstevel@tonic-gate { 4387aec1d6eScindi int fmcap; 43912f080e7Smrj int e; 44012f080e7Smrj 44112f080e7Smrj switch (cmd) { 44212f080e7Smrj case DDI_ATTACH: 44312f080e7Smrj break; 44412f080e7Smrj case DDI_RESUME: 445*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 446*3a634bfcSVikram Hegde return (immu_unquiesce()); 447*3a634bfcSVikram Hegde #else 44812f080e7Smrj return (DDI_SUCCESS); 449*3a634bfcSVikram Hegde #endif 45012f080e7Smrj default: 45112f080e7Smrj return (DDI_FAILURE); 4527c478bd9Sstevel@tonic-gate } 4537c478bd9Sstevel@tonic-gate 4547c478bd9Sstevel@tonic-gate /* 45512f080e7Smrj * We should only have one instance of rootnex. Save it away since we 45612f080e7Smrj * don't have an easy way to get it back later. 4577c478bd9Sstevel@tonic-gate */ 45812f080e7Smrj ASSERT(rootnex_state == NULL); 45912f080e7Smrj rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 4607c478bd9Sstevel@tonic-gate 46112f080e7Smrj rootnex_state->r_dip = dip; 4627aec1d6eScindi rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15); 46312f080e7Smrj rootnex_state->r_reserved_msg_printed = B_FALSE; 46412f080e7Smrj rootnex_cnt = &rootnex_state->r_counters[0]; 4657c478bd9Sstevel@tonic-gate 4667aec1d6eScindi /* 4677aec1d6eScindi * Set minimum fm capability level for i86pc platforms and then 4687aec1d6eScindi * initialize error handling. Since we're the rootnex, we don't 4697aec1d6eScindi * care what's returned in the fmcap field. 4707aec1d6eScindi */ 47100d0963fSdilpreet ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE | 47200d0963fSdilpreet DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 4737aec1d6eScindi fmcap = ddi_system_fmcap; 4747aec1d6eScindi ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc); 4757aec1d6eScindi 47612f080e7Smrj /* initialize DMA related state */ 47712f080e7Smrj e = rootnex_dma_init(); 47812f080e7Smrj if (e != DDI_SUCCESS) { 47912f080e7Smrj kmem_free(rootnex_state, sizeof (rootnex_state_t)); 48012f080e7Smrj return (DDI_FAILURE); 48112f080e7Smrj } 48212f080e7Smrj 48312f080e7Smrj /* Add static root node properties */ 48412f080e7Smrj rootnex_add_props(dip); 48512f080e7Smrj 48612f080e7Smrj /* since we can't call ddi_report_dev() */ 48712f080e7Smrj cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 48812f080e7Smrj 48912f080e7Smrj /* Initialize rootnex event handle */ 49012f080e7Smrj i_ddi_rootnex_init_events(dip); 49112f080e7Smrj 492*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 49320906b23SVikram Hegde e = iommulib_nexus_register(dip, &iommulib_nexops, 49420906b23SVikram Hegde &rootnex_state->r_iommulib_handle); 49520906b23SVikram Hegde 49620906b23SVikram Hegde ASSERT(e == DDI_SUCCESS); 49720906b23SVikram Hegde #endif 49820906b23SVikram Hegde 49912f080e7Smrj return (DDI_SUCCESS); 50012f080e7Smrj } 50112f080e7Smrj 50212f080e7Smrj 50312f080e7Smrj /* 50412f080e7Smrj * rootnex_detach() 50512f080e7Smrj * 50612f080e7Smrj */ 5077c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 5087c478bd9Sstevel@tonic-gate static int 50912f080e7Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 5107c478bd9Sstevel@tonic-gate { 51112f080e7Smrj switch (cmd) { 51212f080e7Smrj case DDI_SUSPEND: 513*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 514*3a634bfcSVikram Hegde return (immu_quiesce()); 515*3a634bfcSVikram Hegde #else 516*3a634bfcSVikram Hegde return (DDI_SUCCESS); 517*3a634bfcSVikram Hegde #endif 51812f080e7Smrj default: 51912f080e7Smrj return (DDI_FAILURE); 52012f080e7Smrj } 521*3a634bfcSVikram Hegde /*NOTREACHED*/ 5227c478bd9Sstevel@tonic-gate 52312f080e7Smrj } 5247c478bd9Sstevel@tonic-gate 5257c478bd9Sstevel@tonic-gate 52612f080e7Smrj /* 52712f080e7Smrj * rootnex_dma_init() 52812f080e7Smrj * 52912f080e7Smrj */ 53012f080e7Smrj /*ARGSUSED*/ 53112f080e7Smrj static int 53212f080e7Smrj rootnex_dma_init() 53312f080e7Smrj { 53412f080e7Smrj size_t bufsize; 53512f080e7Smrj 53612f080e7Smrj 53712f080e7Smrj /* 53812f080e7Smrj * size of our cookie/window/copybuf state needed in dma bind that we 53912f080e7Smrj * pre-alloc in dma_alloc_handle 54012f080e7Smrj */ 54112f080e7Smrj rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 54212f080e7Smrj rootnex_state->r_prealloc_size = 54312f080e7Smrj (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 54412f080e7Smrj (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 54512f080e7Smrj (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 54612f080e7Smrj 54712f080e7Smrj /* 54812f080e7Smrj * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 54912f080e7Smrj * allocate 16 extra bytes for struct pointer alignment 55012f080e7Smrj * (p->dmai_private & dma->dp_prealloc_buffer) 55112f080e7Smrj */ 55212f080e7Smrj bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 55312f080e7Smrj rootnex_state->r_prealloc_size + 0x10; 55412f080e7Smrj rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 55512f080e7Smrj bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 55612f080e7Smrj if (rootnex_state->r_dmahdl_cache == NULL) { 55712f080e7Smrj return (DDI_FAILURE); 55812f080e7Smrj } 5597c478bd9Sstevel@tonic-gate 5607c478bd9Sstevel@tonic-gate /* 5617c478bd9Sstevel@tonic-gate * allocate array to track which major numbers we have printed warnings 5627c478bd9Sstevel@tonic-gate * for. 5637c478bd9Sstevel@tonic-gate */ 5647c478bd9Sstevel@tonic-gate rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 5657c478bd9Sstevel@tonic-gate KM_SLEEP); 5667c478bd9Sstevel@tonic-gate 5677c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 5687c478bd9Sstevel@tonic-gate } 5697c478bd9Sstevel@tonic-gate 5707c478bd9Sstevel@tonic-gate 5717c478bd9Sstevel@tonic-gate /* 57212f080e7Smrj * rootnex_add_props() 57312f080e7Smrj * 5747c478bd9Sstevel@tonic-gate */ 5757c478bd9Sstevel@tonic-gate static void 57612f080e7Smrj rootnex_add_props(dev_info_t *dip) 5777c478bd9Sstevel@tonic-gate { 57812f080e7Smrj rootnex_intprop_t *rpp; 5797c478bd9Sstevel@tonic-gate int i; 5807c478bd9Sstevel@tonic-gate 58112f080e7Smrj /* Add static integer/boolean properties to the root node */ 58212f080e7Smrj rpp = rootnex_intprp; 58312f080e7Smrj for (i = 0; i < NROOT_INTPROPS; i++) { 58412f080e7Smrj (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 58512f080e7Smrj rpp[i].prop_name, rpp[i].prop_value); 58612f080e7Smrj } 5877c478bd9Sstevel@tonic-gate } 5887c478bd9Sstevel@tonic-gate 58912f080e7Smrj 59012f080e7Smrj 5917c478bd9Sstevel@tonic-gate /* 59212f080e7Smrj * ************************* 59312f080e7Smrj * ctlops related routines 59412f080e7Smrj * ************************* 59512f080e7Smrj */ 59612f080e7Smrj 59712f080e7Smrj /* 59812f080e7Smrj * rootnex_ctlops() 5997c478bd9Sstevel@tonic-gate * 6007c478bd9Sstevel@tonic-gate */ 601a195726fSgovinda /*ARGSUSED*/ 6027c478bd9Sstevel@tonic-gate static int 60312f080e7Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 60412f080e7Smrj void *arg, void *result) 6057c478bd9Sstevel@tonic-gate { 60612f080e7Smrj int n, *ptr; 60712f080e7Smrj struct ddi_parent_private_data *pdp; 6087c478bd9Sstevel@tonic-gate 60912f080e7Smrj switch (ctlop) { 61012f080e7Smrj case DDI_CTLOPS_DMAPMAPC: 6117c478bd9Sstevel@tonic-gate /* 61212f080e7Smrj * Return 'partial' to indicate that dma mapping 61312f080e7Smrj * has to be done in the main MMU. 6147c478bd9Sstevel@tonic-gate */ 61512f080e7Smrj return (DDI_DMA_PARTIAL); 6167c478bd9Sstevel@tonic-gate 61712f080e7Smrj case DDI_CTLOPS_BTOP: 6187c478bd9Sstevel@tonic-gate /* 61912f080e7Smrj * Convert byte count input to physical page units. 62012f080e7Smrj * (byte counts that are not a page-size multiple 62112f080e7Smrj * are rounded down) 6227c478bd9Sstevel@tonic-gate */ 62312f080e7Smrj *(ulong_t *)result = btop(*(ulong_t *)arg); 6247c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 6257c478bd9Sstevel@tonic-gate 62612f080e7Smrj case DDI_CTLOPS_PTOB: 6277c478bd9Sstevel@tonic-gate /* 62812f080e7Smrj * Convert size in physical pages to bytes 6297c478bd9Sstevel@tonic-gate */ 63012f080e7Smrj *(ulong_t *)result = ptob(*(ulong_t *)arg); 6317c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 6327c478bd9Sstevel@tonic-gate 63312f080e7Smrj case DDI_CTLOPS_BTOPR: 6347c478bd9Sstevel@tonic-gate /* 63512f080e7Smrj * Convert byte count input to physical page units 63612f080e7Smrj * (byte counts that are not a page-size multiple 63712f080e7Smrj * are rounded up) 6387c478bd9Sstevel@tonic-gate */ 63912f080e7Smrj *(ulong_t *)result = btopr(*(ulong_t *)arg); 64012f080e7Smrj return (DDI_SUCCESS); 64112f080e7Smrj 64212f080e7Smrj case DDI_CTLOPS_INITCHILD: 64312f080e7Smrj return (impl_ddi_sunbus_initchild(arg)); 64412f080e7Smrj 64512f080e7Smrj case DDI_CTLOPS_UNINITCHILD: 64612f080e7Smrj impl_ddi_sunbus_removechild(arg); 64712f080e7Smrj return (DDI_SUCCESS); 64812f080e7Smrj 64912f080e7Smrj case DDI_CTLOPS_REPORTDEV: 65012f080e7Smrj return (rootnex_ctl_reportdev(rdip)); 65112f080e7Smrj 65212f080e7Smrj case DDI_CTLOPS_IOMIN: 6537c478bd9Sstevel@tonic-gate /* 65412f080e7Smrj * Nothing to do here but reflect back.. 6557c478bd9Sstevel@tonic-gate */ 6567c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 6577c478bd9Sstevel@tonic-gate 65812f080e7Smrj case DDI_CTLOPS_REGSIZE: 65912f080e7Smrj case DDI_CTLOPS_NREGS: 66012f080e7Smrj break; 6617c478bd9Sstevel@tonic-gate 66212f080e7Smrj case DDI_CTLOPS_SIDDEV: 66312f080e7Smrj if (ndi_dev_is_prom_node(rdip)) 6647c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 66512f080e7Smrj if (ndi_dev_is_persistent_node(rdip)) 66612f080e7Smrj return (DDI_SUCCESS); 6677c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 6687c478bd9Sstevel@tonic-gate 66912f080e7Smrj case DDI_CTLOPS_POWER: 67012f080e7Smrj return ((*pm_platform_power)((power_req_t *)arg)); 67112f080e7Smrj 672a195726fSgovinda case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 67312f080e7Smrj case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 67412f080e7Smrj case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 67512f080e7Smrj case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 676a195726fSgovinda case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 677a195726fSgovinda case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 67812f080e7Smrj if (!rootnex_state->r_reserved_msg_printed) { 67912f080e7Smrj rootnex_state->r_reserved_msg_printed = B_TRUE; 68012f080e7Smrj cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 68112f080e7Smrj "1 or more reserved/obsolete operations."); 6827c478bd9Sstevel@tonic-gate } 68312f080e7Smrj return (DDI_FAILURE); 6847c478bd9Sstevel@tonic-gate 6857c478bd9Sstevel@tonic-gate default: 6867c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 6877c478bd9Sstevel@tonic-gate } 68812f080e7Smrj /* 68912f080e7Smrj * The rest are for "hardware" properties 69012f080e7Smrj */ 69112f080e7Smrj if ((pdp = ddi_get_parent_data(rdip)) == NULL) 69212f080e7Smrj return (DDI_FAILURE); 6937c478bd9Sstevel@tonic-gate 69412f080e7Smrj if (ctlop == DDI_CTLOPS_NREGS) { 69512f080e7Smrj ptr = (int *)result; 69612f080e7Smrj *ptr = pdp->par_nreg; 69712f080e7Smrj } else { 69812f080e7Smrj off_t *size = (off_t *)result; 6997c478bd9Sstevel@tonic-gate 70012f080e7Smrj ptr = (int *)arg; 70112f080e7Smrj n = *ptr; 70212f080e7Smrj if (n >= pdp->par_nreg) { 70312f080e7Smrj return (DDI_FAILURE); 70412f080e7Smrj } 70512f080e7Smrj *size = (off_t)pdp->par_reg[n].regspec_size; 70612f080e7Smrj } 7077c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 7087c478bd9Sstevel@tonic-gate } 7097c478bd9Sstevel@tonic-gate 71012f080e7Smrj 71112f080e7Smrj /* 71212f080e7Smrj * rootnex_ctl_reportdev() 71312f080e7Smrj * 71412f080e7Smrj */ 7157c478bd9Sstevel@tonic-gate static int 71612f080e7Smrj rootnex_ctl_reportdev(dev_info_t *dev) 71712f080e7Smrj { 71812f080e7Smrj int i, n, len, f_len = 0; 71912f080e7Smrj char *buf; 72012f080e7Smrj 72112f080e7Smrj buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 72212f080e7Smrj f_len += snprintf(buf, REPORTDEV_BUFSIZE, 72312f080e7Smrj "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 72412f080e7Smrj len = strlen(buf); 72512f080e7Smrj 72612f080e7Smrj for (i = 0; i < sparc_pd_getnreg(dev); i++) { 72712f080e7Smrj 72812f080e7Smrj struct regspec *rp = sparc_pd_getreg(dev, i); 72912f080e7Smrj 73012f080e7Smrj if (i == 0) 73112f080e7Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 73212f080e7Smrj ": "); 73312f080e7Smrj else 73412f080e7Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 73512f080e7Smrj " and "); 73612f080e7Smrj len = strlen(buf); 73712f080e7Smrj 73812f080e7Smrj switch (rp->regspec_bustype) { 73912f080e7Smrj 74012f080e7Smrj case BTEISA: 74112f080e7Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 74212f080e7Smrj "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 74312f080e7Smrj break; 74412f080e7Smrj 74512f080e7Smrj case BTISA: 74612f080e7Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 74712f080e7Smrj "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 74812f080e7Smrj break; 74912f080e7Smrj 75012f080e7Smrj default: 75112f080e7Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 75212f080e7Smrj "space %x offset %x", 75312f080e7Smrj rp->regspec_bustype, rp->regspec_addr); 75412f080e7Smrj break; 75512f080e7Smrj } 75612f080e7Smrj len = strlen(buf); 75712f080e7Smrj } 75812f080e7Smrj for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 75912f080e7Smrj int pri; 76012f080e7Smrj 76112f080e7Smrj if (i != 0) { 76212f080e7Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 76312f080e7Smrj ","); 76412f080e7Smrj len = strlen(buf); 76512f080e7Smrj } 76612f080e7Smrj pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 76712f080e7Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 76812f080e7Smrj " sparc ipl %d", pri); 76912f080e7Smrj len = strlen(buf); 77012f080e7Smrj } 77112f080e7Smrj #ifdef DEBUG 77212f080e7Smrj if (f_len + 1 >= REPORTDEV_BUFSIZE) { 77312f080e7Smrj cmn_err(CE_NOTE, "next message is truncated: " 77412f080e7Smrj "printed length 1024, real length %d", f_len); 77512f080e7Smrj } 77612f080e7Smrj #endif /* DEBUG */ 77712f080e7Smrj cmn_err(CE_CONT, "?%s\n", buf); 77812f080e7Smrj kmem_free(buf, REPORTDEV_BUFSIZE); 77912f080e7Smrj return (DDI_SUCCESS); 78012f080e7Smrj } 78112f080e7Smrj 78212f080e7Smrj 78312f080e7Smrj /* 78412f080e7Smrj * ****************** 78512f080e7Smrj * map related code 78612f080e7Smrj * ****************** 78712f080e7Smrj */ 78812f080e7Smrj 78912f080e7Smrj /* 79012f080e7Smrj * rootnex_map() 79112f080e7Smrj * 79212f080e7Smrj */ 79312f080e7Smrj static int 79412f080e7Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 79512f080e7Smrj off_t len, caddr_t *vaddrp) 7967c478bd9Sstevel@tonic-gate { 7977c478bd9Sstevel@tonic-gate struct regspec *rp, tmp_reg; 7987c478bd9Sstevel@tonic-gate ddi_map_req_t mr = *mp; /* Get private copy of request */ 7997c478bd9Sstevel@tonic-gate int error; 8007c478bd9Sstevel@tonic-gate 8017c478bd9Sstevel@tonic-gate mp = &mr; 8027c478bd9Sstevel@tonic-gate 8037c478bd9Sstevel@tonic-gate switch (mp->map_op) { 8047c478bd9Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 8057c478bd9Sstevel@tonic-gate case DDI_MO_UNMAP: 8067c478bd9Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 8077c478bd9Sstevel@tonic-gate break; 8087c478bd9Sstevel@tonic-gate default: 8097c478bd9Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8107c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 8117c478bd9Sstevel@tonic-gate mp->map_op); 8127c478bd9Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8137c478bd9Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8147c478bd9Sstevel@tonic-gate } 8157c478bd9Sstevel@tonic-gate 8167c478bd9Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) { 8177c478bd9Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8187c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 8197c478bd9Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8207c478bd9Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8217c478bd9Sstevel@tonic-gate } 8227c478bd9Sstevel@tonic-gate 8237c478bd9Sstevel@tonic-gate /* 8247c478bd9Sstevel@tonic-gate * First, if given an rnumber, convert it to a regspec... 8257c478bd9Sstevel@tonic-gate * (Presumably, this is on behalf of a child of the root node?) 8267c478bd9Sstevel@tonic-gate */ 8277c478bd9Sstevel@tonic-gate 8287c478bd9Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) { 8297c478bd9Sstevel@tonic-gate 8307c478bd9Sstevel@tonic-gate int rnumber = mp->map_obj.rnumber; 8317c478bd9Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8327c478bd9Sstevel@tonic-gate static char *out_of_range = 8337c478bd9Sstevel@tonic-gate "rootnex_map: Out of range rnumber <%d>, device <%s>"; 8347c478bd9Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8357c478bd9Sstevel@tonic-gate 8367c478bd9Sstevel@tonic-gate rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 8377c478bd9Sstevel@tonic-gate if (rp == NULL) { 8387c478bd9Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8397c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, out_of_range, rnumber, 8407c478bd9Sstevel@tonic-gate ddi_get_name(rdip)); 8417c478bd9Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8427c478bd9Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 8437c478bd9Sstevel@tonic-gate } 8447c478bd9Sstevel@tonic-gate 8457c478bd9Sstevel@tonic-gate /* 8467c478bd9Sstevel@tonic-gate * Convert the given ddi_map_req_t from rnumber to regspec... 8477c478bd9Sstevel@tonic-gate */ 8487c478bd9Sstevel@tonic-gate 8497c478bd9Sstevel@tonic-gate mp->map_type = DDI_MT_REGSPEC; 8507c478bd9Sstevel@tonic-gate mp->map_obj.rp = rp; 8517c478bd9Sstevel@tonic-gate } 8527c478bd9Sstevel@tonic-gate 8537c478bd9Sstevel@tonic-gate /* 8547c478bd9Sstevel@tonic-gate * Adjust offset and length correspnding to called values... 8557c478bd9Sstevel@tonic-gate * XXX: A non-zero length means override the one in the regspec 8567c478bd9Sstevel@tonic-gate * XXX: (regardless of what's in the parent's range?) 8577c478bd9Sstevel@tonic-gate */ 8587c478bd9Sstevel@tonic-gate 8597c478bd9Sstevel@tonic-gate tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 8607c478bd9Sstevel@tonic-gate rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 8617c478bd9Sstevel@tonic-gate 8627c478bd9Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 863843e1988Sjohnlev cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d " 864843e1988Sjohnlev "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 865843e1988Sjohnlev rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset, 866843e1988Sjohnlev len, mp->map_handlep); 8677c478bd9Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8687c478bd9Sstevel@tonic-gate 8697c478bd9Sstevel@tonic-gate /* 8707c478bd9Sstevel@tonic-gate * I/O or memory mapping: 8717c478bd9Sstevel@tonic-gate * 8727c478bd9Sstevel@tonic-gate * <bustype=0, addr=x, len=x>: memory 8737c478bd9Sstevel@tonic-gate * <bustype=1, addr=x, len=x>: i/o 8747c478bd9Sstevel@tonic-gate * <bustype>1, addr=0, len=x>: x86-compatibility i/o 8757c478bd9Sstevel@tonic-gate */ 8767c478bd9Sstevel@tonic-gate 8777c478bd9Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 8787c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "<%s,%s> invalid register spec" 8797c478bd9Sstevel@tonic-gate " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 8807c478bd9Sstevel@tonic-gate ddi_get_name(rdip), rp->regspec_bustype, 8817c478bd9Sstevel@tonic-gate rp->regspec_addr, rp->regspec_size); 8827c478bd9Sstevel@tonic-gate return (DDI_ME_INVAL); 8837c478bd9Sstevel@tonic-gate } 8847c478bd9Sstevel@tonic-gate 8857c478bd9Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 8867c478bd9Sstevel@tonic-gate /* 8877c478bd9Sstevel@tonic-gate * compatibility i/o mapping 8887c478bd9Sstevel@tonic-gate */ 8897c478bd9Sstevel@tonic-gate rp->regspec_bustype += (uint_t)offset; 8907c478bd9Sstevel@tonic-gate } else { 8917c478bd9Sstevel@tonic-gate /* 8927c478bd9Sstevel@tonic-gate * Normal memory or i/o mapping 8937c478bd9Sstevel@tonic-gate */ 8947c478bd9Sstevel@tonic-gate rp->regspec_addr += (uint_t)offset; 8957c478bd9Sstevel@tonic-gate } 8967c478bd9Sstevel@tonic-gate 8977c478bd9Sstevel@tonic-gate if (len != 0) 8987c478bd9Sstevel@tonic-gate rp->regspec_size = (uint_t)len; 8997c478bd9Sstevel@tonic-gate 9007c478bd9Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 901843e1988Sjohnlev cmn_err(CE_CONT, " <%s,%s> <0x%x, 0x%x, 0x%d> offset %d " 902843e1988Sjohnlev "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 9037c478bd9Sstevel@tonic-gate rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 9047c478bd9Sstevel@tonic-gate offset, len, mp->map_handlep); 9057c478bd9Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9067c478bd9Sstevel@tonic-gate 9077c478bd9Sstevel@tonic-gate /* 9087c478bd9Sstevel@tonic-gate * Apply any parent ranges at this level, if applicable. 9097c478bd9Sstevel@tonic-gate * (This is where nexus specific regspec translation takes place. 9107c478bd9Sstevel@tonic-gate * Use of this function is implicit agreement that translation is 9117c478bd9Sstevel@tonic-gate * provided via ddi_apply_range.) 9127c478bd9Sstevel@tonic-gate */ 9137c478bd9Sstevel@tonic-gate 9147c478bd9Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9157c478bd9Sstevel@tonic-gate ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 9167c478bd9Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip)); 9177c478bd9Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9187c478bd9Sstevel@tonic-gate 9197c478bd9Sstevel@tonic-gate if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 9207c478bd9Sstevel@tonic-gate return (error); 9217c478bd9Sstevel@tonic-gate 9227c478bd9Sstevel@tonic-gate switch (mp->map_op) { 9237c478bd9Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 9247c478bd9Sstevel@tonic-gate 9257c478bd9Sstevel@tonic-gate /* 9267c478bd9Sstevel@tonic-gate * Set up the locked down kernel mapping to the regspec... 9277c478bd9Sstevel@tonic-gate */ 9287c478bd9Sstevel@tonic-gate 9297c478bd9Sstevel@tonic-gate return (rootnex_map_regspec(mp, vaddrp)); 9307c478bd9Sstevel@tonic-gate 9317c478bd9Sstevel@tonic-gate case DDI_MO_UNMAP: 9327c478bd9Sstevel@tonic-gate 9337c478bd9Sstevel@tonic-gate /* 9347c478bd9Sstevel@tonic-gate * Release mapping... 9357c478bd9Sstevel@tonic-gate */ 9367c478bd9Sstevel@tonic-gate 9377c478bd9Sstevel@tonic-gate return (rootnex_unmap_regspec(mp, vaddrp)); 9387c478bd9Sstevel@tonic-gate 9397c478bd9Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 9407c478bd9Sstevel@tonic-gate 9417c478bd9Sstevel@tonic-gate return (rootnex_map_handle(mp)); 9427c478bd9Sstevel@tonic-gate 9437c478bd9Sstevel@tonic-gate default: 9447c478bd9Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 9457c478bd9Sstevel@tonic-gate } 9467c478bd9Sstevel@tonic-gate } 9477c478bd9Sstevel@tonic-gate 9487c478bd9Sstevel@tonic-gate 9497c478bd9Sstevel@tonic-gate /* 95012f080e7Smrj * rootnex_map_fault() 9517c478bd9Sstevel@tonic-gate * 9527c478bd9Sstevel@tonic-gate * fault in mappings for requestors 9537c478bd9Sstevel@tonic-gate */ 9547c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 9557c478bd9Sstevel@tonic-gate static int 95612f080e7Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 95712f080e7Smrj struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 95812f080e7Smrj uint_t lock) 9597c478bd9Sstevel@tonic-gate { 9607c478bd9Sstevel@tonic-gate 9617c478bd9Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9627c478bd9Sstevel@tonic-gate ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 9637c478bd9Sstevel@tonic-gate ddi_map_debug(" Seg <%s>\n", 9647c478bd9Sstevel@tonic-gate seg->s_ops == &segdev_ops ? "segdev" : 9657c478bd9Sstevel@tonic-gate seg == &kvseg ? "segkmem" : "NONE!"); 9667c478bd9Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9677c478bd9Sstevel@tonic-gate 9687c478bd9Sstevel@tonic-gate /* 9697c478bd9Sstevel@tonic-gate * This is all terribly broken, but it is a start 9707c478bd9Sstevel@tonic-gate * 9717c478bd9Sstevel@tonic-gate * XXX Note that this test means that segdev_ops 9727c478bd9Sstevel@tonic-gate * must be exported from seg_dev.c. 9737c478bd9Sstevel@tonic-gate * XXX What about devices with their own segment drivers? 9747c478bd9Sstevel@tonic-gate */ 9757c478bd9Sstevel@tonic-gate if (seg->s_ops == &segdev_ops) { 976843e1988Sjohnlev struct segdev_data *sdp = (struct segdev_data *)seg->s_data; 9777c478bd9Sstevel@tonic-gate 9787c478bd9Sstevel@tonic-gate if (hat == NULL) { 9797c478bd9Sstevel@tonic-gate /* 9807c478bd9Sstevel@tonic-gate * This is one plausible interpretation of 9817c478bd9Sstevel@tonic-gate * a null hat i.e. use the first hat on the 9827c478bd9Sstevel@tonic-gate * address space hat list which by convention is 9837c478bd9Sstevel@tonic-gate * the hat of the system MMU. At alternative 9847c478bd9Sstevel@tonic-gate * would be to panic .. this might well be better .. 9857c478bd9Sstevel@tonic-gate */ 9867c478bd9Sstevel@tonic-gate ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 9877c478bd9Sstevel@tonic-gate hat = seg->s_as->a_hat; 9887c478bd9Sstevel@tonic-gate cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 9897c478bd9Sstevel@tonic-gate } 9907c478bd9Sstevel@tonic-gate hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 9917c478bd9Sstevel@tonic-gate (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 9927c478bd9Sstevel@tonic-gate } else if (seg == &kvseg && dp == NULL) { 9937c478bd9Sstevel@tonic-gate hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 9947c478bd9Sstevel@tonic-gate HAT_LOAD_LOCK); 9957c478bd9Sstevel@tonic-gate } else 9967c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 9977c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 9987c478bd9Sstevel@tonic-gate } 9997c478bd9Sstevel@tonic-gate 10007c478bd9Sstevel@tonic-gate 10017c478bd9Sstevel@tonic-gate /* 100212f080e7Smrj * rootnex_map_regspec() 100312f080e7Smrj * we don't support mapping of I/O cards above 4Gb 10047c478bd9Sstevel@tonic-gate */ 10057c478bd9Sstevel@tonic-gate static int 100612f080e7Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 10077c478bd9Sstevel@tonic-gate { 1008843e1988Sjohnlev rootnex_addr_t rbase; 100912f080e7Smrj void *cvaddr; 101012f080e7Smrj uint_t npages, pgoffset; 101112f080e7Smrj struct regspec *rp; 101212f080e7Smrj ddi_acc_hdl_t *hp; 101312f080e7Smrj ddi_acc_impl_t *ap; 101412f080e7Smrj uint_t hat_acc_flags; 1015843e1988Sjohnlev paddr_t pbase; 10167c478bd9Sstevel@tonic-gate 101712f080e7Smrj rp = mp->map_obj.rp; 101812f080e7Smrj hp = mp->map_handlep; 101912f080e7Smrj 102012f080e7Smrj #ifdef DDI_MAP_DEBUG 102112f080e7Smrj ddi_map_debug( 102212f080e7Smrj "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 102312f080e7Smrj rp->regspec_bustype, rp->regspec_addr, 102412f080e7Smrj rp->regspec_size, mp->map_handlep); 102512f080e7Smrj #endif /* DDI_MAP_DEBUG */ 10267c478bd9Sstevel@tonic-gate 10277c478bd9Sstevel@tonic-gate /* 102812f080e7Smrj * I/O or memory mapping 102912f080e7Smrj * 103012f080e7Smrj * <bustype=0, addr=x, len=x>: memory 103112f080e7Smrj * <bustype=1, addr=x, len=x>: i/o 103212f080e7Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 10337c478bd9Sstevel@tonic-gate */ 103412f080e7Smrj 103512f080e7Smrj if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 103612f080e7Smrj cmn_err(CE_WARN, "rootnex: invalid register spec" 103712f080e7Smrj " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 103812f080e7Smrj rp->regspec_addr, rp->regspec_size); 103912f080e7Smrj return (DDI_FAILURE); 10407c478bd9Sstevel@tonic-gate } 104112f080e7Smrj 104212f080e7Smrj if (rp->regspec_bustype != 0) { 10437c478bd9Sstevel@tonic-gate /* 104412f080e7Smrj * I/O space - needs a handle. 10457c478bd9Sstevel@tonic-gate */ 10467c478bd9Sstevel@tonic-gate if (hp == NULL) { 104712f080e7Smrj return (DDI_FAILURE); 10487c478bd9Sstevel@tonic-gate } 104912f080e7Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 105012f080e7Smrj ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 105112f080e7Smrj impl_acc_hdl_init(hp); 10527c478bd9Sstevel@tonic-gate 105312f080e7Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 105412f080e7Smrj #ifdef DDI_MAP_DEBUG 1055843e1988Sjohnlev ddi_map_debug("rootnex_map_regspec: mmap() " 1056843e1988Sjohnlev "to I/O space is not supported.\n"); 105712f080e7Smrj #endif /* DDI_MAP_DEBUG */ 105812f080e7Smrj return (DDI_ME_INVAL); 10597c478bd9Sstevel@tonic-gate } else { 10607c478bd9Sstevel@tonic-gate /* 106112f080e7Smrj * 1275-compliant vs. compatibility i/o mapping 10627c478bd9Sstevel@tonic-gate */ 106312f080e7Smrj *vaddrp = 106412f080e7Smrj (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 106512f080e7Smrj ((caddr_t)(uintptr_t)rp->regspec_bustype) : 106612f080e7Smrj ((caddr_t)(uintptr_t)rp->regspec_addr); 1067843e1988Sjohnlev #ifdef __xpv 1068843e1988Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1069843e1988Sjohnlev hp->ah_pfn = xen_assign_pfn( 1070843e1988Sjohnlev mmu_btop((ulong_t)rp->regspec_addr & 1071843e1988Sjohnlev MMU_PAGEMASK)); 1072843e1988Sjohnlev } else { 1073843e1988Sjohnlev hp->ah_pfn = mmu_btop( 1074843e1988Sjohnlev (ulong_t)rp->regspec_addr & MMU_PAGEMASK); 1075843e1988Sjohnlev } 1076843e1988Sjohnlev #else 107700d0963fSdilpreet hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & 1078843e1988Sjohnlev MMU_PAGEMASK); 1079843e1988Sjohnlev #endif 108000d0963fSdilpreet hp->ah_pnum = mmu_btopr(rp->regspec_size + 108100d0963fSdilpreet (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); 10827c478bd9Sstevel@tonic-gate } 10837c478bd9Sstevel@tonic-gate 108412f080e7Smrj #ifdef DDI_MAP_DEBUG 108512f080e7Smrj ddi_map_debug( 108612f080e7Smrj "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 108712f080e7Smrj rp->regspec_size, *vaddrp); 108812f080e7Smrj #endif /* DDI_MAP_DEBUG */ 108912f080e7Smrj return (DDI_SUCCESS); 10907c478bd9Sstevel@tonic-gate } 10917c478bd9Sstevel@tonic-gate 10927c478bd9Sstevel@tonic-gate /* 109312f080e7Smrj * Memory space 109412f080e7Smrj */ 109512f080e7Smrj 109612f080e7Smrj if (hp != NULL) { 109712f080e7Smrj /* 109812f080e7Smrj * hat layer ignores 109912f080e7Smrj * hp->ah_acc.devacc_attr_endian_flags. 110012f080e7Smrj */ 110112f080e7Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 110212f080e7Smrj case DDI_STRICTORDER_ACC: 110312f080e7Smrj hat_acc_flags = HAT_STRICTORDER; 110412f080e7Smrj break; 110512f080e7Smrj case DDI_UNORDERED_OK_ACC: 110612f080e7Smrj hat_acc_flags = HAT_UNORDERED_OK; 110712f080e7Smrj break; 110812f080e7Smrj case DDI_MERGING_OK_ACC: 110912f080e7Smrj hat_acc_flags = HAT_MERGING_OK; 111012f080e7Smrj break; 111112f080e7Smrj case DDI_LOADCACHING_OK_ACC: 111212f080e7Smrj hat_acc_flags = HAT_LOADCACHING_OK; 111312f080e7Smrj break; 111412f080e7Smrj case DDI_STORECACHING_OK_ACC: 111512f080e7Smrj hat_acc_flags = HAT_STORECACHING_OK; 111612f080e7Smrj break; 111712f080e7Smrj } 111812f080e7Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 111912f080e7Smrj ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 112012f080e7Smrj impl_acc_hdl_init(hp); 112112f080e7Smrj hp->ah_hat_flags = hat_acc_flags; 112212f080e7Smrj } else { 112312f080e7Smrj hat_acc_flags = HAT_STRICTORDER; 112412f080e7Smrj } 112512f080e7Smrj 1126843e1988Sjohnlev rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK); 1127843e1988Sjohnlev #ifdef __xpv 1128843e1988Sjohnlev /* 1129843e1988Sjohnlev * If we're dom0, we're using a real device so we need to translate 1130843e1988Sjohnlev * the MA to a PA. 1131843e1988Sjohnlev */ 1132843e1988Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1133843e1988Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))); 1134843e1988Sjohnlev } else { 1135843e1988Sjohnlev pbase = rbase; 1136843e1988Sjohnlev } 1137843e1988Sjohnlev #else 1138843e1988Sjohnlev pbase = rbase; 1139843e1988Sjohnlev #endif 1140843e1988Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 114112f080e7Smrj 114212f080e7Smrj if (rp->regspec_size == 0) { 114312f080e7Smrj #ifdef DDI_MAP_DEBUG 114412f080e7Smrj ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 114512f080e7Smrj #endif /* DDI_MAP_DEBUG */ 114612f080e7Smrj return (DDI_ME_INVAL); 114712f080e7Smrj } 114812f080e7Smrj 114912f080e7Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1150843e1988Sjohnlev /* extra cast to make gcc happy */ 1151843e1988Sjohnlev *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase)); 115212f080e7Smrj } else { 115312f080e7Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 115412f080e7Smrj 115512f080e7Smrj #ifdef DDI_MAP_DEBUG 1156843e1988Sjohnlev ddi_map_debug("rootnex_map_regspec: Mapping %d pages " 1157843e1988Sjohnlev "physical %llx", npages, pbase); 115812f080e7Smrj #endif /* DDI_MAP_DEBUG */ 115912f080e7Smrj 116012f080e7Smrj cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 116112f080e7Smrj if (cvaddr == NULL) 116212f080e7Smrj return (DDI_ME_NORESOURCES); 116312f080e7Smrj 116412f080e7Smrj /* 116512f080e7Smrj * Now map in the pages we've allocated... 116612f080e7Smrj */ 1167843e1988Sjohnlev hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), 1168843e1988Sjohnlev mmu_btop(pbase), mp->map_prot | hat_acc_flags, 1169843e1988Sjohnlev HAT_LOAD_LOCK); 117012f080e7Smrj *vaddrp = (caddr_t)cvaddr + pgoffset; 117100d0963fSdilpreet 117200d0963fSdilpreet /* save away pfn and npages for FMA */ 117300d0963fSdilpreet hp = mp->map_handlep; 117400d0963fSdilpreet if (hp) { 1175843e1988Sjohnlev hp->ah_pfn = mmu_btop(pbase); 117600d0963fSdilpreet hp->ah_pnum = npages; 117700d0963fSdilpreet } 117812f080e7Smrj } 117912f080e7Smrj 118012f080e7Smrj #ifdef DDI_MAP_DEBUG 118112f080e7Smrj ddi_map_debug("at virtual 0x%x\n", *vaddrp); 118212f080e7Smrj #endif /* DDI_MAP_DEBUG */ 118312f080e7Smrj return (DDI_SUCCESS); 118412f080e7Smrj } 118512f080e7Smrj 118612f080e7Smrj 118712f080e7Smrj /* 118812f080e7Smrj * rootnex_unmap_regspec() 11897c478bd9Sstevel@tonic-gate * 11907c478bd9Sstevel@tonic-gate */ 11917c478bd9Sstevel@tonic-gate static int 119212f080e7Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 11937c478bd9Sstevel@tonic-gate { 119412f080e7Smrj caddr_t addr = (caddr_t)*vaddrp; 119512f080e7Smrj uint_t npages, pgoffset; 119612f080e7Smrj struct regspec *rp; 11977c478bd9Sstevel@tonic-gate 119812f080e7Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 119912f080e7Smrj return (0); 12007c478bd9Sstevel@tonic-gate 120112f080e7Smrj rp = mp->map_obj.rp; 12027c478bd9Sstevel@tonic-gate 120312f080e7Smrj if (rp->regspec_size == 0) { 120412f080e7Smrj #ifdef DDI_MAP_DEBUG 120512f080e7Smrj ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 120612f080e7Smrj #endif /* DDI_MAP_DEBUG */ 120712f080e7Smrj return (DDI_ME_INVAL); 12087c478bd9Sstevel@tonic-gate } 12097c478bd9Sstevel@tonic-gate 12107c478bd9Sstevel@tonic-gate /* 121112f080e7Smrj * I/O or memory mapping: 12127c478bd9Sstevel@tonic-gate * 121312f080e7Smrj * <bustype=0, addr=x, len=x>: memory 121412f080e7Smrj * <bustype=1, addr=x, len=x>: i/o 121512f080e7Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 12167c478bd9Sstevel@tonic-gate */ 121712f080e7Smrj if (rp->regspec_bustype != 0) { 12187c478bd9Sstevel@tonic-gate /* 121912f080e7Smrj * This is I/O space, which requires no particular 122012f080e7Smrj * processing on unmap since it isn't mapped in the 122112f080e7Smrj * first place. 12227c478bd9Sstevel@tonic-gate */ 12237c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12247c478bd9Sstevel@tonic-gate } 12257c478bd9Sstevel@tonic-gate 12267c478bd9Sstevel@tonic-gate /* 122712f080e7Smrj * Memory space 12287c478bd9Sstevel@tonic-gate */ 122912f080e7Smrj pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 123012f080e7Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 123112f080e7Smrj hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 123212f080e7Smrj device_arena_free(addr - pgoffset, ptob(npages)); 12337c478bd9Sstevel@tonic-gate 12347c478bd9Sstevel@tonic-gate /* 123512f080e7Smrj * Destroy the pointer - the mapping has logically gone 12367c478bd9Sstevel@tonic-gate */ 123712f080e7Smrj *vaddrp = NULL; 12387c478bd9Sstevel@tonic-gate 12397c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12407c478bd9Sstevel@tonic-gate } 12417c478bd9Sstevel@tonic-gate 124212f080e7Smrj 124312f080e7Smrj /* 124412f080e7Smrj * rootnex_map_handle() 124512f080e7Smrj * 124612f080e7Smrj */ 12477c478bd9Sstevel@tonic-gate static int 124812f080e7Smrj rootnex_map_handle(ddi_map_req_t *mp) 12497c478bd9Sstevel@tonic-gate { 1250843e1988Sjohnlev rootnex_addr_t rbase; 125112f080e7Smrj ddi_acc_hdl_t *hp; 125212f080e7Smrj uint_t pgoffset; 125312f080e7Smrj struct regspec *rp; 1254843e1988Sjohnlev paddr_t pbase; 12557c478bd9Sstevel@tonic-gate 125612f080e7Smrj rp = mp->map_obj.rp; 12577c478bd9Sstevel@tonic-gate 125812f080e7Smrj #ifdef DDI_MAP_DEBUG 125912f080e7Smrj ddi_map_debug( 126012f080e7Smrj "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 126112f080e7Smrj rp->regspec_bustype, rp->regspec_addr, 126212f080e7Smrj rp->regspec_size, mp->map_handlep); 126312f080e7Smrj #endif /* DDI_MAP_DEBUG */ 12647c478bd9Sstevel@tonic-gate 12657c478bd9Sstevel@tonic-gate /* 126612f080e7Smrj * I/O or memory mapping: 126712f080e7Smrj * 126812f080e7Smrj * <bustype=0, addr=x, len=x>: memory 126912f080e7Smrj * <bustype=1, addr=x, len=x>: i/o 127012f080e7Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 12717c478bd9Sstevel@tonic-gate */ 127212f080e7Smrj if (rp->regspec_bustype != 0) { 127312f080e7Smrj /* 127412f080e7Smrj * This refers to I/O space, and we don't support "mapping" 127512f080e7Smrj * I/O space to a user. 127612f080e7Smrj */ 12777c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 12787c478bd9Sstevel@tonic-gate } 12797c478bd9Sstevel@tonic-gate 12807c478bd9Sstevel@tonic-gate /* 128112f080e7Smrj * Set up the hat_flags for the mapping. 12827c478bd9Sstevel@tonic-gate */ 128312f080e7Smrj hp = mp->map_handlep; 12847c478bd9Sstevel@tonic-gate 128512f080e7Smrj switch (hp->ah_acc.devacc_attr_endian_flags) { 128612f080e7Smrj case DDI_NEVERSWAP_ACC: 128712f080e7Smrj hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 12887c478bd9Sstevel@tonic-gate break; 128912f080e7Smrj case DDI_STRUCTURE_LE_ACC: 129012f080e7Smrj hp->ah_hat_flags = HAT_STRUCTURE_LE; 12917c478bd9Sstevel@tonic-gate break; 129212f080e7Smrj case DDI_STRUCTURE_BE_ACC: 12937c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 12947c478bd9Sstevel@tonic-gate default: 129512f080e7Smrj return (DDI_REGS_ACC_CONFLICT); 12967c478bd9Sstevel@tonic-gate } 12977c478bd9Sstevel@tonic-gate 129812f080e7Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 129912f080e7Smrj case DDI_STRICTORDER_ACC: 13007c478bd9Sstevel@tonic-gate break; 130112f080e7Smrj case DDI_UNORDERED_OK_ACC: 130212f080e7Smrj hp->ah_hat_flags |= HAT_UNORDERED_OK; 13037c478bd9Sstevel@tonic-gate break; 130412f080e7Smrj case DDI_MERGING_OK_ACC: 130512f080e7Smrj hp->ah_hat_flags |= HAT_MERGING_OK; 13067c478bd9Sstevel@tonic-gate break; 130712f080e7Smrj case DDI_LOADCACHING_OK_ACC: 130812f080e7Smrj hp->ah_hat_flags |= HAT_LOADCACHING_OK; 130912f080e7Smrj break; 131012f080e7Smrj case DDI_STORECACHING_OK_ACC: 131112f080e7Smrj hp->ah_hat_flags |= HAT_STORECACHING_OK; 131212f080e7Smrj break; 13137c478bd9Sstevel@tonic-gate default: 13147c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 13157c478bd9Sstevel@tonic-gate } 13167c478bd9Sstevel@tonic-gate 1317843e1988Sjohnlev rbase = (rootnex_addr_t)rp->regspec_addr & 1318843e1988Sjohnlev (~(rootnex_addr_t)MMU_PAGEOFFSET); 1319843e1988Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 13207c478bd9Sstevel@tonic-gate 132112f080e7Smrj if (rp->regspec_size == 0) 132212f080e7Smrj return (DDI_ME_INVAL); 13237c478bd9Sstevel@tonic-gate 1324843e1988Sjohnlev #ifdef __xpv 1325843e1988Sjohnlev /* 1326843e1988Sjohnlev * If we're dom0, we're using a real device so we need to translate 1327843e1988Sjohnlev * the MA to a PA. 1328843e1988Sjohnlev */ 1329843e1988Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1330843e1988Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) | 1331843e1988Sjohnlev (rbase & MMU_PAGEOFFSET); 1332843e1988Sjohnlev } else { 1333843e1988Sjohnlev pbase = rbase; 1334843e1988Sjohnlev } 1335843e1988Sjohnlev #else 1336843e1988Sjohnlev pbase = rbase; 1337843e1988Sjohnlev #endif 1338843e1988Sjohnlev 1339843e1988Sjohnlev hp->ah_pfn = mmu_btop(pbase); 134012f080e7Smrj hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 13417c478bd9Sstevel@tonic-gate 13427c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 13437c478bd9Sstevel@tonic-gate } 13447c478bd9Sstevel@tonic-gate 134512f080e7Smrj 134612f080e7Smrj 13477c478bd9Sstevel@tonic-gate /* 134812f080e7Smrj * ************************ 134912f080e7Smrj * interrupt related code 135012f080e7Smrj * ************************ 13517c478bd9Sstevel@tonic-gate */ 13527c478bd9Sstevel@tonic-gate 13537c478bd9Sstevel@tonic-gate /* 135412f080e7Smrj * rootnex_intr_ops() 13557c478bd9Sstevel@tonic-gate * bus_intr_op() function for interrupt support 13567c478bd9Sstevel@tonic-gate */ 13577c478bd9Sstevel@tonic-gate /* ARGSUSED */ 13587c478bd9Sstevel@tonic-gate static int 13597c478bd9Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 13607c478bd9Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 13617c478bd9Sstevel@tonic-gate { 13627c478bd9Sstevel@tonic-gate struct intrspec *ispec; 13637c478bd9Sstevel@tonic-gate struct ddi_parent_private_data *pdp; 13647c478bd9Sstevel@tonic-gate 13657c478bd9Sstevel@tonic-gate DDI_INTR_NEXDBG((CE_CONT, 13667c478bd9Sstevel@tonic-gate "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 13677c478bd9Sstevel@tonic-gate (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 13687c478bd9Sstevel@tonic-gate 13697c478bd9Sstevel@tonic-gate /* Process the interrupt operation */ 13707c478bd9Sstevel@tonic-gate switch (intr_op) { 13717c478bd9Sstevel@tonic-gate case DDI_INTROP_GETCAP: 13727c478bd9Sstevel@tonic-gate /* First check with pcplusmp */ 13737c478bd9Sstevel@tonic-gate if (psm_intr_ops == NULL) 13747c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 13757c478bd9Sstevel@tonic-gate 13767c478bd9Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 13777c478bd9Sstevel@tonic-gate *(int *)result = 0; 13787c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 13797c478bd9Sstevel@tonic-gate } 13807c478bd9Sstevel@tonic-gate break; 13817c478bd9Sstevel@tonic-gate case DDI_INTROP_SETCAP: 13827c478bd9Sstevel@tonic-gate if (psm_intr_ops == NULL) 13837c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 13847c478bd9Sstevel@tonic-gate 13857c478bd9Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 13867c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 13877c478bd9Sstevel@tonic-gate break; 13887c478bd9Sstevel@tonic-gate case DDI_INTROP_ALLOC: 13897c478bd9Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13907c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 13917c478bd9Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 13927c478bd9Sstevel@tonic-gate *(int *)result = hdlp->ih_scratch1; 13937c478bd9Sstevel@tonic-gate break; 13947c478bd9Sstevel@tonic-gate case DDI_INTROP_FREE: 13957c478bd9Sstevel@tonic-gate pdp = ddi_get_parent_data(rdip); 13967c478bd9Sstevel@tonic-gate /* 13977c478bd9Sstevel@tonic-gate * Special case for 'pcic' driver' only. 13987c478bd9Sstevel@tonic-gate * If an intrspec was created for it, clean it up here 13997c478bd9Sstevel@tonic-gate * See detailed comments on this in the function 14007c478bd9Sstevel@tonic-gate * rootnex_get_ispec(). 14017c478bd9Sstevel@tonic-gate */ 14027c478bd9Sstevel@tonic-gate if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 14037c478bd9Sstevel@tonic-gate kmem_free(pdp->par_intr, sizeof (struct intrspec) * 14047c478bd9Sstevel@tonic-gate pdp->par_nintr); 14057c478bd9Sstevel@tonic-gate /* 14067c478bd9Sstevel@tonic-gate * Set it to zero; so that 14077c478bd9Sstevel@tonic-gate * DDI framework doesn't free it again 14087c478bd9Sstevel@tonic-gate */ 14097c478bd9Sstevel@tonic-gate pdp->par_intr = NULL; 14107c478bd9Sstevel@tonic-gate pdp->par_nintr = 0; 14117c478bd9Sstevel@tonic-gate } 14127c478bd9Sstevel@tonic-gate break; 14137c478bd9Sstevel@tonic-gate case DDI_INTROP_GETPRI: 14147c478bd9Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14157c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14167c478bd9Sstevel@tonic-gate *(int *)result = ispec->intrspec_pri; 14177c478bd9Sstevel@tonic-gate break; 14187c478bd9Sstevel@tonic-gate case DDI_INTROP_SETPRI: 14197c478bd9Sstevel@tonic-gate /* Validate the interrupt priority passed to us */ 14207c478bd9Sstevel@tonic-gate if (*(int *)result > LOCK_LEVEL) 14217c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14227c478bd9Sstevel@tonic-gate 14237c478bd9Sstevel@tonic-gate /* Ensure that PSM is all initialized and ispec is ok */ 14247c478bd9Sstevel@tonic-gate if ((psm_intr_ops == NULL) || 14257c478bd9Sstevel@tonic-gate ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 14267c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14277c478bd9Sstevel@tonic-gate 14287c478bd9Sstevel@tonic-gate /* Change the priority */ 14297c478bd9Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 14307c478bd9Sstevel@tonic-gate PSM_FAILURE) 14317c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14327c478bd9Sstevel@tonic-gate 14337c478bd9Sstevel@tonic-gate /* update the ispec with the new priority */ 14347c478bd9Sstevel@tonic-gate ispec->intrspec_pri = *(int *)result; 14357c478bd9Sstevel@tonic-gate break; 14367c478bd9Sstevel@tonic-gate case DDI_INTROP_ADDISR: 14377c478bd9Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14387c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14397c478bd9Sstevel@tonic-gate ispec->intrspec_func = hdlp->ih_cb_func; 14407c478bd9Sstevel@tonic-gate break; 14417c478bd9Sstevel@tonic-gate case DDI_INTROP_REMISR: 14427c478bd9Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14437c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14447c478bd9Sstevel@tonic-gate ispec->intrspec_func = (uint_t (*)()) 0; 14457c478bd9Sstevel@tonic-gate break; 14467c478bd9Sstevel@tonic-gate case DDI_INTROP_ENABLE: 14477c478bd9Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14487c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14497c478bd9Sstevel@tonic-gate 14507c478bd9Sstevel@tonic-gate /* Call psmi to translate irq with the dip */ 14517c478bd9Sstevel@tonic-gate if (psm_intr_ops == NULL) 14527c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14537c478bd9Sstevel@tonic-gate 14547a364d25Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 145586a9c507SGuoli Shu if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 145686a9c507SGuoli Shu (int *)&hdlp->ih_vector) == PSM_FAILURE) 145786a9c507SGuoli Shu return (DDI_FAILURE); 14587c478bd9Sstevel@tonic-gate 14597c478bd9Sstevel@tonic-gate /* Add the interrupt handler */ 14607c478bd9Sstevel@tonic-gate if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 14617c478bd9Sstevel@tonic-gate hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 14627a364d25Sschwartz hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 14637c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14647c478bd9Sstevel@tonic-gate break; 14657c478bd9Sstevel@tonic-gate case DDI_INTROP_DISABLE: 14667c478bd9Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14677c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14687c478bd9Sstevel@tonic-gate 14697c478bd9Sstevel@tonic-gate /* Call psm_ops() to translate irq with the dip */ 14707c478bd9Sstevel@tonic-gate if (psm_intr_ops == NULL) 14717c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14727c478bd9Sstevel@tonic-gate 14737a364d25Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 14747c478bd9Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 14757c478bd9Sstevel@tonic-gate PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 14767c478bd9Sstevel@tonic-gate 14777c478bd9Sstevel@tonic-gate /* Remove the interrupt handler */ 14787c478bd9Sstevel@tonic-gate rem_avintr((void *)hdlp, ispec->intrspec_pri, 14797c478bd9Sstevel@tonic-gate hdlp->ih_cb_func, hdlp->ih_vector); 14807c478bd9Sstevel@tonic-gate break; 14817c478bd9Sstevel@tonic-gate case DDI_INTROP_SETMASK: 14827c478bd9Sstevel@tonic-gate if (psm_intr_ops == NULL) 14837c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14847c478bd9Sstevel@tonic-gate 14857c478bd9Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 14867c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14877c478bd9Sstevel@tonic-gate break; 14887c478bd9Sstevel@tonic-gate case DDI_INTROP_CLRMASK: 14897c478bd9Sstevel@tonic-gate if (psm_intr_ops == NULL) 14907c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14917c478bd9Sstevel@tonic-gate 14927c478bd9Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 14937c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14947c478bd9Sstevel@tonic-gate break; 14957c478bd9Sstevel@tonic-gate case DDI_INTROP_GETPENDING: 14967c478bd9Sstevel@tonic-gate if (psm_intr_ops == NULL) 14977c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 14987c478bd9Sstevel@tonic-gate 14997c478bd9Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 15007c478bd9Sstevel@tonic-gate result)) { 15017c478bd9Sstevel@tonic-gate *(int *)result = 0; 15027c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 15037c478bd9Sstevel@tonic-gate } 15047c478bd9Sstevel@tonic-gate break; 1505a54f81fbSanish case DDI_INTROP_NAVAIL: 15067c478bd9Sstevel@tonic-gate case DDI_INTROP_NINTRS: 1507a54f81fbSanish *(int *)result = i_ddi_get_intx_nintrs(rdip); 1508a54f81fbSanish if (*(int *)result == 0) { 15097c478bd9Sstevel@tonic-gate /* 15107c478bd9Sstevel@tonic-gate * Special case for 'pcic' driver' only. This driver 15117c478bd9Sstevel@tonic-gate * driver is a child of 'isa' and 'rootnex' drivers. 15127c478bd9Sstevel@tonic-gate * 15137c478bd9Sstevel@tonic-gate * See detailed comments on this in the function 15147c478bd9Sstevel@tonic-gate * rootnex_get_ispec(). 15157c478bd9Sstevel@tonic-gate * 15167c478bd9Sstevel@tonic-gate * Children of 'pcic' send 'NINITR' request all the 15177c478bd9Sstevel@tonic-gate * way to rootnex driver. But, the 'pdp->par_nintr' 15187c478bd9Sstevel@tonic-gate * field may not initialized. So, we fake it here 15197c478bd9Sstevel@tonic-gate * to return 1 (a la what PCMCIA nexus does). 15207c478bd9Sstevel@tonic-gate */ 15217c478bd9Sstevel@tonic-gate if (strcmp(ddi_get_name(rdip), "pcic") == 0) 15227c478bd9Sstevel@tonic-gate *(int *)result = 1; 1523a54f81fbSanish else 1524a54f81fbSanish return (DDI_FAILURE); 15257c478bd9Sstevel@tonic-gate } 15267c478bd9Sstevel@tonic-gate break; 15277c478bd9Sstevel@tonic-gate case DDI_INTROP_SUPPORTED_TYPES: 1528a54f81fbSanish *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */ 15297c478bd9Sstevel@tonic-gate break; 15307c478bd9Sstevel@tonic-gate default: 15317c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 15327c478bd9Sstevel@tonic-gate } 15337c478bd9Sstevel@tonic-gate 15347c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 15357c478bd9Sstevel@tonic-gate } 15367c478bd9Sstevel@tonic-gate 15377c478bd9Sstevel@tonic-gate 15387c478bd9Sstevel@tonic-gate /* 153912f080e7Smrj * rootnex_get_ispec() 154012f080e7Smrj * convert an interrupt number to an interrupt specification. 154112f080e7Smrj * The interrupt number determines which interrupt spec will be 154212f080e7Smrj * returned if more than one exists. 154312f080e7Smrj * 154412f080e7Smrj * Look into the parent private data area of the 'rdip' to find out 154512f080e7Smrj * the interrupt specification. First check to make sure there is 154612f080e7Smrj * one that matchs "inumber" and then return a pointer to it. 154712f080e7Smrj * 154812f080e7Smrj * Return NULL if one could not be found. 154912f080e7Smrj * 155012f080e7Smrj * NOTE: This is needed for rootnex_intr_ops() 15517c478bd9Sstevel@tonic-gate */ 155212f080e7Smrj static struct intrspec * 155312f080e7Smrj rootnex_get_ispec(dev_info_t *rdip, int inum) 15547c478bd9Sstevel@tonic-gate { 155512f080e7Smrj struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 15567c478bd9Sstevel@tonic-gate 15577c478bd9Sstevel@tonic-gate /* 155812f080e7Smrj * Special case handling for drivers that provide their own 155912f080e7Smrj * intrspec structures instead of relying on the DDI framework. 156012f080e7Smrj * 156112f080e7Smrj * A broken hardware driver in ON could potentially provide its 156212f080e7Smrj * own intrspec structure, instead of relying on the hardware. 156312f080e7Smrj * If these drivers are children of 'rootnex' then we need to 156412f080e7Smrj * continue to provide backward compatibility to them here. 156512f080e7Smrj * 156612f080e7Smrj * Following check is a special case for 'pcic' driver which 156712f080e7Smrj * was found to have broken hardwre andby provides its own intrspec. 156812f080e7Smrj * 156912f080e7Smrj * Verbatim comments from this driver are shown here: 157012f080e7Smrj * "Don't use the ddi_add_intr since we don't have a 157112f080e7Smrj * default intrspec in all cases." 157212f080e7Smrj * 157312f080e7Smrj * Since an 'ispec' may not be always created for it, 157412f080e7Smrj * check for that and create one if so. 157512f080e7Smrj * 157612f080e7Smrj * NOTE: Currently 'pcic' is the only driver found to do this. 15777c478bd9Sstevel@tonic-gate */ 157812f080e7Smrj if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 157912f080e7Smrj pdp->par_nintr = 1; 158012f080e7Smrj pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 158112f080e7Smrj pdp->par_nintr, KM_SLEEP); 158212f080e7Smrj } 158312f080e7Smrj 158412f080e7Smrj /* Validate the interrupt number */ 158512f080e7Smrj if (inum >= pdp->par_nintr) 158612f080e7Smrj return (NULL); 158712f080e7Smrj 158812f080e7Smrj /* Get the interrupt structure pointer and return that */ 158912f080e7Smrj return ((struct intrspec *)&pdp->par_intr[inum]); 159012f080e7Smrj } 159112f080e7Smrj 159212f080e7Smrj 159312f080e7Smrj /* 159412f080e7Smrj * ****************** 159512f080e7Smrj * dma related code 159612f080e7Smrj * ****************** 159712f080e7Smrj */ 159812f080e7Smrj 159912f080e7Smrj /*ARGSUSED*/ 160012f080e7Smrj static int 160120906b23SVikram Hegde rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 160220906b23SVikram Hegde ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 160320906b23SVikram Hegde ddi_dma_handle_t *handlep) 160412f080e7Smrj { 160512f080e7Smrj uint64_t maxsegmentsize_ll; 160612f080e7Smrj uint_t maxsegmentsize; 160712f080e7Smrj ddi_dma_impl_t *hp; 160812f080e7Smrj rootnex_dma_t *dma; 160912f080e7Smrj uint64_t count_max; 161012f080e7Smrj uint64_t seg; 161112f080e7Smrj int kmflag; 161212f080e7Smrj int e; 161312f080e7Smrj 161412f080e7Smrj 161512f080e7Smrj /* convert our sleep flags */ 161612f080e7Smrj if (waitfp == DDI_DMA_SLEEP) { 161712f080e7Smrj kmflag = KM_SLEEP; 161812f080e7Smrj } else { 161912f080e7Smrj kmflag = KM_NOSLEEP; 162012f080e7Smrj } 162112f080e7Smrj 162212f080e7Smrj /* 162312f080e7Smrj * We try to do only one memory allocation here. We'll do a little 162412f080e7Smrj * pointer manipulation later. If the bind ends up taking more than 162512f080e7Smrj * our prealloc's space, we'll have to allocate more memory in the 162612f080e7Smrj * bind operation. Not great, but much better than before and the 162712f080e7Smrj * best we can do with the current bind interfaces. 162812f080e7Smrj */ 162912f080e7Smrj hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 163012f080e7Smrj if (hp == NULL) { 163112f080e7Smrj if (waitfp != DDI_DMA_DONTWAIT) { 163212f080e7Smrj ddi_set_callback(waitfp, arg, 163312f080e7Smrj &rootnex_state->r_dvma_call_list_id); 163412f080e7Smrj } 163512f080e7Smrj return (DDI_DMA_NORESOURCES); 163612f080e7Smrj } 163712f080e7Smrj 163812f080e7Smrj /* Do our pointer manipulation now, align the structures */ 163912f080e7Smrj hp->dmai_private = (void *)(((uintptr_t)hp + 164012f080e7Smrj (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 164112f080e7Smrj dma = (rootnex_dma_t *)hp->dmai_private; 164212f080e7Smrj dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 164312f080e7Smrj sizeof (rootnex_dma_t) + 0x7) & ~0x7); 164412f080e7Smrj 164512f080e7Smrj /* setup the handle */ 164612f080e7Smrj rootnex_clean_dmahdl(hp); 164712f080e7Smrj dma->dp_dip = rdip; 164812f080e7Smrj dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 164912f080e7Smrj dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 165012f080e7Smrj hp->dmai_minxfer = attr->dma_attr_minxfer; 165112f080e7Smrj hp->dmai_burstsizes = attr->dma_attr_burstsizes; 165212f080e7Smrj hp->dmai_rdip = rdip; 165312f080e7Smrj hp->dmai_attr = *attr; 165412f080e7Smrj 165512f080e7Smrj /* we don't need to worry about the SPL since we do a tryenter */ 165612f080e7Smrj mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 165712f080e7Smrj 165812f080e7Smrj /* 165912f080e7Smrj * Figure out our maximum segment size. If the segment size is greater 166012f080e7Smrj * than 4G, we will limit it to (4G - 1) since the max size of a dma 166112f080e7Smrj * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 166212f080e7Smrj * dma_attr_count_max are size-1 type values. 166312f080e7Smrj * 166412f080e7Smrj * Maximum segment size is the largest physically contiguous chunk of 166512f080e7Smrj * memory that we can return from a bind (i.e. the maximum size of a 166612f080e7Smrj * single cookie). 166712f080e7Smrj */ 166812f080e7Smrj 166912f080e7Smrj /* handle the rollover cases */ 167012f080e7Smrj seg = attr->dma_attr_seg + 1; 167112f080e7Smrj if (seg < attr->dma_attr_seg) { 167212f080e7Smrj seg = attr->dma_attr_seg; 167312f080e7Smrj } 167412f080e7Smrj count_max = attr->dma_attr_count_max + 1; 167512f080e7Smrj if (count_max < attr->dma_attr_count_max) { 167612f080e7Smrj count_max = attr->dma_attr_count_max; 167712f080e7Smrj } 167812f080e7Smrj 167912f080e7Smrj /* 168012f080e7Smrj * granularity may or may not be a power of two. If it isn't, we can't 168112f080e7Smrj * use a simple mask. 168212f080e7Smrj */ 168312f080e7Smrj if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 168412f080e7Smrj dma->dp_granularity_power_2 = B_FALSE; 168512f080e7Smrj } else { 168612f080e7Smrj dma->dp_granularity_power_2 = B_TRUE; 168712f080e7Smrj } 168812f080e7Smrj 168912f080e7Smrj /* 169012f080e7Smrj * maxxfer should be a whole multiple of granularity. If we're going to 169112f080e7Smrj * break up a window because we're greater than maxxfer, we might as 169212f080e7Smrj * well make sure it's maxxfer is a whole multiple so we don't have to 169312f080e7Smrj * worry about triming the window later on for this case. 169412f080e7Smrj */ 169512f080e7Smrj if (attr->dma_attr_granular > 1) { 169612f080e7Smrj if (dma->dp_granularity_power_2) { 169712f080e7Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 169812f080e7Smrj (attr->dma_attr_maxxfer & 169912f080e7Smrj (attr->dma_attr_granular - 1)); 170012f080e7Smrj } else { 170112f080e7Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 170212f080e7Smrj (attr->dma_attr_maxxfer % attr->dma_attr_granular); 170312f080e7Smrj } 170412f080e7Smrj } else { 170512f080e7Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer; 170612f080e7Smrj } 170712f080e7Smrj 170812f080e7Smrj maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 170912f080e7Smrj maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 171012f080e7Smrj if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 171112f080e7Smrj maxsegmentsize = 0xFFFFFFFF; 171212f080e7Smrj } else { 171312f080e7Smrj maxsegmentsize = maxsegmentsize_ll; 171412f080e7Smrj } 171512f080e7Smrj dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 171612f080e7Smrj dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 171712f080e7Smrj 171812f080e7Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 171912f080e7Smrj if (rootnex_alloc_check_parms) { 172012f080e7Smrj e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 172112f080e7Smrj if (e != DDI_SUCCESS) { 172212f080e7Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 172312f080e7Smrj (void) rootnex_dma_freehdl(dip, rdip, 172412f080e7Smrj (ddi_dma_handle_t)hp); 172512f080e7Smrj return (e); 172612f080e7Smrj } 172712f080e7Smrj } 172812f080e7Smrj 172912f080e7Smrj *handlep = (ddi_dma_handle_t)hp; 173012f080e7Smrj 17310b7ba611SMark Johnson ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 17320b7ba611SMark Johnson ROOTNEX_DPROBE1(rootnex__alloc__handle, uint64_t, 173312f080e7Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 173412f080e7Smrj 173512f080e7Smrj return (DDI_SUCCESS); 173612f080e7Smrj } 173712f080e7Smrj 173812f080e7Smrj 173912f080e7Smrj /* 174020906b23SVikram Hegde * rootnex_dma_allochdl() 174120906b23SVikram Hegde * called from ddi_dma_alloc_handle(). 174212f080e7Smrj */ 174320906b23SVikram Hegde static int 174420906b23SVikram Hegde rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 174520906b23SVikram Hegde int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 174620906b23SVikram Hegde { 1747*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 174820906b23SVikram Hegde uint_t error = ENOTSUP; 174920906b23SVikram Hegde int retval; 175020906b23SVikram Hegde 175120906b23SVikram Hegde retval = iommulib_nex_open(rdip, &error); 175220906b23SVikram Hegde 175320906b23SVikram Hegde if (retval != DDI_SUCCESS && error == ENOTSUP) { 175420906b23SVikram Hegde /* No IOMMU */ 175520906b23SVikram Hegde return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 175620906b23SVikram Hegde handlep)); 175720906b23SVikram Hegde } else if (retval != DDI_SUCCESS) { 175820906b23SVikram Hegde return (DDI_FAILURE); 175920906b23SVikram Hegde } 176020906b23SVikram Hegde 1761b51bbbf5SVikram Hegde ASSERT(IOMMU_USED(rdip)); 176220906b23SVikram Hegde 176320906b23SVikram Hegde /* has an IOMMU */ 176420906b23SVikram Hegde return (iommulib_nexdma_allochdl(dip, rdip, attr, 176520906b23SVikram Hegde waitfp, arg, handlep)); 176620906b23SVikram Hegde #else 176720906b23SVikram Hegde return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 176820906b23SVikram Hegde handlep)); 176920906b23SVikram Hegde #endif 177020906b23SVikram Hegde } 177120906b23SVikram Hegde 177212f080e7Smrj /*ARGSUSED*/ 177312f080e7Smrj static int 177420906b23SVikram Hegde rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 177520906b23SVikram Hegde ddi_dma_handle_t handle) 177612f080e7Smrj { 177712f080e7Smrj ddi_dma_impl_t *hp; 177812f080e7Smrj rootnex_dma_t *dma; 177912f080e7Smrj 178012f080e7Smrj 178112f080e7Smrj hp = (ddi_dma_impl_t *)handle; 178212f080e7Smrj dma = (rootnex_dma_t *)hp->dmai_private; 178312f080e7Smrj 178412f080e7Smrj /* unbind should have been called first */ 178512f080e7Smrj ASSERT(!dma->dp_inuse); 178612f080e7Smrj 178712f080e7Smrj mutex_destroy(&dma->dp_mutex); 178812f080e7Smrj kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 178912f080e7Smrj 17900b7ba611SMark Johnson ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 17910b7ba611SMark Johnson ROOTNEX_DPROBE1(rootnex__free__handle, uint64_t, 179212f080e7Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 179312f080e7Smrj 179412f080e7Smrj if (rootnex_state->r_dvma_call_list_id) 179512f080e7Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 179612f080e7Smrj 179712f080e7Smrj return (DDI_SUCCESS); 179812f080e7Smrj } 179912f080e7Smrj 180012f080e7Smrj /* 180120906b23SVikram Hegde * rootnex_dma_freehdl() 180220906b23SVikram Hegde * called from ddi_dma_free_handle(). 180312f080e7Smrj */ 180420906b23SVikram Hegde static int 180520906b23SVikram Hegde rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 180620906b23SVikram Hegde { 1807*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 1808b51bbbf5SVikram Hegde if (IOMMU_USED(rdip)) { 180920906b23SVikram Hegde return (iommulib_nexdma_freehdl(dip, rdip, handle)); 181020906b23SVikram Hegde } 181120906b23SVikram Hegde #endif 181220906b23SVikram Hegde return (rootnex_coredma_freehdl(dip, rdip, handle)); 181320906b23SVikram Hegde } 181420906b23SVikram Hegde 181512f080e7Smrj /*ARGSUSED*/ 181612f080e7Smrj static int 181720906b23SVikram Hegde rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 181820906b23SVikram Hegde ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 181920906b23SVikram Hegde ddi_dma_cookie_t *cookiep, uint_t *ccountp) 182012f080e7Smrj { 182112f080e7Smrj rootnex_sglinfo_t *sinfo; 182212f080e7Smrj ddi_dma_attr_t *attr; 182312f080e7Smrj ddi_dma_impl_t *hp; 182412f080e7Smrj rootnex_dma_t *dma; 182512f080e7Smrj int kmflag; 182612f080e7Smrj int e; 182712f080e7Smrj 182812f080e7Smrj hp = (ddi_dma_impl_t *)handle; 182912f080e7Smrj dma = (rootnex_dma_t *)hp->dmai_private; 183012f080e7Smrj sinfo = &dma->dp_sglinfo; 183112f080e7Smrj attr = &hp->dmai_attr; 183212f080e7Smrj 183394f1124eSVikram Hegde if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 183494f1124eSVikram Hegde dma->dp_sleep_flags = KM_SLEEP; 183594f1124eSVikram Hegde } else { 183694f1124eSVikram Hegde dma->dp_sleep_flags = KM_NOSLEEP; 183794f1124eSVikram Hegde } 183894f1124eSVikram Hegde 183912f080e7Smrj hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 184012f080e7Smrj 184112f080e7Smrj /* 184212f080e7Smrj * This is useful for debugging a driver. Not as useful in a production 184312f080e7Smrj * system. The only time this will fail is if you have a driver bug. 184412f080e7Smrj */ 184512f080e7Smrj if (rootnex_bind_check_inuse) { 184612f080e7Smrj /* 184712f080e7Smrj * No one else should ever have this lock unless someone else 184812f080e7Smrj * is trying to use this handle. So contention on the lock 184912f080e7Smrj * is the same as inuse being set. 185012f080e7Smrj */ 185112f080e7Smrj e = mutex_tryenter(&dma->dp_mutex); 185212f080e7Smrj if (e == 0) { 185312f080e7Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 185412f080e7Smrj return (DDI_DMA_INUSE); 185512f080e7Smrj } 185612f080e7Smrj if (dma->dp_inuse) { 185712f080e7Smrj mutex_exit(&dma->dp_mutex); 185812f080e7Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 185912f080e7Smrj return (DDI_DMA_INUSE); 186012f080e7Smrj } 186112f080e7Smrj dma->dp_inuse = B_TRUE; 186212f080e7Smrj mutex_exit(&dma->dp_mutex); 186312f080e7Smrj } 186412f080e7Smrj 186512f080e7Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 186612f080e7Smrj if (rootnex_bind_check_parms) { 186712f080e7Smrj e = rootnex_valid_bind_parms(dmareq, attr); 186812f080e7Smrj if (e != DDI_SUCCESS) { 186912f080e7Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 187012f080e7Smrj rootnex_clean_dmahdl(hp); 187112f080e7Smrj return (e); 187212f080e7Smrj } 187312f080e7Smrj } 187412f080e7Smrj 187512f080e7Smrj /* save away the original bind info */ 187612f080e7Smrj dma->dp_dma = dmareq->dmar_object; 187712f080e7Smrj 1878*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 1879*3a634bfcSVikram Hegde e = immu_map_sgl(hp, dmareq, rootnex_prealloc_cookies, rdip); 188086c1f4dcSVikram Hegde switch (e) { 1881*3a634bfcSVikram Hegde case DDI_DMA_MAPPED: 1882*3a634bfcSVikram Hegde goto out; 1883*3a634bfcSVikram Hegde case DDI_DMA_USE_PHYSICAL: 1884*3a634bfcSVikram Hegde break; 1885*3a634bfcSVikram Hegde case DDI_DMA_PARTIAL: 1886*3a634bfcSVikram Hegde ddi_err(DER_PANIC, rdip, "Partial DVMA map"); 1887*3a634bfcSVikram Hegde e = DDI_DMA_NORESOURCES; 1888*3a634bfcSVikram Hegde /*FALLTHROUGH*/ 188986c1f4dcSVikram Hegde default: 1890*3a634bfcSVikram Hegde ddi_err(DER_MODE, rdip, "DVMA map failed"); 1891*3a634bfcSVikram Hegde ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 189286c1f4dcSVikram Hegde rootnex_clean_dmahdl(hp); 1893*3a634bfcSVikram Hegde return (e); 189486c1f4dcSVikram Hegde } 189520906b23SVikram Hegde #endif 189686c1f4dcSVikram Hegde 189712f080e7Smrj /* 189812f080e7Smrj * Figure out a rough estimate of what maximum number of pages this 189912f080e7Smrj * buffer could use (a high estimate of course). 190012f080e7Smrj */ 190112f080e7Smrj sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 190212f080e7Smrj 190312f080e7Smrj /* 190412f080e7Smrj * We'll use the pre-allocated cookies for any bind that will *always* 190512f080e7Smrj * fit (more important to be consistent, we don't want to create 190612f080e7Smrj * additional degenerate cases). 190712f080e7Smrj */ 190812f080e7Smrj if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 190912f080e7Smrj dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 191012f080e7Smrj dma->dp_need_to_free_cookie = B_FALSE; 191112f080e7Smrj DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 191212f080e7Smrj uint_t, sinfo->si_max_pages); 191312f080e7Smrj 191412f080e7Smrj /* 191512f080e7Smrj * For anything larger than that, we'll go ahead and allocate the 191612f080e7Smrj * maximum number of pages we expect to see. Hopefuly, we won't be 191712f080e7Smrj * seeing this path in the fast path for high performance devices very 191812f080e7Smrj * frequently. 191912f080e7Smrj * 192012f080e7Smrj * a ddi bind interface that allowed the driver to provide storage to 192112f080e7Smrj * the bind interface would speed this case up. 192212f080e7Smrj */ 192312f080e7Smrj } else { 192412f080e7Smrj /* convert the sleep flags */ 192512f080e7Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 192612f080e7Smrj kmflag = KM_SLEEP; 192712f080e7Smrj } else { 192812f080e7Smrj kmflag = KM_NOSLEEP; 192912f080e7Smrj } 193012f080e7Smrj 193112f080e7Smrj /* 193212f080e7Smrj * Save away how much memory we allocated. If we're doing a 193312f080e7Smrj * nosleep, the alloc could fail... 193412f080e7Smrj */ 193512f080e7Smrj dma->dp_cookie_size = sinfo->si_max_pages * 193612f080e7Smrj sizeof (ddi_dma_cookie_t); 193712f080e7Smrj dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 193812f080e7Smrj if (dma->dp_cookies == NULL) { 193912f080e7Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 194012f080e7Smrj rootnex_clean_dmahdl(hp); 194112f080e7Smrj return (DDI_DMA_NORESOURCES); 194212f080e7Smrj } 194312f080e7Smrj dma->dp_need_to_free_cookie = B_TRUE; 194412f080e7Smrj DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 194512f080e7Smrj sinfo->si_max_pages); 194612f080e7Smrj } 194712f080e7Smrj hp->dmai_cookie = dma->dp_cookies; 194812f080e7Smrj 194912f080e7Smrj /* 195012f080e7Smrj * Get the real sgl. rootnex_get_sgl will fill in cookie array while 1951*3a634bfcSVikram Hegde * looking at the constraints in the dma structure. It will then put 1952*3a634bfcSVikram Hegde * some additional state about the sgl in the dma struct (i.e. is 1953*3a634bfcSVikram Hegde * the sgl clean, or do we need to do some munging; how many pages 1954*3a634bfcSVikram Hegde * need to be copied, etc.) 195512f080e7Smrj */ 195612f080e7Smrj rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 195712f080e7Smrj &dma->dp_sglinfo); 195812f080e7Smrj 1959*3a634bfcSVikram Hegde out: 196086c1f4dcSVikram Hegde ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 196112f080e7Smrj /* if we don't need a copy buffer, we don't need to sync */ 196212f080e7Smrj if (sinfo->si_copybuf_req == 0) { 196312f080e7Smrj hp->dmai_rflags |= DMP_NOSYNC; 196412f080e7Smrj } 196512f080e7Smrj 196612f080e7Smrj /* 196712f080e7Smrj * if we don't need the copybuf and we don't need to do a partial, we 196812f080e7Smrj * hit the fast path. All the high performance devices should be trying 196912f080e7Smrj * to hit this path. To hit this path, a device should be able to reach 197012f080e7Smrj * all of memory, shouldn't try to bind more than it can transfer, and 197112f080e7Smrj * the buffer shouldn't require more cookies than the driver/device can 197212f080e7Smrj * handle [sgllen]). 197312f080e7Smrj */ 197412f080e7Smrj if ((sinfo->si_copybuf_req == 0) && 197512f080e7Smrj (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 197612f080e7Smrj (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 197712f080e7Smrj /* 197885c8e0e8Sstephh * If the driver supports FMA, insert the handle in the FMA DMA 197985c8e0e8Sstephh * handle cache. 198085c8e0e8Sstephh */ 198185c8e0e8Sstephh if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 198285c8e0e8Sstephh hp->dmai_error.err_cf = rootnex_dma_check; 198385c8e0e8Sstephh (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 198485c8e0e8Sstephh } 198585c8e0e8Sstephh 198685c8e0e8Sstephh /* 198712f080e7Smrj * copy out the first cookie and ccountp, set the cookie 198812f080e7Smrj * pointer to the second cookie. The first cookie is passed 198912f080e7Smrj * back on the stack. Additional cookies are accessed via 199012f080e7Smrj * ddi_dma_nextcookie() 199112f080e7Smrj */ 199212f080e7Smrj *cookiep = dma->dp_cookies[0]; 199312f080e7Smrj *ccountp = sinfo->si_sgl_size; 199412f080e7Smrj hp->dmai_cookie++; 199512f080e7Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1996*3a634bfcSVikram Hegde ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1997*3a634bfcSVikram Hegde DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, 1998*3a634bfcSVikram Hegde uint64_t, rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], 1999*3a634bfcSVikram Hegde uint_t, dma->dp_dma.dmao_size); 2000*3a634bfcSVikram Hegde 2001*3a634bfcSVikram Hegde 200212f080e7Smrj return (DDI_DMA_MAPPED); 200312f080e7Smrj } 200412f080e7Smrj 200512f080e7Smrj /* 200612f080e7Smrj * go to the slow path, we may need to alloc more memory, create 200712f080e7Smrj * multiple windows, and munge up a sgl to make the device happy. 200812f080e7Smrj */ 200912f080e7Smrj e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 201012f080e7Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 201112f080e7Smrj if (dma->dp_need_to_free_cookie) { 201212f080e7Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 201312f080e7Smrj } 201412f080e7Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 201512f080e7Smrj rootnex_clean_dmahdl(hp); /* must be after free cookie */ 201612f080e7Smrj return (e); 201712f080e7Smrj } 201812f080e7Smrj 201985c8e0e8Sstephh /* 202085c8e0e8Sstephh * If the driver supports FMA, insert the handle in the FMA DMA handle 202185c8e0e8Sstephh * cache. 202285c8e0e8Sstephh */ 202385c8e0e8Sstephh if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 202485c8e0e8Sstephh hp->dmai_error.err_cf = rootnex_dma_check; 202585c8e0e8Sstephh (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 202685c8e0e8Sstephh } 202785c8e0e8Sstephh 202812f080e7Smrj /* if the first window uses the copy buffer, sync it for the device */ 202912f080e7Smrj if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 203012f080e7Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 203194f1124eSVikram Hegde (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 203212f080e7Smrj DDI_DMA_SYNC_FORDEV); 203312f080e7Smrj } 203412f080e7Smrj 203512f080e7Smrj /* 203612f080e7Smrj * copy out the first cookie and ccountp, set the cookie pointer to the 203712f080e7Smrj * second cookie. Make sure the partial flag is set/cleared correctly. 203812f080e7Smrj * If we have a partial map (i.e. multiple windows), the number of 203912f080e7Smrj * cookies we return is the number of cookies in the first window. 204012f080e7Smrj */ 204112f080e7Smrj if (e == DDI_DMA_MAPPED) { 204212f080e7Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 204312f080e7Smrj *ccountp = sinfo->si_sgl_size; 2044*3a634bfcSVikram Hegde hp->dmai_nwin = 1; 204512f080e7Smrj } else { 204612f080e7Smrj hp->dmai_rflags |= DDI_DMA_PARTIAL; 204712f080e7Smrj *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 204812f080e7Smrj ASSERT(hp->dmai_nwin <= dma->dp_max_win); 204912f080e7Smrj } 205012f080e7Smrj *cookiep = dma->dp_cookies[0]; 205112f080e7Smrj hp->dmai_cookie++; 205212f080e7Smrj 20530b7ba611SMark Johnson ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 20540b7ba611SMark Johnson ROOTNEX_DPROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 205512f080e7Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 205612f080e7Smrj dma->dp_dma.dmao_size); 205712f080e7Smrj return (e); 205812f080e7Smrj } 205912f080e7Smrj 206012f080e7Smrj /* 206120906b23SVikram Hegde * rootnex_dma_bindhdl() 206220906b23SVikram Hegde * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 206312f080e7Smrj */ 206420906b23SVikram Hegde static int 206520906b23SVikram Hegde rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 206620906b23SVikram Hegde ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 206720906b23SVikram Hegde ddi_dma_cookie_t *cookiep, uint_t *ccountp) 206820906b23SVikram Hegde { 2069*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 2070b51bbbf5SVikram Hegde if (IOMMU_USED(rdip)) { 207120906b23SVikram Hegde return (iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq, 207220906b23SVikram Hegde cookiep, ccountp)); 207320906b23SVikram Hegde } 207420906b23SVikram Hegde #endif 207520906b23SVikram Hegde return (rootnex_coredma_bindhdl(dip, rdip, handle, dmareq, 207620906b23SVikram Hegde cookiep, ccountp)); 207720906b23SVikram Hegde } 207820906b23SVikram Hegde 2079*3a634bfcSVikram Hegde 2080*3a634bfcSVikram Hegde 208112f080e7Smrj /*ARGSUSED*/ 208212f080e7Smrj static int 208320906b23SVikram Hegde rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 208412f080e7Smrj ddi_dma_handle_t handle) 208512f080e7Smrj { 208612f080e7Smrj ddi_dma_impl_t *hp; 208712f080e7Smrj rootnex_dma_t *dma; 208812f080e7Smrj int e; 208912f080e7Smrj 209012f080e7Smrj hp = (ddi_dma_impl_t *)handle; 209112f080e7Smrj dma = (rootnex_dma_t *)hp->dmai_private; 209212f080e7Smrj 209312f080e7Smrj /* make sure the buffer wasn't free'd before calling unbind */ 209412f080e7Smrj if (rootnex_unbind_verify_buffer) { 209512f080e7Smrj e = rootnex_verify_buffer(dma); 209612f080e7Smrj if (e != DDI_SUCCESS) { 209712f080e7Smrj ASSERT(0); 209812f080e7Smrj return (DDI_FAILURE); 209912f080e7Smrj } 210012f080e7Smrj } 210112f080e7Smrj 210212f080e7Smrj /* sync the current window before unbinding the buffer */ 210312f080e7Smrj if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 210412f080e7Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 210594f1124eSVikram Hegde (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 210612f080e7Smrj DDI_DMA_SYNC_FORCPU); 210712f080e7Smrj } 210812f080e7Smrj 210912f080e7Smrj /* 211000d0963fSdilpreet * If the driver supports FMA, remove the handle in the FMA DMA handle 211100d0963fSdilpreet * cache. 211200d0963fSdilpreet */ 211300d0963fSdilpreet if (hp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 211400d0963fSdilpreet if ((DEVI(rdip)->devi_fmhdl != NULL) && 211500d0963fSdilpreet (DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap))) { 211600d0963fSdilpreet (void) ndi_fmc_remove(rdip, DMA_HANDLE, hp); 211700d0963fSdilpreet } 211800d0963fSdilpreet } 211900d0963fSdilpreet 212000d0963fSdilpreet /* 212112f080e7Smrj * cleanup and copy buffer or window state. if we didn't use the copy 212212f080e7Smrj * buffer or windows, there won't be much to do :-) 212312f080e7Smrj */ 212412f080e7Smrj rootnex_teardown_copybuf(dma); 212512f080e7Smrj rootnex_teardown_windows(dma); 212612f080e7Smrj 2127*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 212812f080e7Smrj /* 2129*3a634bfcSVikram Hegde * Clean up the page tables and free the dvma 213086c1f4dcSVikram Hegde */ 2131*3a634bfcSVikram Hegde e = immu_unmap_sgl(hp, rdip); 2132*3a634bfcSVikram Hegde if (e != DDI_DMA_USE_PHYSICAL && e != DDI_SUCCESS) { 2133*3a634bfcSVikram Hegde return (e); 213486c1f4dcSVikram Hegde } 213520906b23SVikram Hegde #endif 213686c1f4dcSVikram Hegde 213786c1f4dcSVikram Hegde /* 213812f080e7Smrj * If we had to allocate space to for the worse case sgl (it didn't 213912f080e7Smrj * fit into our pre-allocate buffer), free that up now 214012f080e7Smrj */ 214112f080e7Smrj if (dma->dp_need_to_free_cookie) { 214212f080e7Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 214312f080e7Smrj } 214412f080e7Smrj 214512f080e7Smrj /* 214612f080e7Smrj * clean up the handle so it's ready for the next bind (i.e. if the 214712f080e7Smrj * handle is reused). 214812f080e7Smrj */ 214912f080e7Smrj rootnex_clean_dmahdl(hp); 215012f080e7Smrj 215112f080e7Smrj if (rootnex_state->r_dvma_call_list_id) 215212f080e7Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 215312f080e7Smrj 21540b7ba611SMark Johnson ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 21550b7ba611SMark Johnson ROOTNEX_DPROBE1(rootnex__unbind, uint64_t, 215612f080e7Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 215712f080e7Smrj 215812f080e7Smrj return (DDI_SUCCESS); 215912f080e7Smrj } 216012f080e7Smrj 216120906b23SVikram Hegde /* 216220906b23SVikram Hegde * rootnex_dma_unbindhdl() 216320906b23SVikram Hegde * called from ddi_dma_unbind_handle() 216420906b23SVikram Hegde */ 216520906b23SVikram Hegde /*ARGSUSED*/ 216620906b23SVikram Hegde static int 216720906b23SVikram Hegde rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 216820906b23SVikram Hegde ddi_dma_handle_t handle) 216920906b23SVikram Hegde { 2170*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 2171b51bbbf5SVikram Hegde if (IOMMU_USED(rdip)) { 217220906b23SVikram Hegde return (iommulib_nexdma_unbindhdl(dip, rdip, handle)); 217320906b23SVikram Hegde } 217420906b23SVikram Hegde #endif 217520906b23SVikram Hegde return (rootnex_coredma_unbindhdl(dip, rdip, handle)); 217620906b23SVikram Hegde } 217720906b23SVikram Hegde 2178*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 217994f1124eSVikram Hegde 218094f1124eSVikram Hegde static int 218194f1124eSVikram Hegde rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle) 218294f1124eSVikram Hegde { 218394f1124eSVikram Hegde ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 218494f1124eSVikram Hegde rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 218594f1124eSVikram Hegde 218694f1124eSVikram Hegde if (dma->dp_sleep_flags != KM_SLEEP && 218794f1124eSVikram Hegde dma->dp_sleep_flags != KM_NOSLEEP) 218894f1124eSVikram Hegde cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle"); 218994f1124eSVikram Hegde return (dma->dp_sleep_flags); 219094f1124eSVikram Hegde } 219120906b23SVikram Hegde /*ARGSUSED*/ 219220906b23SVikram Hegde static void 219320906b23SVikram Hegde rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 219420906b23SVikram Hegde { 219520906b23SVikram Hegde ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 219620906b23SVikram Hegde rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 219794f1124eSVikram Hegde rootnex_window_t *window; 219820906b23SVikram Hegde 219994f1124eSVikram Hegde if (dma->dp_window) { 220094f1124eSVikram Hegde window = &dma->dp_window[dma->dp_current_win]; 220194f1124eSVikram Hegde hp->dmai_cookie = window->wd_first_cookie; 220294f1124eSVikram Hegde } else { 220394f1124eSVikram Hegde hp->dmai_cookie = dma->dp_cookies; 220494f1124eSVikram Hegde } 220520906b23SVikram Hegde hp->dmai_cookie++; 220620906b23SVikram Hegde } 220720906b23SVikram Hegde 220820906b23SVikram Hegde /*ARGSUSED*/ 220920906b23SVikram Hegde static int 221020906b23SVikram Hegde rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 221194f1124eSVikram Hegde ddi_dma_cookie_t **cookiepp, uint_t *ccountp) 221220906b23SVikram Hegde { 221394f1124eSVikram Hegde int i; 221494f1124eSVikram Hegde int km_flags; 221520906b23SVikram Hegde ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 221620906b23SVikram Hegde rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 221794f1124eSVikram Hegde rootnex_window_t *window; 221894f1124eSVikram Hegde ddi_dma_cookie_t *cp; 221994f1124eSVikram Hegde ddi_dma_cookie_t *cookie; 222020906b23SVikram Hegde 222194f1124eSVikram Hegde ASSERT(*cookiepp == NULL); 222294f1124eSVikram Hegde ASSERT(*ccountp == 0); 222320906b23SVikram Hegde 222494f1124eSVikram Hegde if (dma->dp_window) { 222594f1124eSVikram Hegde window = &dma->dp_window[dma->dp_current_win]; 222694f1124eSVikram Hegde cp = window->wd_first_cookie; 222794f1124eSVikram Hegde *ccountp = window->wd_cookie_cnt; 222820906b23SVikram Hegde } else { 222994f1124eSVikram Hegde cp = dma->dp_cookies; 223020906b23SVikram Hegde *ccountp = dma->dp_sglinfo.si_sgl_size; 223120906b23SVikram Hegde } 223220906b23SVikram Hegde 223394f1124eSVikram Hegde km_flags = rootnex_coredma_get_sleep_flags(handle); 223494f1124eSVikram Hegde cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags); 223594f1124eSVikram Hegde if (cookie == NULL) { 223694f1124eSVikram Hegde return (DDI_DMA_NORESOURCES); 223794f1124eSVikram Hegde } 223894f1124eSVikram Hegde 223994f1124eSVikram Hegde for (i = 0; i < *ccountp; i++) { 224094f1124eSVikram Hegde cookie[i].dmac_notused = cp[i].dmac_notused; 224194f1124eSVikram Hegde cookie[i].dmac_type = cp[i].dmac_type; 224294f1124eSVikram Hegde cookie[i].dmac_address = cp[i].dmac_address; 224394f1124eSVikram Hegde cookie[i].dmac_size = cp[i].dmac_size; 224494f1124eSVikram Hegde } 224594f1124eSVikram Hegde 224694f1124eSVikram Hegde *cookiepp = cookie; 224720906b23SVikram Hegde 224820906b23SVikram Hegde return (DDI_SUCCESS); 224920906b23SVikram Hegde } 225094f1124eSVikram Hegde 225194f1124eSVikram Hegde /*ARGSUSED*/ 225294f1124eSVikram Hegde static int 225394f1124eSVikram Hegde rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 225494f1124eSVikram Hegde ddi_dma_cookie_t *cookiep, uint_t ccount) 225594f1124eSVikram Hegde { 225694f1124eSVikram Hegde ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 225794f1124eSVikram Hegde rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 225894f1124eSVikram Hegde rootnex_window_t *window; 225994f1124eSVikram Hegde ddi_dma_cookie_t *cur_cookiep; 226094f1124eSVikram Hegde 226194f1124eSVikram Hegde ASSERT(cookiep); 226294f1124eSVikram Hegde ASSERT(ccount != 0); 226394f1124eSVikram Hegde ASSERT(dma->dp_need_to_switch_cookies == B_FALSE); 226494f1124eSVikram Hegde 226594f1124eSVikram Hegde if (dma->dp_window) { 226694f1124eSVikram Hegde window = &dma->dp_window[dma->dp_current_win]; 226794f1124eSVikram Hegde dma->dp_saved_cookies = window->wd_first_cookie; 226894f1124eSVikram Hegde window->wd_first_cookie = cookiep; 226994f1124eSVikram Hegde ASSERT(ccount == window->wd_cookie_cnt); 227094f1124eSVikram Hegde cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 227194f1124eSVikram Hegde + window->wd_first_cookie; 227294f1124eSVikram Hegde } else { 227394f1124eSVikram Hegde dma->dp_saved_cookies = dma->dp_cookies; 227494f1124eSVikram Hegde dma->dp_cookies = cookiep; 227594f1124eSVikram Hegde ASSERT(ccount == dma->dp_sglinfo.si_sgl_size); 227694f1124eSVikram Hegde cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 227794f1124eSVikram Hegde + dma->dp_cookies; 227894f1124eSVikram Hegde } 227994f1124eSVikram Hegde 228094f1124eSVikram Hegde dma->dp_need_to_switch_cookies = B_TRUE; 228194f1124eSVikram Hegde hp->dmai_cookie = cur_cookiep; 228294f1124eSVikram Hegde 228394f1124eSVikram Hegde return (DDI_SUCCESS); 228494f1124eSVikram Hegde } 228594f1124eSVikram Hegde 228694f1124eSVikram Hegde /*ARGSUSED*/ 228794f1124eSVikram Hegde static int 228894f1124eSVikram Hegde rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 228994f1124eSVikram Hegde { 229094f1124eSVikram Hegde ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 229194f1124eSVikram Hegde rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 229294f1124eSVikram Hegde rootnex_window_t *window; 229394f1124eSVikram Hegde ddi_dma_cookie_t *cur_cookiep; 229494f1124eSVikram Hegde ddi_dma_cookie_t *cookie_array; 229594f1124eSVikram Hegde uint_t ccount; 229694f1124eSVikram Hegde 229794f1124eSVikram Hegde /* check if cookies have not been switched */ 229894f1124eSVikram Hegde if (dma->dp_need_to_switch_cookies == B_FALSE) 229994f1124eSVikram Hegde return (DDI_SUCCESS); 230094f1124eSVikram Hegde 230194f1124eSVikram Hegde ASSERT(dma->dp_saved_cookies); 230294f1124eSVikram Hegde 230394f1124eSVikram Hegde if (dma->dp_window) { 230494f1124eSVikram Hegde window = &dma->dp_window[dma->dp_current_win]; 230594f1124eSVikram Hegde cookie_array = window->wd_first_cookie; 230694f1124eSVikram Hegde window->wd_first_cookie = dma->dp_saved_cookies; 230794f1124eSVikram Hegde dma->dp_saved_cookies = NULL; 230894f1124eSVikram Hegde ccount = window->wd_cookie_cnt; 230994f1124eSVikram Hegde cur_cookiep = (hp->dmai_cookie - cookie_array) 231094f1124eSVikram Hegde + window->wd_first_cookie; 231194f1124eSVikram Hegde } else { 231294f1124eSVikram Hegde cookie_array = dma->dp_cookies; 231394f1124eSVikram Hegde dma->dp_cookies = dma->dp_saved_cookies; 231494f1124eSVikram Hegde dma->dp_saved_cookies = NULL; 231594f1124eSVikram Hegde ccount = dma->dp_sglinfo.si_sgl_size; 231694f1124eSVikram Hegde cur_cookiep = (hp->dmai_cookie - cookie_array) 231794f1124eSVikram Hegde + dma->dp_cookies; 231894f1124eSVikram Hegde } 231994f1124eSVikram Hegde 232094f1124eSVikram Hegde kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount); 232194f1124eSVikram Hegde 232294f1124eSVikram Hegde hp->dmai_cookie = cur_cookiep; 232394f1124eSVikram Hegde 232494f1124eSVikram Hegde dma->dp_need_to_switch_cookies = B_FALSE; 232594f1124eSVikram Hegde 232694f1124eSVikram Hegde return (DDI_SUCCESS); 232794f1124eSVikram Hegde } 232894f1124eSVikram Hegde 23295dfdb46bSVikram Hegde #endif 233012f080e7Smrj 233112f080e7Smrj /* 233212f080e7Smrj * rootnex_verify_buffer() 233312f080e7Smrj * verify buffer wasn't free'd 233412f080e7Smrj */ 233512f080e7Smrj static int 233612f080e7Smrj rootnex_verify_buffer(rootnex_dma_t *dma) 233712f080e7Smrj { 233812f080e7Smrj page_t **pplist; 233912f080e7Smrj caddr_t vaddr; 234012f080e7Smrj uint_t pcnt; 234112f080e7Smrj uint_t poff; 234212f080e7Smrj page_t *pp; 234300d0963fSdilpreet char b; 234412f080e7Smrj int i; 234512f080e7Smrj 234612f080e7Smrj /* Figure out how many pages this buffer occupies */ 234712f080e7Smrj if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 234812f080e7Smrj poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 234912f080e7Smrj } else { 235012f080e7Smrj vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 235112f080e7Smrj poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 235212f080e7Smrj } 235312f080e7Smrj pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 235412f080e7Smrj 235512f080e7Smrj switch (dma->dp_dma.dmao_type) { 235612f080e7Smrj case DMA_OTYP_PAGES: 235712f080e7Smrj /* 235812f080e7Smrj * for a linked list of pp's walk through them to make sure 235912f080e7Smrj * they're locked and not free. 236012f080e7Smrj */ 236112f080e7Smrj pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 236212f080e7Smrj for (i = 0; i < pcnt; i++) { 236312f080e7Smrj if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 236412f080e7Smrj return (DDI_FAILURE); 236512f080e7Smrj } 23667c478bd9Sstevel@tonic-gate pp = pp->p_next; 23677c478bd9Sstevel@tonic-gate } 23687c478bd9Sstevel@tonic-gate break; 236912f080e7Smrj 23707c478bd9Sstevel@tonic-gate case DMA_OTYP_VADDR: 23717c478bd9Sstevel@tonic-gate case DMA_OTYP_BUFVADDR: 237212f080e7Smrj pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 237312f080e7Smrj /* 237412f080e7Smrj * for an array of pp's walk through them to make sure they're 237512f080e7Smrj * not free. It's possible that they may not be locked. 237612f080e7Smrj */ 237712f080e7Smrj if (pplist) { 237812f080e7Smrj for (i = 0; i < pcnt; i++) { 237912f080e7Smrj if (PP_ISFREE(pplist[i])) { 238012f080e7Smrj return (DDI_FAILURE); 238112f080e7Smrj } 238212f080e7Smrj } 238312f080e7Smrj 238412f080e7Smrj /* For a virtual address, try to peek at each page */ 238512f080e7Smrj } else { 238612f080e7Smrj if (dma->dp_sglinfo.si_asp == &kas) { 238712f080e7Smrj for (i = 0; i < pcnt; i++) { 238800d0963fSdilpreet if (ddi_peek8(NULL, vaddr, &b) == 238900d0963fSdilpreet DDI_FAILURE) 239012f080e7Smrj return (DDI_FAILURE); 239100d0963fSdilpreet vaddr += MMU_PAGESIZE; 239212f080e7Smrj } 239312f080e7Smrj } 239412f080e7Smrj } 239512f080e7Smrj break; 239612f080e7Smrj 239712f080e7Smrj default: 239812f080e7Smrj ASSERT(0); 239912f080e7Smrj break; 240012f080e7Smrj } 240112f080e7Smrj 240212f080e7Smrj return (DDI_SUCCESS); 240312f080e7Smrj } 240412f080e7Smrj 240512f080e7Smrj 240612f080e7Smrj /* 240712f080e7Smrj * rootnex_clean_dmahdl() 240812f080e7Smrj * Clean the dma handle. This should be called on a handle alloc and an 240912f080e7Smrj * unbind handle. Set the handle state to the default settings. 241012f080e7Smrj */ 241112f080e7Smrj static void 241212f080e7Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 241312f080e7Smrj { 241412f080e7Smrj rootnex_dma_t *dma; 241512f080e7Smrj 241612f080e7Smrj 241712f080e7Smrj dma = (rootnex_dma_t *)hp->dmai_private; 241812f080e7Smrj 241912f080e7Smrj hp->dmai_nwin = 0; 242012f080e7Smrj dma->dp_current_cookie = 0; 242112f080e7Smrj dma->dp_copybuf_size = 0; 242212f080e7Smrj dma->dp_window = NULL; 242312f080e7Smrj dma->dp_cbaddr = NULL; 242412f080e7Smrj dma->dp_inuse = B_FALSE; 242512f080e7Smrj dma->dp_need_to_free_cookie = B_FALSE; 242694f1124eSVikram Hegde dma->dp_need_to_switch_cookies = B_FALSE; 242794f1124eSVikram Hegde dma->dp_saved_cookies = NULL; 242894f1124eSVikram Hegde dma->dp_sleep_flags = KM_PANIC; 242912f080e7Smrj dma->dp_need_to_free_window = B_FALSE; 243012f080e7Smrj dma->dp_partial_required = B_FALSE; 243112f080e7Smrj dma->dp_trim_required = B_FALSE; 243212f080e7Smrj dma->dp_sglinfo.si_copybuf_req = 0; 243312f080e7Smrj #if !defined(__amd64) 243412f080e7Smrj dma->dp_cb_remaping = B_FALSE; 243512f080e7Smrj dma->dp_kva = NULL; 243612f080e7Smrj #endif 243712f080e7Smrj 243812f080e7Smrj /* FMA related initialization */ 243912f080e7Smrj hp->dmai_fault = 0; 244012f080e7Smrj hp->dmai_fault_check = NULL; 244112f080e7Smrj hp->dmai_fault_notify = NULL; 244212f080e7Smrj hp->dmai_error.err_ena = 0; 244312f080e7Smrj hp->dmai_error.err_status = DDI_FM_OK; 244412f080e7Smrj hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 244512f080e7Smrj hp->dmai_error.err_ontrap = NULL; 244612f080e7Smrj hp->dmai_error.err_fep = NULL; 244700d0963fSdilpreet hp->dmai_error.err_cf = NULL; 244812f080e7Smrj } 244912f080e7Smrj 245012f080e7Smrj 245112f080e7Smrj /* 245212f080e7Smrj * rootnex_valid_alloc_parms() 245312f080e7Smrj * Called in ddi_dma_alloc_handle path to validate its parameters. 245412f080e7Smrj */ 245512f080e7Smrj static int 245612f080e7Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 245712f080e7Smrj { 245812f080e7Smrj if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 245912f080e7Smrj (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 246012f080e7Smrj (attr->dma_attr_granular > MMU_PAGESIZE) || 246112f080e7Smrj (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 246212f080e7Smrj return (DDI_DMA_BADATTR); 246312f080e7Smrj } 246412f080e7Smrj 246512f080e7Smrj if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 246612f080e7Smrj return (DDI_DMA_BADATTR); 246712f080e7Smrj } 246812f080e7Smrj 246912f080e7Smrj if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 247012f080e7Smrj MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 247112f080e7Smrj attr->dma_attr_sgllen <= 0) { 247212f080e7Smrj return (DDI_DMA_BADATTR); 247312f080e7Smrj } 247412f080e7Smrj 247512f080e7Smrj /* We should be able to DMA into every byte offset in a page */ 247612f080e7Smrj if (maxsegmentsize < MMU_PAGESIZE) { 247712f080e7Smrj return (DDI_DMA_BADATTR); 247812f080e7Smrj } 247912f080e7Smrj 248012f080e7Smrj return (DDI_SUCCESS); 248112f080e7Smrj } 248212f080e7Smrj 248312f080e7Smrj /* 248412f080e7Smrj * rootnex_valid_bind_parms() 248512f080e7Smrj * Called in ddi_dma_*_bind_handle path to validate its parameters. 248612f080e7Smrj */ 248712f080e7Smrj /* ARGSUSED */ 248812f080e7Smrj static int 248912f080e7Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 249012f080e7Smrj { 249112f080e7Smrj #if !defined(__amd64) 249212f080e7Smrj /* 249312f080e7Smrj * we only support up to a 2G-1 transfer size on 32-bit kernels so 249412f080e7Smrj * we can track the offset for the obsoleted interfaces. 249512f080e7Smrj */ 249612f080e7Smrj if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 249712f080e7Smrj return (DDI_DMA_TOOBIG); 249812f080e7Smrj } 249912f080e7Smrj #endif 250012f080e7Smrj 250112f080e7Smrj return (DDI_SUCCESS); 250212f080e7Smrj } 250312f080e7Smrj 250412f080e7Smrj 250512f080e7Smrj /* 250612f080e7Smrj * rootnex_get_sgl() 250712f080e7Smrj * Called in bind fastpath to get the sgl. Most of this will be replaced 250812f080e7Smrj * with a call to the vm layer when vm2.0 comes around... 250912f080e7Smrj */ 251012f080e7Smrj static void 251112f080e7Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 251212f080e7Smrj rootnex_sglinfo_t *sglinfo) 251312f080e7Smrj { 251412f080e7Smrj ddi_dma_atyp_t buftype; 2515843e1988Sjohnlev rootnex_addr_t raddr; 251612f080e7Smrj uint64_t last_page; 251712f080e7Smrj uint64_t offset; 251812f080e7Smrj uint64_t addrhi; 251912f080e7Smrj uint64_t addrlo; 252012f080e7Smrj uint64_t maxseg; 252112f080e7Smrj page_t **pplist; 252212f080e7Smrj uint64_t paddr; 252312f080e7Smrj uint32_t psize; 252412f080e7Smrj uint32_t size; 252512f080e7Smrj caddr_t vaddr; 252612f080e7Smrj uint_t pcnt; 252712f080e7Smrj page_t *pp; 252812f080e7Smrj uint_t cnt; 252912f080e7Smrj 253012f080e7Smrj 253112f080e7Smrj /* shortcuts */ 253212f080e7Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 253312f080e7Smrj vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 253412f080e7Smrj maxseg = sglinfo->si_max_cookie_size; 253512f080e7Smrj buftype = dmar_object->dmao_type; 253612f080e7Smrj addrhi = sglinfo->si_max_addr; 253712f080e7Smrj addrlo = sglinfo->si_min_addr; 253812f080e7Smrj size = dmar_object->dmao_size; 253912f080e7Smrj 254012f080e7Smrj pcnt = 0; 254112f080e7Smrj cnt = 0; 254212f080e7Smrj 254312f080e7Smrj /* 254412f080e7Smrj * if we were passed down a linked list of pages, i.e. pointer to 254512f080e7Smrj * page_t, use this to get our physical address and buf offset. 254612f080e7Smrj */ 254712f080e7Smrj if (buftype == DMA_OTYP_PAGES) { 254812f080e7Smrj pp = dmar_object->dmao_obj.pp_obj.pp_pp; 254912f080e7Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 255012f080e7Smrj offset = dmar_object->dmao_obj.pp_obj.pp_offset & 255112f080e7Smrj MMU_PAGEOFFSET; 2552843e1988Sjohnlev paddr = pfn_to_pa(pp->p_pagenum) + offset; 255312f080e7Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 255412f080e7Smrj pp = pp->p_next; 255512f080e7Smrj sglinfo->si_asp = NULL; 255612f080e7Smrj 255712f080e7Smrj /* 255812f080e7Smrj * We weren't passed down a linked list of pages, but if we were passed 255912f080e7Smrj * down an array of pages, use this to get our physical address and buf 256012f080e7Smrj * offset. 256112f080e7Smrj */ 256212f080e7Smrj } else if (pplist != NULL) { 256312f080e7Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 256412f080e7Smrj (buftype == DMA_OTYP_BUFVADDR)); 256512f080e7Smrj 256612f080e7Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 256712f080e7Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 256812f080e7Smrj if (sglinfo->si_asp == NULL) { 256912f080e7Smrj sglinfo->si_asp = &kas; 257012f080e7Smrj } 257112f080e7Smrj 257212f080e7Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 2573843e1988Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 257412f080e7Smrj paddr += offset; 257512f080e7Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 257612f080e7Smrj pcnt++; 257712f080e7Smrj 257812f080e7Smrj /* 257912f080e7Smrj * All we have is a virtual address, we'll need to call into the VM 258012f080e7Smrj * to get the physical address. 258112f080e7Smrj */ 258212f080e7Smrj } else { 258312f080e7Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 258412f080e7Smrj (buftype == DMA_OTYP_BUFVADDR)); 258512f080e7Smrj 258612f080e7Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 258712f080e7Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 258812f080e7Smrj if (sglinfo->si_asp == NULL) { 258912f080e7Smrj sglinfo->si_asp = &kas; 259012f080e7Smrj } 259112f080e7Smrj 2592843e1988Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 259312f080e7Smrj paddr += offset; 259412f080e7Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 259512f080e7Smrj vaddr += psize; 259612f080e7Smrj } 259712f080e7Smrj 2598843e1988Sjohnlev #ifdef __xpv 2599843e1988Sjohnlev /* 2600843e1988Sjohnlev * If we're dom0, we're using a real device so we need to load 2601843e1988Sjohnlev * the cookies with MFNs instead of PFNs. 2602843e1988Sjohnlev */ 2603843e1988Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 2604843e1988Sjohnlev #else 2605843e1988Sjohnlev raddr = paddr; 2606843e1988Sjohnlev #endif 2607843e1988Sjohnlev 260812f080e7Smrj /* 260912f080e7Smrj * Setup the first cookie with the physical address of the page and the 261012f080e7Smrj * size of the page (which takes into account the initial offset into 261112f080e7Smrj * the page. 261212f080e7Smrj */ 2613843e1988Sjohnlev sgl[cnt].dmac_laddress = raddr; 261412f080e7Smrj sgl[cnt].dmac_size = psize; 261512f080e7Smrj sgl[cnt].dmac_type = 0; 261612f080e7Smrj 261712f080e7Smrj /* 261812f080e7Smrj * Save away the buffer offset into the page. We'll need this later in 261912f080e7Smrj * the copy buffer code to help figure out the page index within the 262012f080e7Smrj * buffer and the offset into the current page. 262112f080e7Smrj */ 262212f080e7Smrj sglinfo->si_buf_offset = offset; 262312f080e7Smrj 262412f080e7Smrj /* 262512f080e7Smrj * If the DMA engine can't reach the physical address, increase how 262612f080e7Smrj * much copy buffer we need. We always increase by pagesize so we don't 262712f080e7Smrj * have to worry about converting offsets. Set a flag in the cookies 262812f080e7Smrj * dmac_type to indicate that it uses the copy buffer. If this isn't the 262912f080e7Smrj * last cookie, go to the next cookie (since we separate each page which 263012f080e7Smrj * uses the copy buffer in case the copy buffer is not physically 263112f080e7Smrj * contiguous. 263212f080e7Smrj */ 2633843e1988Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 263412f080e7Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 263512f080e7Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 263612f080e7Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 263712f080e7Smrj cnt++; 263812f080e7Smrj sgl[cnt].dmac_laddress = 0; 263912f080e7Smrj sgl[cnt].dmac_size = 0; 264012f080e7Smrj sgl[cnt].dmac_type = 0; 264112f080e7Smrj } 264212f080e7Smrj } 264312f080e7Smrj 264412f080e7Smrj /* 264512f080e7Smrj * save this page's physical address so we can figure out if the next 264612f080e7Smrj * page is physically contiguous. Keep decrementing size until we are 264712f080e7Smrj * done with the buffer. 264812f080e7Smrj */ 2649843e1988Sjohnlev last_page = raddr & MMU_PAGEMASK; 265012f080e7Smrj size -= psize; 265112f080e7Smrj 265212f080e7Smrj while (size > 0) { 265312f080e7Smrj /* Get the size for this page (i.e. partial or full page) */ 265412f080e7Smrj psize = MIN(size, MMU_PAGESIZE); 265512f080e7Smrj 265612f080e7Smrj if (buftype == DMA_OTYP_PAGES) { 265712f080e7Smrj /* get the paddr from the page_t */ 265812f080e7Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2659843e1988Sjohnlev paddr = pfn_to_pa(pp->p_pagenum); 266012f080e7Smrj pp = pp->p_next; 266112f080e7Smrj } else if (pplist != NULL) { 266212f080e7Smrj /* index into the array of page_t's to get the paddr */ 266312f080e7Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 2664843e1988Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 266512f080e7Smrj pcnt++; 266612f080e7Smrj } else { 266712f080e7Smrj /* call into the VM to get the paddr */ 2668843e1988Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 266912f080e7Smrj vaddr)); 267012f080e7Smrj vaddr += psize; 267112f080e7Smrj } 267212f080e7Smrj 2673843e1988Sjohnlev #ifdef __xpv 2674843e1988Sjohnlev /* 2675843e1988Sjohnlev * If we're dom0, we're using a real device so we need to load 2676843e1988Sjohnlev * the cookies with MFNs instead of PFNs. 2677843e1988Sjohnlev */ 2678843e1988Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 2679843e1988Sjohnlev #else 2680843e1988Sjohnlev raddr = paddr; 2681843e1988Sjohnlev #endif 268212f080e7Smrj /* check to see if this page needs the copy buffer */ 2683843e1988Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 268412f080e7Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 268512f080e7Smrj 268612f080e7Smrj /* 268712f080e7Smrj * if there is something in the current cookie, go to 268812f080e7Smrj * the next one. We only want one page in a cookie which 268912f080e7Smrj * uses the copybuf since the copybuf doesn't have to 269012f080e7Smrj * be physically contiguous. 269112f080e7Smrj */ 269212f080e7Smrj if (sgl[cnt].dmac_size != 0) { 269312f080e7Smrj cnt++; 269412f080e7Smrj } 2695843e1988Sjohnlev sgl[cnt].dmac_laddress = raddr; 269612f080e7Smrj sgl[cnt].dmac_size = psize; 269712f080e7Smrj #if defined(__amd64) 269812f080e7Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 269912f080e7Smrj #else 270012f080e7Smrj /* 270112f080e7Smrj * save the buf offset for 32-bit kernel. used in the 270212f080e7Smrj * obsoleted interfaces. 270312f080e7Smrj */ 270412f080e7Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 270512f080e7Smrj (dmar_object->dmao_size - size); 270612f080e7Smrj #endif 270712f080e7Smrj /* if this isn't the last cookie, go to the next one */ 270812f080e7Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 270912f080e7Smrj cnt++; 271012f080e7Smrj sgl[cnt].dmac_laddress = 0; 271112f080e7Smrj sgl[cnt].dmac_size = 0; 271212f080e7Smrj sgl[cnt].dmac_type = 0; 271312f080e7Smrj } 271412f080e7Smrj 271512f080e7Smrj /* 271612f080e7Smrj * this page didn't need the copy buffer, if it's not physically 271712f080e7Smrj * contiguous, or it would put us over a segment boundary, or it 271812f080e7Smrj * puts us over the max cookie size, or the current sgl doesn't 271912f080e7Smrj * have anything in it. 272012f080e7Smrj */ 2721843e1988Sjohnlev } else if (((last_page + MMU_PAGESIZE) != raddr) || 2722843e1988Sjohnlev !(raddr & sglinfo->si_segmask) || 272312f080e7Smrj ((sgl[cnt].dmac_size + psize) > maxseg) || 272412f080e7Smrj (sgl[cnt].dmac_size == 0)) { 272512f080e7Smrj /* 272612f080e7Smrj * if we're not already in a new cookie, go to the next 272712f080e7Smrj * cookie. 272812f080e7Smrj */ 272912f080e7Smrj if (sgl[cnt].dmac_size != 0) { 273012f080e7Smrj cnt++; 273112f080e7Smrj } 273212f080e7Smrj 273312f080e7Smrj /* save the cookie information */ 2734843e1988Sjohnlev sgl[cnt].dmac_laddress = raddr; 273512f080e7Smrj sgl[cnt].dmac_size = psize; 273612f080e7Smrj #if defined(__amd64) 273712f080e7Smrj sgl[cnt].dmac_type = 0; 273812f080e7Smrj #else 273912f080e7Smrj /* 274012f080e7Smrj * save the buf offset for 32-bit kernel. used in the 274112f080e7Smrj * obsoleted interfaces. 274212f080e7Smrj */ 274312f080e7Smrj sgl[cnt].dmac_type = dmar_object->dmao_size - size; 274412f080e7Smrj #endif 274512f080e7Smrj 274612f080e7Smrj /* 274712f080e7Smrj * this page didn't need the copy buffer, it is physically 274812f080e7Smrj * contiguous with the last page, and it's <= the max cookie 274912f080e7Smrj * size. 275012f080e7Smrj */ 275112f080e7Smrj } else { 275212f080e7Smrj sgl[cnt].dmac_size += psize; 275312f080e7Smrj 275412f080e7Smrj /* 275512f080e7Smrj * if this exactly == the maximum cookie size, and 275612f080e7Smrj * it isn't the last cookie, go to the next cookie. 275712f080e7Smrj */ 275812f080e7Smrj if (((sgl[cnt].dmac_size + psize) == maxseg) && 275912f080e7Smrj ((cnt + 1) < sglinfo->si_max_pages)) { 276012f080e7Smrj cnt++; 276112f080e7Smrj sgl[cnt].dmac_laddress = 0; 276212f080e7Smrj sgl[cnt].dmac_size = 0; 276312f080e7Smrj sgl[cnt].dmac_type = 0; 276412f080e7Smrj } 276512f080e7Smrj } 276612f080e7Smrj 276712f080e7Smrj /* 276812f080e7Smrj * save this page's physical address so we can figure out if the 276912f080e7Smrj * next page is physically contiguous. Keep decrementing size 277012f080e7Smrj * until we are done with the buffer. 277112f080e7Smrj */ 2772843e1988Sjohnlev last_page = raddr; 277312f080e7Smrj size -= psize; 277412f080e7Smrj } 277512f080e7Smrj 277612f080e7Smrj /* we're done, save away how many cookies the sgl has */ 277712f080e7Smrj if (sgl[cnt].dmac_size == 0) { 277812f080e7Smrj ASSERT(cnt < sglinfo->si_max_pages); 277912f080e7Smrj sglinfo->si_sgl_size = cnt; 278012f080e7Smrj } else { 278112f080e7Smrj sglinfo->si_sgl_size = cnt + 1; 278212f080e7Smrj } 278312f080e7Smrj } 278412f080e7Smrj 278512f080e7Smrj /* 278612f080e7Smrj * rootnex_bind_slowpath() 278712f080e7Smrj * Call in the bind path if the calling driver can't use the sgl without 278812f080e7Smrj * modifying it. We either need to use the copy buffer and/or we will end up 278912f080e7Smrj * with a partial bind. 279012f080e7Smrj */ 279112f080e7Smrj static int 279212f080e7Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 279312f080e7Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 279412f080e7Smrj { 279512f080e7Smrj rootnex_sglinfo_t *sinfo; 279612f080e7Smrj rootnex_window_t *window; 279712f080e7Smrj ddi_dma_cookie_t *cookie; 279812f080e7Smrj size_t copybuf_used; 279912f080e7Smrj size_t dmac_size; 280012f080e7Smrj boolean_t partial; 280112f080e7Smrj off_t cur_offset; 280212f080e7Smrj page_t *cur_pp; 280312f080e7Smrj major_t mnum; 280412f080e7Smrj int e; 280512f080e7Smrj int i; 280612f080e7Smrj 280712f080e7Smrj 280812f080e7Smrj sinfo = &dma->dp_sglinfo; 280912f080e7Smrj copybuf_used = 0; 281012f080e7Smrj partial = B_FALSE; 281112f080e7Smrj 281212f080e7Smrj /* 281312f080e7Smrj * If we're using the copybuf, set the copybuf state in dma struct. 281412f080e7Smrj * Needs to be first since it sets the copy buffer size. 281512f080e7Smrj */ 281612f080e7Smrj if (sinfo->si_copybuf_req != 0) { 281712f080e7Smrj e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 281812f080e7Smrj if (e != DDI_SUCCESS) { 281912f080e7Smrj return (e); 282012f080e7Smrj } 282112f080e7Smrj } else { 282212f080e7Smrj dma->dp_copybuf_size = 0; 282312f080e7Smrj } 282412f080e7Smrj 282512f080e7Smrj /* 282612f080e7Smrj * Figure out if we need to do a partial mapping. If so, figure out 282712f080e7Smrj * if we need to trim the buffers when we munge the sgl. 282812f080e7Smrj */ 282912f080e7Smrj if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 283012f080e7Smrj (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 283112f080e7Smrj (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 283212f080e7Smrj dma->dp_partial_required = B_TRUE; 283312f080e7Smrj if (attr->dma_attr_granular != 1) { 283412f080e7Smrj dma->dp_trim_required = B_TRUE; 283512f080e7Smrj } 283612f080e7Smrj } else { 283712f080e7Smrj dma->dp_partial_required = B_FALSE; 283812f080e7Smrj dma->dp_trim_required = B_FALSE; 283912f080e7Smrj } 284012f080e7Smrj 284112f080e7Smrj /* If we need to do a partial bind, make sure the driver supports it */ 284212f080e7Smrj if (dma->dp_partial_required && 284312f080e7Smrj !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 284412f080e7Smrj 284512f080e7Smrj mnum = ddi_driver_major(dma->dp_dip); 284612f080e7Smrj /* 284712f080e7Smrj * patchable which allows us to print one warning per major 284812f080e7Smrj * number. 284912f080e7Smrj */ 285012f080e7Smrj if ((rootnex_bind_warn) && 285112f080e7Smrj ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 285212f080e7Smrj rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 285312f080e7Smrj cmn_err(CE_WARN, "!%s: coding error detected, the " 285412f080e7Smrj "driver is using ddi_dma_attr(9S) incorrectly. " 285512f080e7Smrj "There is a small risk of data corruption in " 285612f080e7Smrj "particular with large I/Os. The driver should be " 285712f080e7Smrj "replaced with a corrected version for proper " 285812f080e7Smrj "system operation. To disable this warning, add " 285912f080e7Smrj "'set rootnex:rootnex_bind_warn=0' to " 286012f080e7Smrj "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 286112f080e7Smrj } 286212f080e7Smrj return (DDI_DMA_TOOBIG); 286312f080e7Smrj } 286412f080e7Smrj 286512f080e7Smrj /* 286612f080e7Smrj * we might need multiple windows, setup state to handle them. In this 286712f080e7Smrj * code path, we will have at least one window. 286812f080e7Smrj */ 286912f080e7Smrj e = rootnex_setup_windows(hp, dma, attr, kmflag); 287012f080e7Smrj if (e != DDI_SUCCESS) { 287112f080e7Smrj rootnex_teardown_copybuf(dma); 287212f080e7Smrj return (e); 287312f080e7Smrj } 287412f080e7Smrj 287512f080e7Smrj window = &dma->dp_window[0]; 287612f080e7Smrj cookie = &dma->dp_cookies[0]; 287712f080e7Smrj cur_offset = 0; 287812f080e7Smrj rootnex_init_win(hp, dma, window, cookie, cur_offset); 287912f080e7Smrj if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 288012f080e7Smrj cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 288112f080e7Smrj } 288212f080e7Smrj 288312f080e7Smrj /* loop though all the cookies we got back from get_sgl() */ 288412f080e7Smrj for (i = 0; i < sinfo->si_sgl_size; i++) { 288512f080e7Smrj /* 288612f080e7Smrj * If we're using the copy buffer, check this cookie and setup 288712f080e7Smrj * its associated copy buffer state. If this cookie uses the 288812f080e7Smrj * copy buffer, make sure we sync this window during dma_sync. 288912f080e7Smrj */ 289012f080e7Smrj if (dma->dp_copybuf_size > 0) { 289112f080e7Smrj rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 289212f080e7Smrj cur_offset, ©buf_used, &cur_pp); 289312f080e7Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 289412f080e7Smrj window->wd_dosync = B_TRUE; 289512f080e7Smrj } 289612f080e7Smrj } 289712f080e7Smrj 289812f080e7Smrj /* 289912f080e7Smrj * save away the cookie size, since it could be modified in 290012f080e7Smrj * the windowing code. 290112f080e7Smrj */ 290212f080e7Smrj dmac_size = cookie->dmac_size; 290312f080e7Smrj 290412f080e7Smrj /* if we went over max copybuf size */ 290512f080e7Smrj if (dma->dp_copybuf_size && 290612f080e7Smrj (copybuf_used > dma->dp_copybuf_size)) { 290712f080e7Smrj partial = B_TRUE; 290812f080e7Smrj e = rootnex_copybuf_window_boundary(hp, dma, &window, 290912f080e7Smrj cookie, cur_offset, ©buf_used); 291012f080e7Smrj if (e != DDI_SUCCESS) { 291112f080e7Smrj rootnex_teardown_copybuf(dma); 291212f080e7Smrj rootnex_teardown_windows(dma); 291312f080e7Smrj return (e); 291412f080e7Smrj } 291512f080e7Smrj 291612f080e7Smrj /* 291712f080e7Smrj * if the coookie uses the copy buffer, make sure the 291812f080e7Smrj * new window we just moved to is set to sync. 291912f080e7Smrj */ 292012f080e7Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 292112f080e7Smrj window->wd_dosync = B_TRUE; 292212f080e7Smrj } 292312f080e7Smrj DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 292412f080e7Smrj dma->dp_dip); 292512f080e7Smrj 292612f080e7Smrj /* if the cookie cnt == max sgllen, move to the next window */ 292712f080e7Smrj } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 292812f080e7Smrj partial = B_TRUE; 292912f080e7Smrj ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 293012f080e7Smrj e = rootnex_sgllen_window_boundary(hp, dma, &window, 293112f080e7Smrj cookie, attr, cur_offset); 293212f080e7Smrj if (e != DDI_SUCCESS) { 293312f080e7Smrj rootnex_teardown_copybuf(dma); 293412f080e7Smrj rootnex_teardown_windows(dma); 293512f080e7Smrj return (e); 293612f080e7Smrj } 293712f080e7Smrj 293812f080e7Smrj /* 293912f080e7Smrj * if the coookie uses the copy buffer, make sure the 294012f080e7Smrj * new window we just moved to is set to sync. 294112f080e7Smrj */ 294212f080e7Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 294312f080e7Smrj window->wd_dosync = B_TRUE; 294412f080e7Smrj } 294512f080e7Smrj DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 294612f080e7Smrj dma->dp_dip); 294712f080e7Smrj 294812f080e7Smrj /* else if we will be over maxxfer */ 294912f080e7Smrj } else if ((window->wd_size + dmac_size) > 295012f080e7Smrj dma->dp_maxxfer) { 295112f080e7Smrj partial = B_TRUE; 295212f080e7Smrj e = rootnex_maxxfer_window_boundary(hp, dma, &window, 295312f080e7Smrj cookie); 295412f080e7Smrj if (e != DDI_SUCCESS) { 295512f080e7Smrj rootnex_teardown_copybuf(dma); 295612f080e7Smrj rootnex_teardown_windows(dma); 295712f080e7Smrj return (e); 295812f080e7Smrj } 295912f080e7Smrj 296012f080e7Smrj /* 296112f080e7Smrj * if the coookie uses the copy buffer, make sure the 296212f080e7Smrj * new window we just moved to is set to sync. 296312f080e7Smrj */ 296412f080e7Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 296512f080e7Smrj window->wd_dosync = B_TRUE; 296612f080e7Smrj } 296712f080e7Smrj DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 296812f080e7Smrj dma->dp_dip); 296912f080e7Smrj 297012f080e7Smrj /* else this cookie fits in the current window */ 297112f080e7Smrj } else { 297212f080e7Smrj window->wd_cookie_cnt++; 297312f080e7Smrj window->wd_size += dmac_size; 297412f080e7Smrj } 297512f080e7Smrj 297612f080e7Smrj /* track our offset into the buffer, go to the next cookie */ 297712f080e7Smrj ASSERT(dmac_size <= dma->dp_dma.dmao_size); 297812f080e7Smrj ASSERT(cookie->dmac_size <= dmac_size); 297912f080e7Smrj cur_offset += dmac_size; 298012f080e7Smrj cookie++; 298112f080e7Smrj } 298212f080e7Smrj 298312f080e7Smrj /* if we ended up with a zero sized window in the end, clean it up */ 298412f080e7Smrj if (window->wd_size == 0) { 298512f080e7Smrj hp->dmai_nwin--; 298612f080e7Smrj window--; 298712f080e7Smrj } 298812f080e7Smrj 298912f080e7Smrj ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 299012f080e7Smrj 299112f080e7Smrj if (!partial) { 299212f080e7Smrj return (DDI_DMA_MAPPED); 299312f080e7Smrj } 299412f080e7Smrj 299512f080e7Smrj ASSERT(dma->dp_partial_required); 299612f080e7Smrj return (DDI_DMA_PARTIAL_MAP); 299712f080e7Smrj } 299812f080e7Smrj 299912f080e7Smrj 300012f080e7Smrj /* 300112f080e7Smrj * rootnex_setup_copybuf() 300212f080e7Smrj * Called in bind slowpath. Figures out if we're going to use the copy 300312f080e7Smrj * buffer, and if we do, sets up the basic state to handle it. 300412f080e7Smrj */ 300512f080e7Smrj static int 300612f080e7Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 300712f080e7Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr) 300812f080e7Smrj { 300912f080e7Smrj rootnex_sglinfo_t *sinfo; 301012f080e7Smrj ddi_dma_attr_t lattr; 301112f080e7Smrj size_t max_copybuf; 301212f080e7Smrj int cansleep; 301312f080e7Smrj int e; 301412f080e7Smrj #if !defined(__amd64) 301512f080e7Smrj int vmflag; 301612f080e7Smrj #endif 301712f080e7Smrj 301812f080e7Smrj 301912f080e7Smrj sinfo = &dma->dp_sglinfo; 302012f080e7Smrj 302136945f79Smrj /* read this first so it's consistent through the routine */ 302236945f79Smrj max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK; 302312f080e7Smrj 302412f080e7Smrj /* We need to call into the rootnex on ddi_dma_sync() */ 302512f080e7Smrj hp->dmai_rflags &= ~DMP_NOSYNC; 302612f080e7Smrj 302712f080e7Smrj /* make sure the copybuf size <= the max size */ 302812f080e7Smrj dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 302912f080e7Smrj ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 303012f080e7Smrj 303112f080e7Smrj #if !defined(__amd64) 303212f080e7Smrj /* 303312f080e7Smrj * if we don't have kva space to copy to/from, allocate the KVA space 303412f080e7Smrj * now. We only do this for the 32-bit kernel. We use seg kpm space for 303512f080e7Smrj * the 64-bit kernel. 303612f080e7Smrj */ 303712f080e7Smrj if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 303812f080e7Smrj (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 303912f080e7Smrj 304012f080e7Smrj /* convert the sleep flags */ 304112f080e7Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 304212f080e7Smrj vmflag = VM_SLEEP; 304312f080e7Smrj } else { 304412f080e7Smrj vmflag = VM_NOSLEEP; 304512f080e7Smrj } 304612f080e7Smrj 304712f080e7Smrj /* allocate Kernel VA space that we can bcopy to/from */ 304812f080e7Smrj dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 304912f080e7Smrj vmflag); 305012f080e7Smrj if (dma->dp_kva == NULL) { 305112f080e7Smrj return (DDI_DMA_NORESOURCES); 305212f080e7Smrj } 305312f080e7Smrj } 305412f080e7Smrj #endif 305512f080e7Smrj 305612f080e7Smrj /* convert the sleep flags */ 305712f080e7Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 305812f080e7Smrj cansleep = 1; 305912f080e7Smrj } else { 306012f080e7Smrj cansleep = 0; 306112f080e7Smrj } 306212f080e7Smrj 306312f080e7Smrj /* 3064d21b39ddSmrj * Allocate the actual copy buffer. This needs to fit within the DMA 3065d21b39ddSmrj * engine limits, so we can't use kmem_alloc... We don't need 3066d21b39ddSmrj * contiguous memory (sgllen) since we will be forcing windows on 3067d21b39ddSmrj * sgllen anyway. 306812f080e7Smrj */ 306912f080e7Smrj lattr = *attr; 307012f080e7Smrj lattr.dma_attr_align = MMU_PAGESIZE; 3071d21b39ddSmrj /* 3072d21b39ddSmrj * this should be < 0 to indicate no limit, but due to a bug in 3073d21b39ddSmrj * the rootnex, we'll set it to the maximum positive int. 3074d21b39ddSmrj */ 3075d21b39ddSmrj lattr.dma_attr_sgllen = 0x7fffffff; 307612f080e7Smrj e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 307712f080e7Smrj 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 307812f080e7Smrj if (e != DDI_SUCCESS) { 307912f080e7Smrj #if !defined(__amd64) 308012f080e7Smrj if (dma->dp_kva != NULL) { 308112f080e7Smrj vmem_free(heap_arena, dma->dp_kva, 308212f080e7Smrj dma->dp_copybuf_size); 308312f080e7Smrj } 308412f080e7Smrj #endif 308512f080e7Smrj return (DDI_DMA_NORESOURCES); 308612f080e7Smrj } 308712f080e7Smrj 308812f080e7Smrj DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 308912f080e7Smrj size_t, dma->dp_copybuf_size); 309012f080e7Smrj 309112f080e7Smrj return (DDI_SUCCESS); 309212f080e7Smrj } 309312f080e7Smrj 309412f080e7Smrj 309512f080e7Smrj /* 309612f080e7Smrj * rootnex_setup_windows() 309712f080e7Smrj * Called in bind slowpath to setup the window state. We always have windows 309812f080e7Smrj * in the slowpath. Even if the window count = 1. 309912f080e7Smrj */ 310012f080e7Smrj static int 310112f080e7Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 310212f080e7Smrj ddi_dma_attr_t *attr, int kmflag) 310312f080e7Smrj { 310412f080e7Smrj rootnex_window_t *windowp; 310512f080e7Smrj rootnex_sglinfo_t *sinfo; 310612f080e7Smrj size_t copy_state_size; 310712f080e7Smrj size_t win_state_size; 310812f080e7Smrj size_t state_available; 310912f080e7Smrj size_t space_needed; 311012f080e7Smrj uint_t copybuf_win; 311112f080e7Smrj uint_t maxxfer_win; 311212f080e7Smrj size_t space_used; 311312f080e7Smrj uint_t sglwin; 311412f080e7Smrj 311512f080e7Smrj 311612f080e7Smrj sinfo = &dma->dp_sglinfo; 311712f080e7Smrj 311812f080e7Smrj dma->dp_current_win = 0; 311912f080e7Smrj hp->dmai_nwin = 0; 312012f080e7Smrj 312112f080e7Smrj /* If we don't need to do a partial, we only have one window */ 312212f080e7Smrj if (!dma->dp_partial_required) { 312312f080e7Smrj dma->dp_max_win = 1; 312412f080e7Smrj 312512f080e7Smrj /* 312612f080e7Smrj * we need multiple windows, need to figure out the worse case number 312712f080e7Smrj * of windows. 312812f080e7Smrj */ 31297c478bd9Sstevel@tonic-gate } else { 31307c478bd9Sstevel@tonic-gate /* 313112f080e7Smrj * if we need windows because we need more copy buffer that 313212f080e7Smrj * we allow, the worse case number of windows we could need 313312f080e7Smrj * here would be (copybuf space required / copybuf space that 313412f080e7Smrj * we have) plus one for remainder, and plus 2 to handle the 313512f080e7Smrj * extra pages on the trim for the first and last pages of the 313612f080e7Smrj * buffer (a page is the minimum window size so under the right 313712f080e7Smrj * attr settings, you could have a window for each page). 313812f080e7Smrj * The last page will only be hit here if the size is not a 313912f080e7Smrj * multiple of the granularity (which theoretically shouldn't 314012f080e7Smrj * be the case but never has been enforced, so we could have 314112f080e7Smrj * broken things without it). 31427c478bd9Sstevel@tonic-gate */ 314312f080e7Smrj if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 314412f080e7Smrj ASSERT(dma->dp_copybuf_size > 0); 314512f080e7Smrj copybuf_win = (sinfo->si_copybuf_req / 314612f080e7Smrj dma->dp_copybuf_size) + 1 + 2; 31477c478bd9Sstevel@tonic-gate } else { 314812f080e7Smrj copybuf_win = 0; 31497c478bd9Sstevel@tonic-gate } 315012f080e7Smrj 315112f080e7Smrj /* 315212f080e7Smrj * if we need windows because we have more cookies than the H/W 315312f080e7Smrj * can handle, the number of windows we would need here would 315412f080e7Smrj * be (cookie count / cookies count H/W supports) plus one for 315512f080e7Smrj * remainder, and plus 2 to handle the extra pages on the trim 315612f080e7Smrj * (see above comment about trim) 315712f080e7Smrj */ 315812f080e7Smrj if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 315912f080e7Smrj sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 316012f080e7Smrj + 1) + 2; 31617c478bd9Sstevel@tonic-gate } else { 316212f080e7Smrj sglwin = 0; 31637c478bd9Sstevel@tonic-gate } 316412f080e7Smrj 316512f080e7Smrj /* 316612f080e7Smrj * if we need windows because we're binding more memory than the 316712f080e7Smrj * H/W can transfer at once, the number of windows we would need 316812f080e7Smrj * here would be (xfer count / max xfer H/W supports) plus one 316912f080e7Smrj * for remainder, and plus 2 to handle the extra pages on the 317012f080e7Smrj * trim (see above comment about trim) 317112f080e7Smrj */ 317212f080e7Smrj if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 317312f080e7Smrj maxxfer_win = (dma->dp_dma.dmao_size / 317412f080e7Smrj dma->dp_maxxfer) + 1 + 2; 317512f080e7Smrj } else { 317612f080e7Smrj maxxfer_win = 0; 31777c478bd9Sstevel@tonic-gate } 317812f080e7Smrj dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 317912f080e7Smrj ASSERT(dma->dp_max_win > 0); 318012f080e7Smrj } 318112f080e7Smrj win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 318212f080e7Smrj 318312f080e7Smrj /* 318412f080e7Smrj * Get space for window and potential copy buffer state. Before we 318512f080e7Smrj * go and allocate memory, see if we can get away with using what's 318612f080e7Smrj * left in the pre-allocted state or the dynamically allocated sgl. 318712f080e7Smrj */ 318812f080e7Smrj space_used = (uintptr_t)(sinfo->si_sgl_size * 318912f080e7Smrj sizeof (ddi_dma_cookie_t)); 319012f080e7Smrj 319112f080e7Smrj /* if we dynamically allocated space for the cookies */ 319212f080e7Smrj if (dma->dp_need_to_free_cookie) { 319312f080e7Smrj /* if we have more space in the pre-allocted buffer, use it */ 319412f080e7Smrj ASSERT(space_used <= dma->dp_cookie_size); 319512f080e7Smrj if ((dma->dp_cookie_size - space_used) <= 319612f080e7Smrj rootnex_state->r_prealloc_size) { 319712f080e7Smrj state_available = rootnex_state->r_prealloc_size; 319812f080e7Smrj windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 319912f080e7Smrj 320012f080e7Smrj /* 320112f080e7Smrj * else, we have more free space in the dynamically allocated 320212f080e7Smrj * buffer, i.e. the buffer wasn't worse case fragmented so we 320312f080e7Smrj * didn't need a lot of cookies. 320412f080e7Smrj */ 320512f080e7Smrj } else { 320612f080e7Smrj state_available = dma->dp_cookie_size - space_used; 320712f080e7Smrj windowp = (rootnex_window_t *) 320812f080e7Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 320912f080e7Smrj } 321012f080e7Smrj 321112f080e7Smrj /* we used the pre-alloced buffer */ 321212f080e7Smrj } else { 321312f080e7Smrj ASSERT(space_used <= rootnex_state->r_prealloc_size); 321412f080e7Smrj state_available = rootnex_state->r_prealloc_size - space_used; 321512f080e7Smrj windowp = (rootnex_window_t *) 321612f080e7Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 321712f080e7Smrj } 321812f080e7Smrj 321912f080e7Smrj /* 322012f080e7Smrj * figure out how much state we need to track the copy buffer. Add an 322112f080e7Smrj * addition 8 bytes for pointer alignemnt later. 322212f080e7Smrj */ 322312f080e7Smrj if (dma->dp_copybuf_size > 0) { 322412f080e7Smrj copy_state_size = sinfo->si_max_pages * 322512f080e7Smrj sizeof (rootnex_pgmap_t); 322612f080e7Smrj } else { 322712f080e7Smrj copy_state_size = 0; 322812f080e7Smrj } 322912f080e7Smrj /* add an additional 8 bytes for pointer alignment */ 323012f080e7Smrj space_needed = win_state_size + copy_state_size + 0x8; 323112f080e7Smrj 323212f080e7Smrj /* if we have enough space already, use it */ 323312f080e7Smrj if (state_available >= space_needed) { 323412f080e7Smrj dma->dp_window = windowp; 323512f080e7Smrj dma->dp_need_to_free_window = B_FALSE; 323612f080e7Smrj 323712f080e7Smrj /* not enough space, need to allocate more. */ 323812f080e7Smrj } else { 323912f080e7Smrj dma->dp_window = kmem_alloc(space_needed, kmflag); 324012f080e7Smrj if (dma->dp_window == NULL) { 324112f080e7Smrj return (DDI_DMA_NORESOURCES); 324212f080e7Smrj } 324312f080e7Smrj dma->dp_need_to_free_window = B_TRUE; 324412f080e7Smrj dma->dp_window_size = space_needed; 324512f080e7Smrj DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 324612f080e7Smrj dma->dp_dip, size_t, space_needed); 324712f080e7Smrj } 324812f080e7Smrj 324912f080e7Smrj /* 325012f080e7Smrj * we allocate copy buffer state and window state at the same time. 325112f080e7Smrj * setup our copy buffer state pointers. Make sure it's aligned. 325212f080e7Smrj */ 325312f080e7Smrj if (dma->dp_copybuf_size > 0) { 325412f080e7Smrj dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 325512f080e7Smrj &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 325612f080e7Smrj 325712f080e7Smrj #if !defined(__amd64) 325812f080e7Smrj /* 325912f080e7Smrj * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 326012f080e7Smrj * false/NULL. Should be quicker to bzero vs loop and set. 326112f080e7Smrj */ 326212f080e7Smrj bzero(dma->dp_pgmap, copy_state_size); 326312f080e7Smrj #endif 326412f080e7Smrj } else { 326512f080e7Smrj dma->dp_pgmap = NULL; 326612f080e7Smrj } 326712f080e7Smrj 326812f080e7Smrj return (DDI_SUCCESS); 326912f080e7Smrj } 327012f080e7Smrj 327112f080e7Smrj 327212f080e7Smrj /* 327312f080e7Smrj * rootnex_teardown_copybuf() 327412f080e7Smrj * cleans up after rootnex_setup_copybuf() 327512f080e7Smrj */ 327612f080e7Smrj static void 327712f080e7Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma) 327812f080e7Smrj { 327912f080e7Smrj #if !defined(__amd64) 328012f080e7Smrj int i; 328112f080e7Smrj 328212f080e7Smrj /* 328312f080e7Smrj * if we allocated kernel heap VMEM space, go through all the pages and 328412f080e7Smrj * map out any of the ones that we're mapped into the kernel heap VMEM 328512f080e7Smrj * arena. Then free the VMEM space. 328612f080e7Smrj */ 328712f080e7Smrj if (dma->dp_kva != NULL) { 328812f080e7Smrj for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 328912f080e7Smrj if (dma->dp_pgmap[i].pm_mapped) { 329012f080e7Smrj hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 329112f080e7Smrj MMU_PAGESIZE, HAT_UNLOAD); 329212f080e7Smrj dma->dp_pgmap[i].pm_mapped = B_FALSE; 329312f080e7Smrj } 329412f080e7Smrj } 329512f080e7Smrj 329612f080e7Smrj vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 329712f080e7Smrj } 329812f080e7Smrj 329912f080e7Smrj #endif 330012f080e7Smrj 330112f080e7Smrj /* if we allocated a copy buffer, free it */ 330212f080e7Smrj if (dma->dp_cbaddr != NULL) { 33037b93957cSeota i_ddi_mem_free(dma->dp_cbaddr, NULL); 330412f080e7Smrj } 330512f080e7Smrj } 330612f080e7Smrj 330712f080e7Smrj 330812f080e7Smrj /* 330912f080e7Smrj * rootnex_teardown_windows() 331012f080e7Smrj * cleans up after rootnex_setup_windows() 331112f080e7Smrj */ 331212f080e7Smrj static void 331312f080e7Smrj rootnex_teardown_windows(rootnex_dma_t *dma) 331412f080e7Smrj { 331512f080e7Smrj /* 331612f080e7Smrj * if we had to allocate window state on the last bind (because we 331712f080e7Smrj * didn't have enough pre-allocated space in the handle), free it. 331812f080e7Smrj */ 331912f080e7Smrj if (dma->dp_need_to_free_window) { 332012f080e7Smrj kmem_free(dma->dp_window, dma->dp_window_size); 332112f080e7Smrj } 332212f080e7Smrj } 332312f080e7Smrj 332412f080e7Smrj 332512f080e7Smrj /* 332612f080e7Smrj * rootnex_init_win() 332712f080e7Smrj * Called in bind slow path during creation of a new window. Initializes 332812f080e7Smrj * window state to default values. 332912f080e7Smrj */ 333012f080e7Smrj /*ARGSUSED*/ 333112f080e7Smrj static void 333212f080e7Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 333312f080e7Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 333412f080e7Smrj { 333512f080e7Smrj hp->dmai_nwin++; 333612f080e7Smrj window->wd_dosync = B_FALSE; 333712f080e7Smrj window->wd_offset = cur_offset; 333812f080e7Smrj window->wd_size = 0; 333912f080e7Smrj window->wd_first_cookie = cookie; 334012f080e7Smrj window->wd_cookie_cnt = 0; 334112f080e7Smrj window->wd_trim.tr_trim_first = B_FALSE; 334212f080e7Smrj window->wd_trim.tr_trim_last = B_FALSE; 334312f080e7Smrj window->wd_trim.tr_first_copybuf_win = B_FALSE; 334412f080e7Smrj window->wd_trim.tr_last_copybuf_win = B_FALSE; 334512f080e7Smrj #if !defined(__amd64) 334612f080e7Smrj window->wd_remap_copybuf = dma->dp_cb_remaping; 334712f080e7Smrj #endif 334812f080e7Smrj } 334912f080e7Smrj 335012f080e7Smrj 335112f080e7Smrj /* 335212f080e7Smrj * rootnex_setup_cookie() 335312f080e7Smrj * Called in the bind slow path when the sgl uses the copy buffer. If any of 335412f080e7Smrj * the sgl uses the copy buffer, we need to go through each cookie, figure 335512f080e7Smrj * out if it uses the copy buffer, and if it does, save away everything we'll 335612f080e7Smrj * need during sync. 335712f080e7Smrj */ 335812f080e7Smrj static void 335912f080e7Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 336012f080e7Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 336112f080e7Smrj page_t **cur_pp) 336212f080e7Smrj { 336312f080e7Smrj boolean_t copybuf_sz_power_2; 336412f080e7Smrj rootnex_sglinfo_t *sinfo; 3365843e1988Sjohnlev paddr_t paddr; 336612f080e7Smrj uint_t pidx; 336712f080e7Smrj uint_t pcnt; 336812f080e7Smrj off_t poff; 336912f080e7Smrj #if defined(__amd64) 337012f080e7Smrj pfn_t pfn; 337112f080e7Smrj #else 337212f080e7Smrj page_t **pplist; 337312f080e7Smrj #endif 337412f080e7Smrj 337512f080e7Smrj sinfo = &dma->dp_sglinfo; 337612f080e7Smrj 337712f080e7Smrj /* 337812f080e7Smrj * Calculate the page index relative to the start of the buffer. The 337912f080e7Smrj * index to the current page for our buffer is the offset into the 338012f080e7Smrj * first page of the buffer plus our current offset into the buffer 338112f080e7Smrj * itself, shifted of course... 338212f080e7Smrj */ 338312f080e7Smrj pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 338412f080e7Smrj ASSERT(pidx < sinfo->si_max_pages); 338512f080e7Smrj 338612f080e7Smrj /* if this cookie uses the copy buffer */ 338712f080e7Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 338812f080e7Smrj /* 338912f080e7Smrj * NOTE: we know that since this cookie uses the copy buffer, it 339012f080e7Smrj * is <= MMU_PAGESIZE. 339112f080e7Smrj */ 339212f080e7Smrj 339312f080e7Smrj /* 339412f080e7Smrj * get the offset into the page. For the 64-bit kernel, get the 339512f080e7Smrj * pfn which we'll use with seg kpm. 339612f080e7Smrj */ 3397843e1988Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 339812f080e7Smrj #if defined(__amd64) 3399843e1988Sjohnlev /* mfn_to_pfn() is a NOP on i86pc */ 3400843e1988Sjohnlev pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); 3401843e1988Sjohnlev #endif /* __amd64 */ 340212f080e7Smrj 340312f080e7Smrj /* figure out if the copybuf size is a power of 2 */ 340412f080e7Smrj if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 340512f080e7Smrj copybuf_sz_power_2 = B_FALSE; 340612f080e7Smrj } else { 340712f080e7Smrj copybuf_sz_power_2 = B_TRUE; 340812f080e7Smrj } 340912f080e7Smrj 341012f080e7Smrj /* This page uses the copy buffer */ 341112f080e7Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 341212f080e7Smrj 341312f080e7Smrj /* 341412f080e7Smrj * save the copy buffer KVA that we'll use with this page. 341512f080e7Smrj * if we still fit within the copybuf, it's a simple add. 341612f080e7Smrj * otherwise, we need to wrap over using & or % accordingly. 341712f080e7Smrj */ 341812f080e7Smrj if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 341912f080e7Smrj dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 342012f080e7Smrj *copybuf_used; 342112f080e7Smrj } else { 342212f080e7Smrj if (copybuf_sz_power_2) { 342312f080e7Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 342412f080e7Smrj (uintptr_t)dma->dp_cbaddr + 342512f080e7Smrj (*copybuf_used & 342612f080e7Smrj (dma->dp_copybuf_size - 1))); 342712f080e7Smrj } else { 342812f080e7Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 342912f080e7Smrj (uintptr_t)dma->dp_cbaddr + 343012f080e7Smrj (*copybuf_used % dma->dp_copybuf_size)); 343112f080e7Smrj } 343212f080e7Smrj } 343312f080e7Smrj 343412f080e7Smrj /* 343512f080e7Smrj * over write the cookie physical address with the address of 343612f080e7Smrj * the physical address of the copy buffer page that we will 343712f080e7Smrj * use. 343812f080e7Smrj */ 3439843e1988Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 344012f080e7Smrj dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 344112f080e7Smrj 3442843e1988Sjohnlev #ifdef __xpv 3443843e1988Sjohnlev /* 3444843e1988Sjohnlev * If we're dom0, we're using a real device so we need to load 3445843e1988Sjohnlev * the cookies with MAs instead of PAs. 3446843e1988Sjohnlev */ 3447843e1988Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 3448843e1988Sjohnlev #else 3449843e1988Sjohnlev cookie->dmac_laddress = paddr; 3450843e1988Sjohnlev #endif 3451843e1988Sjohnlev 345212f080e7Smrj /* if we have a kernel VA, it's easy, just save that address */ 345312f080e7Smrj if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 345412f080e7Smrj (sinfo->si_asp == &kas)) { 345512f080e7Smrj /* 345612f080e7Smrj * save away the page aligned virtual address of the 345712f080e7Smrj * driver buffer. Offsets are handled in the sync code. 345812f080e7Smrj */ 345912f080e7Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 346012f080e7Smrj dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 346112f080e7Smrj & MMU_PAGEMASK); 346212f080e7Smrj #if !defined(__amd64) 346312f080e7Smrj /* 346412f080e7Smrj * we didn't need to, and will never need to map this 346512f080e7Smrj * page. 346612f080e7Smrj */ 346712f080e7Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 346812f080e7Smrj #endif 346912f080e7Smrj 347012f080e7Smrj /* we don't have a kernel VA. We need one for the bcopy. */ 347112f080e7Smrj } else { 347212f080e7Smrj #if defined(__amd64) 347312f080e7Smrj /* 347412f080e7Smrj * for the 64-bit kernel, it's easy. We use seg kpm to 347512f080e7Smrj * get a Kernel VA for the corresponding pfn. 347612f080e7Smrj */ 347712f080e7Smrj dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 347812f080e7Smrj #else 347912f080e7Smrj /* 348012f080e7Smrj * for the 32-bit kernel, this is a pain. First we'll 348112f080e7Smrj * save away the page_t or user VA for this page. This 348212f080e7Smrj * is needed in rootnex_dma_win() when we switch to a 348312f080e7Smrj * new window which requires us to re-map the copy 348412f080e7Smrj * buffer. 348512f080e7Smrj */ 348612f080e7Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 348712f080e7Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 348812f080e7Smrj dma->dp_pgmap[pidx].pm_pp = *cur_pp; 348912f080e7Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 349012f080e7Smrj } else if (pplist != NULL) { 349112f080e7Smrj dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 349212f080e7Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 349312f080e7Smrj } else { 349412f080e7Smrj dma->dp_pgmap[pidx].pm_pp = NULL; 349512f080e7Smrj dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 349612f080e7Smrj (((uintptr_t) 349712f080e7Smrj dmar_object->dmao_obj.virt_obj.v_addr + 349812f080e7Smrj cur_offset) & MMU_PAGEMASK); 349912f080e7Smrj } 350012f080e7Smrj 350112f080e7Smrj /* 350212f080e7Smrj * save away the page aligned virtual address which was 350312f080e7Smrj * allocated from the kernel heap arena (taking into 350412f080e7Smrj * account if we need more copy buffer than we alloced 350512f080e7Smrj * and use multiple windows to handle this, i.e. &,%). 350612f080e7Smrj * NOTE: there isn't and physical memory backing up this 350712f080e7Smrj * virtual address space currently. 350812f080e7Smrj */ 350912f080e7Smrj if ((*copybuf_used + MMU_PAGESIZE) <= 351012f080e7Smrj dma->dp_copybuf_size) { 351112f080e7Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 351212f080e7Smrj (((uintptr_t)dma->dp_kva + *copybuf_used) & 351312f080e7Smrj MMU_PAGEMASK); 351412f080e7Smrj } else { 351512f080e7Smrj if (copybuf_sz_power_2) { 351612f080e7Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 351712f080e7Smrj (((uintptr_t)dma->dp_kva + 351812f080e7Smrj (*copybuf_used & 351912f080e7Smrj (dma->dp_copybuf_size - 1))) & 352012f080e7Smrj MMU_PAGEMASK); 352112f080e7Smrj } else { 352212f080e7Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 352312f080e7Smrj (((uintptr_t)dma->dp_kva + 352412f080e7Smrj (*copybuf_used % 352512f080e7Smrj dma->dp_copybuf_size)) & 352612f080e7Smrj MMU_PAGEMASK); 352712f080e7Smrj } 352812f080e7Smrj } 352912f080e7Smrj 353012f080e7Smrj /* 353112f080e7Smrj * if we haven't used up the available copy buffer yet, 353212f080e7Smrj * map the kva to the physical page. 353312f080e7Smrj */ 353412f080e7Smrj if (!dma->dp_cb_remaping && ((*copybuf_used + 353512f080e7Smrj MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 353612f080e7Smrj dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 353712f080e7Smrj if (dma->dp_pgmap[pidx].pm_pp != NULL) { 353812f080e7Smrj i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 353912f080e7Smrj dma->dp_pgmap[pidx].pm_kaddr); 354012f080e7Smrj } else { 354112f080e7Smrj i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 354212f080e7Smrj sinfo->si_asp, 354312f080e7Smrj dma->dp_pgmap[pidx].pm_kaddr); 354412f080e7Smrj } 354512f080e7Smrj 354612f080e7Smrj /* 354712f080e7Smrj * we've used up the available copy buffer, this page 354812f080e7Smrj * will have to be mapped during rootnex_dma_win() when 354912f080e7Smrj * we switch to a new window which requires a re-map 355012f080e7Smrj * the copy buffer. (32-bit kernel only) 355112f080e7Smrj */ 355212f080e7Smrj } else { 355312f080e7Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 355412f080e7Smrj } 355512f080e7Smrj #endif 355612f080e7Smrj /* go to the next page_t */ 355712f080e7Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 355812f080e7Smrj *cur_pp = (*cur_pp)->p_next; 355912f080e7Smrj } 356012f080e7Smrj } 356112f080e7Smrj 356212f080e7Smrj /* add to the copy buffer count */ 356312f080e7Smrj *copybuf_used += MMU_PAGESIZE; 356412f080e7Smrj 356512f080e7Smrj /* 356612f080e7Smrj * This cookie doesn't use the copy buffer. Walk through the pages this 356712f080e7Smrj * cookie occupies to reflect this. 356812f080e7Smrj */ 356912f080e7Smrj } else { 357012f080e7Smrj /* 357112f080e7Smrj * figure out how many pages the cookie occupies. We need to 357212f080e7Smrj * use the original page offset of the buffer and the cookies 357312f080e7Smrj * offset in the buffer to do this. 357412f080e7Smrj */ 357512f080e7Smrj poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 357612f080e7Smrj pcnt = mmu_btopr(cookie->dmac_size + poff); 357712f080e7Smrj 357812f080e7Smrj while (pcnt > 0) { 357912f080e7Smrj #if !defined(__amd64) 358012f080e7Smrj /* 358112f080e7Smrj * the 32-bit kernel doesn't have seg kpm, so we need 358212f080e7Smrj * to map in the driver buffer (if it didn't come down 358312f080e7Smrj * with a kernel VA) on the fly. Since this page doesn't 358412f080e7Smrj * use the copy buffer, it's not, or will it ever, have 358512f080e7Smrj * to be mapped in. 358612f080e7Smrj */ 358712f080e7Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 358812f080e7Smrj #endif 358912f080e7Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 359012f080e7Smrj 359112f080e7Smrj /* 359212f080e7Smrj * we need to update pidx and cur_pp or we'll loose 359312f080e7Smrj * track of where we are. 359412f080e7Smrj */ 359512f080e7Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 359612f080e7Smrj *cur_pp = (*cur_pp)->p_next; 359712f080e7Smrj } 359812f080e7Smrj pidx++; 359912f080e7Smrj pcnt--; 360012f080e7Smrj } 360112f080e7Smrj } 360212f080e7Smrj } 360312f080e7Smrj 360412f080e7Smrj 360512f080e7Smrj /* 360612f080e7Smrj * rootnex_sgllen_window_boundary() 360712f080e7Smrj * Called in the bind slow path when the next cookie causes us to exceed (in 360812f080e7Smrj * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 360912f080e7Smrj * length supported by the DMA H/W. 361012f080e7Smrj */ 361112f080e7Smrj static int 361212f080e7Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 361312f080e7Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 361412f080e7Smrj off_t cur_offset) 361512f080e7Smrj { 361612f080e7Smrj off_t new_offset; 361712f080e7Smrj size_t trim_sz; 361812f080e7Smrj off_t coffset; 361912f080e7Smrj 362012f080e7Smrj 362112f080e7Smrj /* 362212f080e7Smrj * if we know we'll never have to trim, it's pretty easy. Just move to 362312f080e7Smrj * the next window and init it. We're done. 362412f080e7Smrj */ 362512f080e7Smrj if (!dma->dp_trim_required) { 362612f080e7Smrj (*windowp)++; 362712f080e7Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 362812f080e7Smrj (*windowp)->wd_cookie_cnt++; 362912f080e7Smrj (*windowp)->wd_size = cookie->dmac_size; 363012f080e7Smrj return (DDI_SUCCESS); 363112f080e7Smrj } 363212f080e7Smrj 363312f080e7Smrj /* figure out how much we need to trim from the window */ 363412f080e7Smrj ASSERT(attr->dma_attr_granular != 0); 363512f080e7Smrj if (dma->dp_granularity_power_2) { 363612f080e7Smrj trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 363712f080e7Smrj } else { 363812f080e7Smrj trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 363912f080e7Smrj } 364012f080e7Smrj 364112f080e7Smrj /* The window's a whole multiple of granularity. We're done */ 364212f080e7Smrj if (trim_sz == 0) { 364312f080e7Smrj (*windowp)++; 364412f080e7Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 364512f080e7Smrj (*windowp)->wd_cookie_cnt++; 364612f080e7Smrj (*windowp)->wd_size = cookie->dmac_size; 364712f080e7Smrj return (DDI_SUCCESS); 364812f080e7Smrj } 364912f080e7Smrj 365012f080e7Smrj /* 365112f080e7Smrj * The window's not a whole multiple of granularity, since we know this 365212f080e7Smrj * is due to the sgllen, we need to go back to the last cookie and trim 365312f080e7Smrj * that one, add the left over part of the old cookie into the new 365412f080e7Smrj * window, and then add in the new cookie into the new window. 365512f080e7Smrj */ 365612f080e7Smrj 365712f080e7Smrj /* 365812f080e7Smrj * make sure the driver isn't making us do something bad... Trimming and 365912f080e7Smrj * sgllen == 1 don't go together. 366012f080e7Smrj */ 366112f080e7Smrj if (attr->dma_attr_sgllen == 1) { 366212f080e7Smrj return (DDI_DMA_NOMAPPING); 366312f080e7Smrj } 366412f080e7Smrj 366512f080e7Smrj /* 366612f080e7Smrj * first, setup the current window to account for the trim. Need to go 366712f080e7Smrj * back to the last cookie for this. 366812f080e7Smrj */ 366912f080e7Smrj cookie--; 367012f080e7Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 367112f080e7Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3672843e1988Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 367312f080e7Smrj ASSERT(cookie->dmac_size > trim_sz); 367412f080e7Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 367512f080e7Smrj (*windowp)->wd_size -= trim_sz; 367612f080e7Smrj 367712f080e7Smrj /* save the buffer offsets for the next window */ 367812f080e7Smrj coffset = cookie->dmac_size - trim_sz; 367912f080e7Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 368012f080e7Smrj 368112f080e7Smrj /* 368212f080e7Smrj * set this now in case this is the first window. all other cases are 368312f080e7Smrj * set in dma_win() 368412f080e7Smrj */ 368512f080e7Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 368612f080e7Smrj 368712f080e7Smrj /* 368812f080e7Smrj * initialize the next window using what's left over in the previous 368912f080e7Smrj * cookie. 369012f080e7Smrj */ 369112f080e7Smrj (*windowp)++; 369212f080e7Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 369312f080e7Smrj (*windowp)->wd_cookie_cnt++; 369412f080e7Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3695843e1988Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 369612f080e7Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 369712f080e7Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 369812f080e7Smrj (*windowp)->wd_dosync = B_TRUE; 369912f080e7Smrj } 370012f080e7Smrj 370112f080e7Smrj /* 370212f080e7Smrj * now go back to the current cookie and add it to the new window. set 370312f080e7Smrj * the new window size to the what was left over from the previous 370412f080e7Smrj * cookie and what's in the current cookie. 370512f080e7Smrj */ 370612f080e7Smrj cookie++; 370712f080e7Smrj (*windowp)->wd_cookie_cnt++; 370812f080e7Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 370912f080e7Smrj 371012f080e7Smrj /* 371112f080e7Smrj * trim plus the next cookie could put us over maxxfer (a cookie can be 371212f080e7Smrj * a max size of maxxfer). Handle that case. 371312f080e7Smrj */ 371412f080e7Smrj if ((*windowp)->wd_size > dma->dp_maxxfer) { 371512f080e7Smrj /* 371612f080e7Smrj * maxxfer is already a whole multiple of granularity, and this 371712f080e7Smrj * trim will be <= the previous trim (since a cookie can't be 371812f080e7Smrj * larger than maxxfer). Make things simple here. 371912f080e7Smrj */ 372012f080e7Smrj trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 372112f080e7Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 372212f080e7Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3723843e1988Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 372412f080e7Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 372512f080e7Smrj (*windowp)->wd_size -= trim_sz; 372612f080e7Smrj ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 372712f080e7Smrj 372812f080e7Smrj /* save the buffer offsets for the next window */ 372912f080e7Smrj coffset = cookie->dmac_size - trim_sz; 373012f080e7Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 373112f080e7Smrj 373212f080e7Smrj /* setup the next window */ 373312f080e7Smrj (*windowp)++; 373412f080e7Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 373512f080e7Smrj (*windowp)->wd_cookie_cnt++; 373612f080e7Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3737843e1988Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 373812f080e7Smrj coffset; 373912f080e7Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 374012f080e7Smrj } 374112f080e7Smrj 374212f080e7Smrj return (DDI_SUCCESS); 374312f080e7Smrj } 374412f080e7Smrj 374512f080e7Smrj 374612f080e7Smrj /* 374712f080e7Smrj * rootnex_copybuf_window_boundary() 374812f080e7Smrj * Called in bind slowpath when we get to a window boundary because we used 374912f080e7Smrj * up all the copy buffer that we have. 375012f080e7Smrj */ 375112f080e7Smrj static int 375212f080e7Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 375312f080e7Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 375412f080e7Smrj size_t *copybuf_used) 375512f080e7Smrj { 375612f080e7Smrj rootnex_sglinfo_t *sinfo; 375712f080e7Smrj off_t new_offset; 375812f080e7Smrj size_t trim_sz; 3759843e1988Sjohnlev paddr_t paddr; 376012f080e7Smrj off_t coffset; 376112f080e7Smrj uint_t pidx; 376212f080e7Smrj off_t poff; 376312f080e7Smrj 376412f080e7Smrj 376512f080e7Smrj sinfo = &dma->dp_sglinfo; 376612f080e7Smrj 376712f080e7Smrj /* 376812f080e7Smrj * the copy buffer should be a whole multiple of page size. We know that 376912f080e7Smrj * this cookie is <= MMU_PAGESIZE. 377012f080e7Smrj */ 377112f080e7Smrj ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 377212f080e7Smrj 377312f080e7Smrj /* 377412f080e7Smrj * from now on, all new windows in this bind need to be re-mapped during 377512f080e7Smrj * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 377612f080e7Smrj * space... 377712f080e7Smrj */ 377812f080e7Smrj #if !defined(__amd64) 377912f080e7Smrj dma->dp_cb_remaping = B_TRUE; 378012f080e7Smrj #endif 378112f080e7Smrj 378212f080e7Smrj /* reset copybuf used */ 378312f080e7Smrj *copybuf_used = 0; 378412f080e7Smrj 378512f080e7Smrj /* 378612f080e7Smrj * if we don't have to trim (since granularity is set to 1), go to the 378712f080e7Smrj * next window and add the current cookie to it. We know the current 378812f080e7Smrj * cookie uses the copy buffer since we're in this code path. 378912f080e7Smrj */ 379012f080e7Smrj if (!dma->dp_trim_required) { 379112f080e7Smrj (*windowp)++; 379212f080e7Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 379312f080e7Smrj 379412f080e7Smrj /* Add this cookie to the new window */ 379512f080e7Smrj (*windowp)->wd_cookie_cnt++; 379612f080e7Smrj (*windowp)->wd_size += cookie->dmac_size; 379712f080e7Smrj *copybuf_used += MMU_PAGESIZE; 379812f080e7Smrj return (DDI_SUCCESS); 379912f080e7Smrj } 380012f080e7Smrj 380112f080e7Smrj /* 380212f080e7Smrj * *** may need to trim, figure it out. 380312f080e7Smrj */ 380412f080e7Smrj 380512f080e7Smrj /* figure out how much we need to trim from the window */ 380612f080e7Smrj if (dma->dp_granularity_power_2) { 380712f080e7Smrj trim_sz = (*windowp)->wd_size & 380812f080e7Smrj (hp->dmai_attr.dma_attr_granular - 1); 380912f080e7Smrj } else { 381012f080e7Smrj trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 381112f080e7Smrj } 381212f080e7Smrj 381312f080e7Smrj /* 381412f080e7Smrj * if the window's a whole multiple of granularity, go to the next 381512f080e7Smrj * window, init it, then add in the current cookie. We know the current 381612f080e7Smrj * cookie uses the copy buffer since we're in this code path. 381712f080e7Smrj */ 381812f080e7Smrj if (trim_sz == 0) { 381912f080e7Smrj (*windowp)++; 382012f080e7Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 382112f080e7Smrj 382212f080e7Smrj /* Add this cookie to the new window */ 382312f080e7Smrj (*windowp)->wd_cookie_cnt++; 382412f080e7Smrj (*windowp)->wd_size += cookie->dmac_size; 382512f080e7Smrj *copybuf_used += MMU_PAGESIZE; 382612f080e7Smrj return (DDI_SUCCESS); 382712f080e7Smrj } 382812f080e7Smrj 382912f080e7Smrj /* 383012f080e7Smrj * *** We figured it out, we definitly need to trim 383112f080e7Smrj */ 383212f080e7Smrj 383312f080e7Smrj /* 383412f080e7Smrj * make sure the driver isn't making us do something bad... 383512f080e7Smrj * Trimming and sgllen == 1 don't go together. 383612f080e7Smrj */ 383712f080e7Smrj if (hp->dmai_attr.dma_attr_sgllen == 1) { 383812f080e7Smrj return (DDI_DMA_NOMAPPING); 383912f080e7Smrj } 384012f080e7Smrj 384112f080e7Smrj /* 384212f080e7Smrj * first, setup the current window to account for the trim. Need to go 384312f080e7Smrj * back to the last cookie for this. Some of the last cookie will be in 384412f080e7Smrj * the current window, and some of the last cookie will be in the new 384512f080e7Smrj * window. All of the current cookie will be in the new window. 384612f080e7Smrj */ 384712f080e7Smrj cookie--; 384812f080e7Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 384912f080e7Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3850843e1988Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 385112f080e7Smrj ASSERT(cookie->dmac_size > trim_sz); 385212f080e7Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 385312f080e7Smrj (*windowp)->wd_size -= trim_sz; 385412f080e7Smrj 385512f080e7Smrj /* 385612f080e7Smrj * we're trimming the last cookie (not the current cookie). So that 385712f080e7Smrj * last cookie may have or may not have been using the copy buffer ( 385812f080e7Smrj * we know the cookie passed in uses the copy buffer since we're in 385912f080e7Smrj * this code path). 386012f080e7Smrj * 386112f080e7Smrj * If the last cookie doesn't use the copy buffer, nothing special to 386212f080e7Smrj * do. However, if it does uses the copy buffer, it will be both the 386312f080e7Smrj * last page in the current window and the first page in the next 386412f080e7Smrj * window. Since we are reusing the copy buffer (and KVA space on the 386512f080e7Smrj * 32-bit kernel), this page will use the end of the copy buffer in the 386612f080e7Smrj * current window, and the start of the copy buffer in the next window. 386712f080e7Smrj * Track that info... The cookie physical address was already set to 386812f080e7Smrj * the copy buffer physical address in setup_cookie.. 386912f080e7Smrj */ 387012f080e7Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 387112f080e7Smrj pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 387212f080e7Smrj (*windowp)->wd_size) >> MMU_PAGESHIFT; 387312f080e7Smrj (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 387412f080e7Smrj (*windowp)->wd_trim.tr_last_pidx = pidx; 387512f080e7Smrj (*windowp)->wd_trim.tr_last_cbaddr = 387612f080e7Smrj dma->dp_pgmap[pidx].pm_cbaddr; 387712f080e7Smrj #if !defined(__amd64) 387812f080e7Smrj (*windowp)->wd_trim.tr_last_kaddr = 387912f080e7Smrj dma->dp_pgmap[pidx].pm_kaddr; 388012f080e7Smrj #endif 388112f080e7Smrj } 388212f080e7Smrj 388312f080e7Smrj /* save the buffer offsets for the next window */ 388412f080e7Smrj coffset = cookie->dmac_size - trim_sz; 388512f080e7Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 388612f080e7Smrj 388712f080e7Smrj /* 388812f080e7Smrj * set this now in case this is the first window. all other cases are 388912f080e7Smrj * set in dma_win() 389012f080e7Smrj */ 389112f080e7Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 389212f080e7Smrj 389312f080e7Smrj /* 389412f080e7Smrj * initialize the next window using what's left over in the previous 389512f080e7Smrj * cookie. 389612f080e7Smrj */ 389712f080e7Smrj (*windowp)++; 389812f080e7Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 389912f080e7Smrj (*windowp)->wd_cookie_cnt++; 390012f080e7Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3901843e1988Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 390212f080e7Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 390312f080e7Smrj 390412f080e7Smrj /* 390512f080e7Smrj * again, we're tracking if the last cookie uses the copy buffer. 390612f080e7Smrj * read the comment above for more info on why we need to track 390712f080e7Smrj * additional state. 390812f080e7Smrj * 390912f080e7Smrj * For the first cookie in the new window, we need reset the physical 391012f080e7Smrj * address to DMA into to the start of the copy buffer plus any 391112f080e7Smrj * initial page offset which may be present. 391212f080e7Smrj */ 391312f080e7Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 391412f080e7Smrj (*windowp)->wd_dosync = B_TRUE; 391512f080e7Smrj (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 391612f080e7Smrj (*windowp)->wd_trim.tr_first_pidx = pidx; 391712f080e7Smrj (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 391812f080e7Smrj poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 3919843e1988Sjohnlev 3920843e1988Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) + 3921843e1988Sjohnlev poff; 3922843e1988Sjohnlev #ifdef __xpv 3923843e1988Sjohnlev /* 3924843e1988Sjohnlev * If we're dom0, we're using a real device so we need to load 3925843e1988Sjohnlev * the cookies with MAs instead of PAs. 3926843e1988Sjohnlev */ 3927843e1988Sjohnlev (*windowp)->wd_trim.tr_first_paddr = 3928843e1988Sjohnlev ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 3929843e1988Sjohnlev #else 3930843e1988Sjohnlev (*windowp)->wd_trim.tr_first_paddr = paddr; 3931843e1988Sjohnlev #endif 3932843e1988Sjohnlev 393312f080e7Smrj #if !defined(__amd64) 393412f080e7Smrj (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 393512f080e7Smrj #endif 393612f080e7Smrj /* account for the cookie copybuf usage in the new window */ 393712f080e7Smrj *copybuf_used += MMU_PAGESIZE; 393812f080e7Smrj 393912f080e7Smrj /* 394012f080e7Smrj * every piece of code has to have a hack, and here is this 394112f080e7Smrj * ones :-) 394212f080e7Smrj * 394312f080e7Smrj * There is a complex interaction between setup_cookie and the 394412f080e7Smrj * copybuf window boundary. The complexity had to be in either 394512f080e7Smrj * the maxxfer window, or the copybuf window, and I chose the 394612f080e7Smrj * copybuf code. 394712f080e7Smrj * 394812f080e7Smrj * So in this code path, we have taken the last cookie, 394912f080e7Smrj * virtually broken it in half due to the trim, and it happens 395012f080e7Smrj * to use the copybuf which further complicates life. At the 395112f080e7Smrj * same time, we have already setup the current cookie, which 395212f080e7Smrj * is now wrong. More background info: the current cookie uses 395312f080e7Smrj * the copybuf, so it is only a page long max. So we need to 395412f080e7Smrj * fix the current cookies copy buffer address, physical 395512f080e7Smrj * address, and kva for the 32-bit kernel. We due this by 395612f080e7Smrj * bumping them by page size (of course, we can't due this on 395712f080e7Smrj * the physical address since the copy buffer may not be 395812f080e7Smrj * physically contiguous). 395912f080e7Smrj */ 396012f080e7Smrj cookie++; 396112f080e7Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 3962843e1988Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3963843e1988Sjohnlev 3964843e1988Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 396512f080e7Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 3966843e1988Sjohnlev #ifdef __xpv 3967843e1988Sjohnlev /* 3968843e1988Sjohnlev * If we're dom0, we're using a real device so we need to load 3969843e1988Sjohnlev * the cookies with MAs instead of PAs. 3970843e1988Sjohnlev */ 3971843e1988Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 3972843e1988Sjohnlev #else 3973843e1988Sjohnlev cookie->dmac_laddress = paddr; 3974843e1988Sjohnlev #endif 3975843e1988Sjohnlev 397612f080e7Smrj #if !defined(__amd64) 397712f080e7Smrj ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 397812f080e7Smrj dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 397912f080e7Smrj #endif 398012f080e7Smrj } else { 398112f080e7Smrj /* go back to the current cookie */ 398212f080e7Smrj cookie++; 398312f080e7Smrj } 398412f080e7Smrj 398512f080e7Smrj /* 398612f080e7Smrj * add the current cookie to the new window. set the new window size to 398712f080e7Smrj * the what was left over from the previous cookie and what's in the 398812f080e7Smrj * current cookie. 398912f080e7Smrj */ 399012f080e7Smrj (*windowp)->wd_cookie_cnt++; 399112f080e7Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 399212f080e7Smrj ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 399312f080e7Smrj 399412f080e7Smrj /* 399512f080e7Smrj * we know that the cookie passed in always uses the copy buffer. We 399612f080e7Smrj * wouldn't be here if it didn't. 399712f080e7Smrj */ 399812f080e7Smrj *copybuf_used += MMU_PAGESIZE; 399912f080e7Smrj 400012f080e7Smrj return (DDI_SUCCESS); 400112f080e7Smrj } 400212f080e7Smrj 400312f080e7Smrj 400412f080e7Smrj /* 400512f080e7Smrj * rootnex_maxxfer_window_boundary() 400612f080e7Smrj * Called in bind slowpath when we get to a window boundary because we will 400712f080e7Smrj * go over maxxfer. 400812f080e7Smrj */ 400912f080e7Smrj static int 401012f080e7Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 401112f080e7Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 401212f080e7Smrj { 401312f080e7Smrj size_t dmac_size; 401412f080e7Smrj off_t new_offset; 401512f080e7Smrj size_t trim_sz; 401612f080e7Smrj off_t coffset; 401712f080e7Smrj 401812f080e7Smrj 401912f080e7Smrj /* 402012f080e7Smrj * calculate how much we have to trim off of the current cookie to equal 402112f080e7Smrj * maxxfer. We don't have to account for granularity here since our 402212f080e7Smrj * maxxfer already takes that into account. 402312f080e7Smrj */ 402412f080e7Smrj trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 402512f080e7Smrj ASSERT(trim_sz <= cookie->dmac_size); 402612f080e7Smrj ASSERT(trim_sz <= dma->dp_maxxfer); 402712f080e7Smrj 402812f080e7Smrj /* save cookie size since we need it later and we might change it */ 402912f080e7Smrj dmac_size = cookie->dmac_size; 403012f080e7Smrj 403112f080e7Smrj /* 403212f080e7Smrj * if we're not trimming the entire cookie, setup the current window to 403312f080e7Smrj * account for the trim. 403412f080e7Smrj */ 403512f080e7Smrj if (trim_sz < cookie->dmac_size) { 403612f080e7Smrj (*windowp)->wd_cookie_cnt++; 403712f080e7Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 403812f080e7Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 4039843e1988Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 404012f080e7Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 404112f080e7Smrj (*windowp)->wd_size = dma->dp_maxxfer; 404212f080e7Smrj 404312f080e7Smrj /* 404412f080e7Smrj * set the adjusted cookie size now in case this is the first 404512f080e7Smrj * window. All other windows are taken care of in get win 404612f080e7Smrj */ 404712f080e7Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 404812f080e7Smrj } 404912f080e7Smrj 405012f080e7Smrj /* 405112f080e7Smrj * coffset is the current offset within the cookie, new_offset is the 405212f080e7Smrj * current offset with the entire buffer. 405312f080e7Smrj */ 405412f080e7Smrj coffset = dmac_size - trim_sz; 405512f080e7Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 405612f080e7Smrj 405712f080e7Smrj /* initialize the next window */ 405812f080e7Smrj (*windowp)++; 405912f080e7Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 406012f080e7Smrj (*windowp)->wd_cookie_cnt++; 406112f080e7Smrj (*windowp)->wd_size = trim_sz; 406212f080e7Smrj if (trim_sz < dmac_size) { 406312f080e7Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4064843e1988Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 406512f080e7Smrj coffset; 406612f080e7Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 406712f080e7Smrj } 406812f080e7Smrj 406912f080e7Smrj return (DDI_SUCCESS); 407012f080e7Smrj } 407112f080e7Smrj 407212f080e7Smrj 407312f080e7Smrj /*ARGSUSED*/ 407412f080e7Smrj static int 407520906b23SVikram Hegde rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 407612f080e7Smrj off_t off, size_t len, uint_t cache_flags) 407712f080e7Smrj { 407812f080e7Smrj rootnex_sglinfo_t *sinfo; 407912f080e7Smrj rootnex_pgmap_t *cbpage; 408012f080e7Smrj rootnex_window_t *win; 408112f080e7Smrj ddi_dma_impl_t *hp; 408212f080e7Smrj rootnex_dma_t *dma; 408312f080e7Smrj caddr_t fromaddr; 408412f080e7Smrj caddr_t toaddr; 408512f080e7Smrj uint_t psize; 408612f080e7Smrj off_t offset; 408712f080e7Smrj uint_t pidx; 408812f080e7Smrj size_t size; 408912f080e7Smrj off_t poff; 409012f080e7Smrj int e; 409112f080e7Smrj 409212f080e7Smrj 409312f080e7Smrj hp = (ddi_dma_impl_t *)handle; 409412f080e7Smrj dma = (rootnex_dma_t *)hp->dmai_private; 409512f080e7Smrj sinfo = &dma->dp_sglinfo; 409612f080e7Smrj 409712f080e7Smrj /* 409812f080e7Smrj * if we don't have any windows, we don't need to sync. A copybuf 409912f080e7Smrj * will cause us to have at least one window. 410012f080e7Smrj */ 410112f080e7Smrj if (dma->dp_window == NULL) { 410212f080e7Smrj return (DDI_SUCCESS); 410312f080e7Smrj } 410412f080e7Smrj 410512f080e7Smrj /* This window may not need to be sync'd */ 410612f080e7Smrj win = &dma->dp_window[dma->dp_current_win]; 410712f080e7Smrj if (!win->wd_dosync) { 410812f080e7Smrj return (DDI_SUCCESS); 410912f080e7Smrj } 411012f080e7Smrj 411112f080e7Smrj /* handle off and len special cases */ 411212f080e7Smrj if ((off == 0) || (rootnex_sync_ignore_params)) { 411312f080e7Smrj offset = win->wd_offset; 411412f080e7Smrj } else { 411512f080e7Smrj offset = off; 411612f080e7Smrj } 411712f080e7Smrj if ((len == 0) || (rootnex_sync_ignore_params)) { 411812f080e7Smrj size = win->wd_size; 411912f080e7Smrj } else { 412012f080e7Smrj size = len; 412112f080e7Smrj } 412212f080e7Smrj 412312f080e7Smrj /* check the sync args to make sure they make a little sense */ 412412f080e7Smrj if (rootnex_sync_check_parms) { 412512f080e7Smrj e = rootnex_valid_sync_parms(hp, win, offset, size, 412612f080e7Smrj cache_flags); 412712f080e7Smrj if (e != DDI_SUCCESS) { 412812f080e7Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 412912f080e7Smrj return (DDI_FAILURE); 413012f080e7Smrj } 413112f080e7Smrj } 413212f080e7Smrj 413312f080e7Smrj /* 413412f080e7Smrj * special case the first page to handle the offset into the page. The 413512f080e7Smrj * offset to the current page for our buffer is the offset into the 413612f080e7Smrj * first page of the buffer plus our current offset into the buffer 413712f080e7Smrj * itself, masked of course. 413812f080e7Smrj */ 413912f080e7Smrj poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 414012f080e7Smrj psize = MIN((MMU_PAGESIZE - poff), size); 414112f080e7Smrj 414212f080e7Smrj /* go through all the pages that we want to sync */ 414312f080e7Smrj while (size > 0) { 414412f080e7Smrj /* 414512f080e7Smrj * Calculate the page index relative to the start of the buffer. 414612f080e7Smrj * The index to the current page for our buffer is the offset 414712f080e7Smrj * into the first page of the buffer plus our current offset 414812f080e7Smrj * into the buffer itself, shifted of course... 414912f080e7Smrj */ 415012f080e7Smrj pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 415112f080e7Smrj ASSERT(pidx < sinfo->si_max_pages); 415212f080e7Smrj 415312f080e7Smrj /* 415412f080e7Smrj * if this page uses the copy buffer, we need to sync it, 415512f080e7Smrj * otherwise, go on to the next page. 415612f080e7Smrj */ 415712f080e7Smrj cbpage = &dma->dp_pgmap[pidx]; 415812f080e7Smrj ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 415912f080e7Smrj (cbpage->pm_uses_copybuf == B_FALSE)); 416012f080e7Smrj if (cbpage->pm_uses_copybuf) { 416112f080e7Smrj /* cbaddr and kaddr should be page aligned */ 416212f080e7Smrj ASSERT(((uintptr_t)cbpage->pm_cbaddr & 416312f080e7Smrj MMU_PAGEOFFSET) == 0); 416412f080e7Smrj ASSERT(((uintptr_t)cbpage->pm_kaddr & 416512f080e7Smrj MMU_PAGEOFFSET) == 0); 416612f080e7Smrj 416712f080e7Smrj /* 416812f080e7Smrj * if we're copying for the device, we are going to 416912f080e7Smrj * copy from the drivers buffer and to the rootnex 417012f080e7Smrj * allocated copy buffer. 417112f080e7Smrj */ 417212f080e7Smrj if (cache_flags == DDI_DMA_SYNC_FORDEV) { 417312f080e7Smrj fromaddr = cbpage->pm_kaddr + poff; 417412f080e7Smrj toaddr = cbpage->pm_cbaddr + poff; 417512f080e7Smrj DTRACE_PROBE2(rootnex__sync__dev, 417612f080e7Smrj dev_info_t *, dma->dp_dip, size_t, psize); 417712f080e7Smrj 417812f080e7Smrj /* 417912f080e7Smrj * if we're copying for the cpu/kernel, we are going to 418012f080e7Smrj * copy from the rootnex allocated copy buffer to the 418112f080e7Smrj * drivers buffer. 418212f080e7Smrj */ 418312f080e7Smrj } else { 418412f080e7Smrj fromaddr = cbpage->pm_cbaddr + poff; 418512f080e7Smrj toaddr = cbpage->pm_kaddr + poff; 418612f080e7Smrj DTRACE_PROBE2(rootnex__sync__cpu, 418712f080e7Smrj dev_info_t *, dma->dp_dip, size_t, psize); 418812f080e7Smrj } 418912f080e7Smrj 419012f080e7Smrj bcopy(fromaddr, toaddr, psize); 419112f080e7Smrj } 419212f080e7Smrj 419312f080e7Smrj /* 419412f080e7Smrj * decrement size until we're done, update our offset into the 419512f080e7Smrj * buffer, and get the next page size. 419612f080e7Smrj */ 419712f080e7Smrj size -= psize; 419812f080e7Smrj offset += psize; 419912f080e7Smrj psize = MIN(MMU_PAGESIZE, size); 420012f080e7Smrj 420112f080e7Smrj /* page offset is zero for the rest of this loop */ 420212f080e7Smrj poff = 0; 420312f080e7Smrj } 420412f080e7Smrj 420512f080e7Smrj return (DDI_SUCCESS); 420612f080e7Smrj } 420712f080e7Smrj 420820906b23SVikram Hegde /* 420920906b23SVikram Hegde * rootnex_dma_sync() 421020906b23SVikram Hegde * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 421120906b23SVikram Hegde * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 421220906b23SVikram Hegde * is set, ddi_dma_sync() returns immediately passing back success. 421320906b23SVikram Hegde */ 421420906b23SVikram Hegde /*ARGSUSED*/ 421520906b23SVikram Hegde static int 421620906b23SVikram Hegde rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 421720906b23SVikram Hegde off_t off, size_t len, uint_t cache_flags) 421820906b23SVikram Hegde { 4219*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 4220b51bbbf5SVikram Hegde if (IOMMU_USED(rdip)) { 422120906b23SVikram Hegde return (iommulib_nexdma_sync(dip, rdip, handle, off, len, 422220906b23SVikram Hegde cache_flags)); 422320906b23SVikram Hegde } 422420906b23SVikram Hegde #endif 422520906b23SVikram Hegde return (rootnex_coredma_sync(dip, rdip, handle, off, len, 422620906b23SVikram Hegde cache_flags)); 422720906b23SVikram Hegde } 422812f080e7Smrj 422912f080e7Smrj /* 423012f080e7Smrj * rootnex_valid_sync_parms() 423112f080e7Smrj * checks the parameters passed to sync to verify they are correct. 423212f080e7Smrj */ 423312f080e7Smrj static int 423412f080e7Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 423512f080e7Smrj off_t offset, size_t size, uint_t cache_flags) 423612f080e7Smrj { 423712f080e7Smrj off_t woffset; 423812f080e7Smrj 423912f080e7Smrj 424012f080e7Smrj /* 424112f080e7Smrj * the first part of the test to make sure the offset passed in is 424212f080e7Smrj * within the window. 424312f080e7Smrj */ 424412f080e7Smrj if (offset < win->wd_offset) { 424512f080e7Smrj return (DDI_FAILURE); 424612f080e7Smrj } 424712f080e7Smrj 424812f080e7Smrj /* 424912f080e7Smrj * second and last part of the test to make sure the offset and length 425012f080e7Smrj * passed in is within the window. 425112f080e7Smrj */ 425212f080e7Smrj woffset = offset - win->wd_offset; 425312f080e7Smrj if ((woffset + size) > win->wd_size) { 425412f080e7Smrj return (DDI_FAILURE); 425512f080e7Smrj } 425612f080e7Smrj 425712f080e7Smrj /* 425812f080e7Smrj * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 425912f080e7Smrj * be set too. 426012f080e7Smrj */ 426112f080e7Smrj if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 426212f080e7Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 426312f080e7Smrj return (DDI_SUCCESS); 426412f080e7Smrj } 426512f080e7Smrj 426612f080e7Smrj /* 426712f080e7Smrj * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 426812f080e7Smrj * should be set. Also DDI_DMA_READ should be set in the flags. 426912f080e7Smrj */ 427012f080e7Smrj if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 427112f080e7Smrj (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 427212f080e7Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 427312f080e7Smrj return (DDI_SUCCESS); 427412f080e7Smrj } 427512f080e7Smrj 427612f080e7Smrj return (DDI_FAILURE); 427712f080e7Smrj } 427812f080e7Smrj 427912f080e7Smrj 428012f080e7Smrj /*ARGSUSED*/ 428112f080e7Smrj static int 428220906b23SVikram Hegde rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 428312f080e7Smrj uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 428412f080e7Smrj uint_t *ccountp) 428512f080e7Smrj { 428612f080e7Smrj rootnex_window_t *window; 428712f080e7Smrj rootnex_trim_t *trim; 428812f080e7Smrj ddi_dma_impl_t *hp; 428912f080e7Smrj rootnex_dma_t *dma; 429012f080e7Smrj #if !defined(__amd64) 429112f080e7Smrj rootnex_sglinfo_t *sinfo; 429212f080e7Smrj rootnex_pgmap_t *pmap; 429312f080e7Smrj uint_t pidx; 429412f080e7Smrj uint_t pcnt; 429512f080e7Smrj off_t poff; 429612f080e7Smrj int i; 429712f080e7Smrj #endif 429812f080e7Smrj 429912f080e7Smrj 430012f080e7Smrj hp = (ddi_dma_impl_t *)handle; 430112f080e7Smrj dma = (rootnex_dma_t *)hp->dmai_private; 430212f080e7Smrj #if !defined(__amd64) 430312f080e7Smrj sinfo = &dma->dp_sglinfo; 430412f080e7Smrj #endif 430512f080e7Smrj 430612f080e7Smrj /* If we try and get a window which doesn't exist, return failure */ 430712f080e7Smrj if (win >= hp->dmai_nwin) { 430812f080e7Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 430912f080e7Smrj return (DDI_FAILURE); 431012f080e7Smrj } 431112f080e7Smrj 431212f080e7Smrj /* 431312f080e7Smrj * if we don't have any windows, and they're asking for the first 431412f080e7Smrj * window, setup the cookie pointer to the first cookie in the bind. 431512f080e7Smrj * setup our return values, then increment the cookie since we return 431612f080e7Smrj * the first cookie on the stack. 431712f080e7Smrj */ 431812f080e7Smrj if (dma->dp_window == NULL) { 431912f080e7Smrj if (win != 0) { 432012f080e7Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 432112f080e7Smrj return (DDI_FAILURE); 432212f080e7Smrj } 432312f080e7Smrj hp->dmai_cookie = dma->dp_cookies; 432412f080e7Smrj *offp = 0; 432512f080e7Smrj *lenp = dma->dp_dma.dmao_size; 432612f080e7Smrj *ccountp = dma->dp_sglinfo.si_sgl_size; 432712f080e7Smrj *cookiep = hp->dmai_cookie[0]; 432812f080e7Smrj hp->dmai_cookie++; 432912f080e7Smrj return (DDI_SUCCESS); 433012f080e7Smrj } 433112f080e7Smrj 433212f080e7Smrj /* sync the old window before moving on to the new one */ 433312f080e7Smrj window = &dma->dp_window[dma->dp_current_win]; 433412f080e7Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 433594f1124eSVikram Hegde (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 433612f080e7Smrj DDI_DMA_SYNC_FORCPU); 433712f080e7Smrj } 433812f080e7Smrj 433912f080e7Smrj #if !defined(__amd64) 434012f080e7Smrj /* 434112f080e7Smrj * before we move to the next window, if we need to re-map, unmap all 434212f080e7Smrj * the pages in this window. 434312f080e7Smrj */ 434412f080e7Smrj if (dma->dp_cb_remaping) { 434512f080e7Smrj /* 434612f080e7Smrj * If we switch to this window again, we'll need to map in 434712f080e7Smrj * on the fly next time. 434812f080e7Smrj */ 434912f080e7Smrj window->wd_remap_copybuf = B_TRUE; 435012f080e7Smrj 435112f080e7Smrj /* 435212f080e7Smrj * calculate the page index into the buffer where this window 435312f080e7Smrj * starts, and the number of pages this window takes up. 435412f080e7Smrj */ 435512f080e7Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 435612f080e7Smrj MMU_PAGESHIFT; 435712f080e7Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 435812f080e7Smrj MMU_PAGEOFFSET; 435912f080e7Smrj pcnt = mmu_btopr(window->wd_size + poff); 436012f080e7Smrj ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 436112f080e7Smrj 436212f080e7Smrj /* unmap pages which are currently mapped in this window */ 436312f080e7Smrj for (i = 0; i < pcnt; i++) { 436412f080e7Smrj if (dma->dp_pgmap[pidx].pm_mapped) { 436512f080e7Smrj hat_unload(kas.a_hat, 436612f080e7Smrj dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 436712f080e7Smrj HAT_UNLOAD); 436812f080e7Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 436912f080e7Smrj } 437012f080e7Smrj pidx++; 437112f080e7Smrj } 437212f080e7Smrj } 437312f080e7Smrj #endif 437412f080e7Smrj 437512f080e7Smrj /* 437612f080e7Smrj * Move to the new window. 437712f080e7Smrj * NOTE: current_win must be set for sync to work right 437812f080e7Smrj */ 437912f080e7Smrj dma->dp_current_win = win; 438012f080e7Smrj window = &dma->dp_window[win]; 438112f080e7Smrj 438212f080e7Smrj /* if needed, adjust the first and/or last cookies for trim */ 438312f080e7Smrj trim = &window->wd_trim; 438412f080e7Smrj if (trim->tr_trim_first) { 4385843e1988Sjohnlev window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; 438612f080e7Smrj window->wd_first_cookie->dmac_size = trim->tr_first_size; 438712f080e7Smrj #if !defined(__amd64) 438812f080e7Smrj window->wd_first_cookie->dmac_type = 438912f080e7Smrj (window->wd_first_cookie->dmac_type & 439012f080e7Smrj ROOTNEX_USES_COPYBUF) + window->wd_offset; 439112f080e7Smrj #endif 439212f080e7Smrj if (trim->tr_first_copybuf_win) { 439312f080e7Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 439412f080e7Smrj trim->tr_first_cbaddr; 439512f080e7Smrj #if !defined(__amd64) 439612f080e7Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 439712f080e7Smrj trim->tr_first_kaddr; 439812f080e7Smrj #endif 439912f080e7Smrj } 440012f080e7Smrj } 440112f080e7Smrj if (trim->tr_trim_last) { 4402843e1988Sjohnlev trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr; 440312f080e7Smrj trim->tr_last_cookie->dmac_size = trim->tr_last_size; 440412f080e7Smrj if (trim->tr_last_copybuf_win) { 440512f080e7Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 440612f080e7Smrj trim->tr_last_cbaddr; 440712f080e7Smrj #if !defined(__amd64) 440812f080e7Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 440912f080e7Smrj trim->tr_last_kaddr; 441012f080e7Smrj #endif 441112f080e7Smrj } 441212f080e7Smrj } 441312f080e7Smrj 441412f080e7Smrj /* 441512f080e7Smrj * setup the cookie pointer to the first cookie in the window. setup 441612f080e7Smrj * our return values, then increment the cookie since we return the 441712f080e7Smrj * first cookie on the stack. 441812f080e7Smrj */ 441912f080e7Smrj hp->dmai_cookie = window->wd_first_cookie; 442012f080e7Smrj *offp = window->wd_offset; 442112f080e7Smrj *lenp = window->wd_size; 442212f080e7Smrj *ccountp = window->wd_cookie_cnt; 442312f080e7Smrj *cookiep = hp->dmai_cookie[0]; 442412f080e7Smrj hp->dmai_cookie++; 442512f080e7Smrj 442612f080e7Smrj #if !defined(__amd64) 442712f080e7Smrj /* re-map copybuf if required for this window */ 442812f080e7Smrj if (dma->dp_cb_remaping) { 442912f080e7Smrj /* 443012f080e7Smrj * calculate the page index into the buffer where this 443112f080e7Smrj * window starts. 443212f080e7Smrj */ 443312f080e7Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 443412f080e7Smrj MMU_PAGESHIFT; 443512f080e7Smrj ASSERT(pidx < sinfo->si_max_pages); 443612f080e7Smrj 443712f080e7Smrj /* 443812f080e7Smrj * the first page can get unmapped if it's shared with the 443912f080e7Smrj * previous window. Even if the rest of this window is already 444012f080e7Smrj * mapped in, we need to still check this one. 444112f080e7Smrj */ 444212f080e7Smrj pmap = &dma->dp_pgmap[pidx]; 444312f080e7Smrj if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 444412f080e7Smrj if (pmap->pm_pp != NULL) { 444512f080e7Smrj pmap->pm_mapped = B_TRUE; 444612f080e7Smrj i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 444712f080e7Smrj } else if (pmap->pm_vaddr != NULL) { 444812f080e7Smrj pmap->pm_mapped = B_TRUE; 444912f080e7Smrj i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 445012f080e7Smrj pmap->pm_kaddr); 445112f080e7Smrj } 445212f080e7Smrj } 445312f080e7Smrj pidx++; 445412f080e7Smrj 445512f080e7Smrj /* map in the rest of the pages if required */ 445612f080e7Smrj if (window->wd_remap_copybuf) { 445712f080e7Smrj window->wd_remap_copybuf = B_FALSE; 445812f080e7Smrj 445912f080e7Smrj /* figure out many pages this window takes up */ 446012f080e7Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 446112f080e7Smrj MMU_PAGEOFFSET; 446212f080e7Smrj pcnt = mmu_btopr(window->wd_size + poff); 446312f080e7Smrj ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 446412f080e7Smrj 446512f080e7Smrj /* map pages which require it */ 446612f080e7Smrj for (i = 1; i < pcnt; i++) { 446712f080e7Smrj pmap = &dma->dp_pgmap[pidx]; 446812f080e7Smrj if (pmap->pm_uses_copybuf) { 446912f080e7Smrj ASSERT(pmap->pm_mapped == B_FALSE); 447012f080e7Smrj if (pmap->pm_pp != NULL) { 447112f080e7Smrj pmap->pm_mapped = B_TRUE; 447212f080e7Smrj i86_pp_map(pmap->pm_pp, 447312f080e7Smrj pmap->pm_kaddr); 447412f080e7Smrj } else if (pmap->pm_vaddr != NULL) { 447512f080e7Smrj pmap->pm_mapped = B_TRUE; 447612f080e7Smrj i86_va_map(pmap->pm_vaddr, 447712f080e7Smrj sinfo->si_asp, 447812f080e7Smrj pmap->pm_kaddr); 447912f080e7Smrj } 448012f080e7Smrj } 448112f080e7Smrj pidx++; 448212f080e7Smrj } 448312f080e7Smrj } 448412f080e7Smrj } 448512f080e7Smrj #endif 448612f080e7Smrj 448712f080e7Smrj /* if the new window uses the copy buffer, sync it for the device */ 448812f080e7Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 448994f1124eSVikram Hegde (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 449012f080e7Smrj DDI_DMA_SYNC_FORDEV); 449112f080e7Smrj } 449212f080e7Smrj 449312f080e7Smrj return (DDI_SUCCESS); 449412f080e7Smrj } 449512f080e7Smrj 449620906b23SVikram Hegde /* 449720906b23SVikram Hegde * rootnex_dma_win() 449820906b23SVikram Hegde * called from ddi_dma_getwin() 449920906b23SVikram Hegde */ 450020906b23SVikram Hegde /*ARGSUSED*/ 450120906b23SVikram Hegde static int 450220906b23SVikram Hegde rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 450320906b23SVikram Hegde uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 450420906b23SVikram Hegde uint_t *ccountp) 450520906b23SVikram Hegde { 4506*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 4507b51bbbf5SVikram Hegde if (IOMMU_USED(rdip)) { 450820906b23SVikram Hegde return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp, 450920906b23SVikram Hegde cookiep, ccountp)); 451020906b23SVikram Hegde } 451120906b23SVikram Hegde #endif 451212f080e7Smrj 451320906b23SVikram Hegde return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp, 451420906b23SVikram Hegde cookiep, ccountp)); 451520906b23SVikram Hegde } 451612f080e7Smrj 451712f080e7Smrj /* 451812f080e7Smrj * ************************ 451912f080e7Smrj * obsoleted dma routines 452012f080e7Smrj * ************************ 452112f080e7Smrj */ 452212f080e7Smrj 4523b51bbbf5SVikram Hegde /* 4524b51bbbf5SVikram Hegde * rootnex_dma_map() 4525b51bbbf5SVikram Hegde * called from ddi_dma_setup() 4526b51bbbf5SVikram Hegde * NO IOMMU in 32 bit mode. The below routines doesn't work in 64 bit mode. 4527b51bbbf5SVikram Hegde */ 452812f080e7Smrj /* ARGSUSED */ 452912f080e7Smrj static int 4530b51bbbf5SVikram Hegde rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 453120906b23SVikram Hegde struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep) 453212f080e7Smrj { 453312f080e7Smrj #if defined(__amd64) 453412f080e7Smrj /* 453512f080e7Smrj * this interface is not supported in 64-bit x86 kernel. See comment in 453612f080e7Smrj * rootnex_dma_mctl() 453712f080e7Smrj */ 453812f080e7Smrj return (DDI_DMA_NORESOURCES); 453912f080e7Smrj 454012f080e7Smrj #else /* 32-bit x86 kernel */ 454112f080e7Smrj ddi_dma_handle_t *lhandlep; 454212f080e7Smrj ddi_dma_handle_t lhandle; 454312f080e7Smrj ddi_dma_cookie_t cookie; 454412f080e7Smrj ddi_dma_attr_t dma_attr; 454512f080e7Smrj ddi_dma_lim_t *dma_lim; 454612f080e7Smrj uint_t ccnt; 454712f080e7Smrj int e; 454812f080e7Smrj 454912f080e7Smrj 455012f080e7Smrj /* 455112f080e7Smrj * if the driver is just testing to see if it's possible to do the bind, 455212f080e7Smrj * we'll use local state. Otherwise, use the handle pointer passed in. 455312f080e7Smrj */ 455412f080e7Smrj if (handlep == NULL) { 455512f080e7Smrj lhandlep = &lhandle; 455612f080e7Smrj } else { 455712f080e7Smrj lhandlep = handlep; 455812f080e7Smrj } 455912f080e7Smrj 456012f080e7Smrj /* convert the limit structure to a dma_attr one */ 456112f080e7Smrj dma_lim = dmareq->dmar_limits; 456212f080e7Smrj dma_attr.dma_attr_version = DMA_ATTR_V0; 456312f080e7Smrj dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 456412f080e7Smrj dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 456512f080e7Smrj dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 456612f080e7Smrj dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 456712f080e7Smrj dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 456812f080e7Smrj dma_attr.dma_attr_granular = dma_lim->dlim_granular; 456912f080e7Smrj dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 457012f080e7Smrj dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 457112f080e7Smrj dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 457212f080e7Smrj dma_attr.dma_attr_align = MMU_PAGESIZE; 457312f080e7Smrj dma_attr.dma_attr_flags = 0; 457412f080e7Smrj 457512f080e7Smrj e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 457612f080e7Smrj dmareq->dmar_arg, lhandlep); 457712f080e7Smrj if (e != DDI_SUCCESS) { 457812f080e7Smrj return (e); 457912f080e7Smrj } 458012f080e7Smrj 458112f080e7Smrj e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 458212f080e7Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 458312f080e7Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 458412f080e7Smrj return (e); 458512f080e7Smrj } 458612f080e7Smrj 458712f080e7Smrj /* 458812f080e7Smrj * if the driver is just testing to see if it's possible to do the bind, 458912f080e7Smrj * free up the local state and return the result. 459012f080e7Smrj */ 459112f080e7Smrj if (handlep == NULL) { 459212f080e7Smrj (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 459312f080e7Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 459412f080e7Smrj if (e == DDI_DMA_MAPPED) { 459512f080e7Smrj return (DDI_DMA_MAPOK); 459612f080e7Smrj } else { 459712f080e7Smrj return (DDI_DMA_NOMAPPING); 459812f080e7Smrj } 459912f080e7Smrj } 460012f080e7Smrj 460112f080e7Smrj return (e); 460212f080e7Smrj #endif /* defined(__amd64) */ 460312f080e7Smrj } 460412f080e7Smrj 460520906b23SVikram Hegde /* 460612f080e7Smrj * rootnex_dma_mctl() 460712f080e7Smrj * 4608b51bbbf5SVikram Hegde * No IOMMU in 32 bit mode. The below routine doesn't work in 64 bit mode. 460912f080e7Smrj */ 461012f080e7Smrj /* ARGSUSED */ 461112f080e7Smrj static int 4612b51bbbf5SVikram Hegde rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 461312f080e7Smrj enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 461412f080e7Smrj uint_t cache_flags) 461512f080e7Smrj { 461612f080e7Smrj #if defined(__amd64) 461712f080e7Smrj /* 461812f080e7Smrj * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 461912f080e7Smrj * common implementation in genunix, so they no longer have x86 462012f080e7Smrj * specific functionality which called into dma_ctl. 462112f080e7Smrj * 462212f080e7Smrj * The rest of the obsoleted interfaces were never supported in the 462312f080e7Smrj * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 462412f080e7Smrj * was not ported to the x86 64-bit kernel do to serious x86 rootnex 462512f080e7Smrj * implementation issues. 462612f080e7Smrj * 462712f080e7Smrj * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 462812f080e7Smrj * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 462912f080e7Smrj * reflect that now too... 463012f080e7Smrj * 463112f080e7Smrj * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 463212f080e7Smrj * not going to put this functionality into the 64-bit x86 kernel now. 463312f080e7Smrj * It wasn't ported to the 64-bit kernel for s10, no reason to change 463412f080e7Smrj * that in a future release. 463512f080e7Smrj */ 463612f080e7Smrj return (DDI_FAILURE); 463712f080e7Smrj 463812f080e7Smrj #else /* 32-bit x86 kernel */ 463912f080e7Smrj ddi_dma_cookie_t lcookie; 464012f080e7Smrj ddi_dma_cookie_t *cookie; 464112f080e7Smrj rootnex_window_t *window; 464212f080e7Smrj ddi_dma_impl_t *hp; 464312f080e7Smrj rootnex_dma_t *dma; 464412f080e7Smrj uint_t nwin; 464512f080e7Smrj uint_t ccnt; 464612f080e7Smrj size_t len; 464712f080e7Smrj off_t off; 464812f080e7Smrj int e; 464912f080e7Smrj 465012f080e7Smrj 465112f080e7Smrj /* 465212f080e7Smrj * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 465312f080e7Smrj * hacky since were optimizing for the current interfaces and so we can 465412f080e7Smrj * cleanup the mess in genunix. Hopefully we will remove the this 465512f080e7Smrj * obsoleted routines someday soon. 465612f080e7Smrj */ 465712f080e7Smrj 465812f080e7Smrj switch (request) { 465912f080e7Smrj 466012f080e7Smrj case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 466112f080e7Smrj hp = (ddi_dma_impl_t *)handle; 466212f080e7Smrj cookie = (ddi_dma_cookie_t *)objpp; 466312f080e7Smrj 466412f080e7Smrj /* 466512f080e7Smrj * convert segment to cookie. We don't distinguish between the 466612f080e7Smrj * two :-) 466712f080e7Smrj */ 466812f080e7Smrj *cookie = *hp->dmai_cookie; 466912f080e7Smrj *lenp = cookie->dmac_size; 467012f080e7Smrj *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 467112f080e7Smrj return (DDI_SUCCESS); 467212f080e7Smrj 467312f080e7Smrj case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 467412f080e7Smrj hp = (ddi_dma_impl_t *)handle; 467512f080e7Smrj dma = (rootnex_dma_t *)hp->dmai_private; 467612f080e7Smrj 467712f080e7Smrj if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 467812f080e7Smrj return (DDI_DMA_STALE); 467912f080e7Smrj } 468012f080e7Smrj 468112f080e7Smrj /* handle the case where we don't have any windows */ 468212f080e7Smrj if (dma->dp_window == NULL) { 468312f080e7Smrj /* 468412f080e7Smrj * if seg == NULL, and we don't have any windows, 468512f080e7Smrj * return the first cookie in the sgl. 468612f080e7Smrj */ 468712f080e7Smrj if (*lenp == NULL) { 468812f080e7Smrj dma->dp_current_cookie = 0; 468912f080e7Smrj hp->dmai_cookie = dma->dp_cookies; 469012f080e7Smrj *objpp = (caddr_t)handle; 469112f080e7Smrj return (DDI_SUCCESS); 469212f080e7Smrj 469312f080e7Smrj /* if we have more cookies, go to the next cookie */ 469412f080e7Smrj } else { 469512f080e7Smrj if ((dma->dp_current_cookie + 1) >= 469612f080e7Smrj dma->dp_sglinfo.si_sgl_size) { 469712f080e7Smrj return (DDI_DMA_DONE); 469812f080e7Smrj } 469912f080e7Smrj dma->dp_current_cookie++; 470012f080e7Smrj hp->dmai_cookie++; 470112f080e7Smrj return (DDI_SUCCESS); 470212f080e7Smrj } 470312f080e7Smrj } 470412f080e7Smrj 470512f080e7Smrj /* We have one or more windows */ 470612f080e7Smrj window = &dma->dp_window[dma->dp_current_win]; 470712f080e7Smrj 470812f080e7Smrj /* 470912f080e7Smrj * if seg == NULL, return the first cookie in the current 471012f080e7Smrj * window 471112f080e7Smrj */ 471212f080e7Smrj if (*lenp == NULL) { 471312f080e7Smrj dma->dp_current_cookie = 0; 4714cf4e9a1dSmrj hp->dmai_cookie = window->wd_first_cookie; 471512f080e7Smrj 471612f080e7Smrj /* 471712f080e7Smrj * go to the next cookie in the window then see if we done with 471812f080e7Smrj * this window. 471912f080e7Smrj */ 472012f080e7Smrj } else { 472112f080e7Smrj if ((dma->dp_current_cookie + 1) >= 472212f080e7Smrj window->wd_cookie_cnt) { 472312f080e7Smrj return (DDI_DMA_DONE); 472412f080e7Smrj } 472512f080e7Smrj dma->dp_current_cookie++; 472612f080e7Smrj hp->dmai_cookie++; 472712f080e7Smrj } 472812f080e7Smrj *objpp = (caddr_t)handle; 472912f080e7Smrj return (DDI_SUCCESS); 473012f080e7Smrj 473112f080e7Smrj case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 473212f080e7Smrj hp = (ddi_dma_impl_t *)handle; 473312f080e7Smrj dma = (rootnex_dma_t *)hp->dmai_private; 473412f080e7Smrj 473512f080e7Smrj if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 473612f080e7Smrj return (DDI_DMA_STALE); 473712f080e7Smrj } 473812f080e7Smrj 473912f080e7Smrj /* if win == NULL, return the first window in the bind */ 474012f080e7Smrj if (*offp == NULL) { 474112f080e7Smrj nwin = 0; 474212f080e7Smrj 474312f080e7Smrj /* 474412f080e7Smrj * else, go to the next window then see if we're done with all 474512f080e7Smrj * the windows. 474612f080e7Smrj */ 474712f080e7Smrj } else { 474812f080e7Smrj nwin = dma->dp_current_win + 1; 474912f080e7Smrj if (nwin >= hp->dmai_nwin) { 475012f080e7Smrj return (DDI_DMA_DONE); 475112f080e7Smrj } 475212f080e7Smrj } 475312f080e7Smrj 475412f080e7Smrj /* switch to the next window */ 475512f080e7Smrj e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 475612f080e7Smrj &lcookie, &ccnt); 475712f080e7Smrj ASSERT(e == DDI_SUCCESS); 475812f080e7Smrj if (e != DDI_SUCCESS) { 475912f080e7Smrj return (DDI_DMA_STALE); 476012f080e7Smrj } 476112f080e7Smrj 476212f080e7Smrj /* reset the cookie back to the first cookie in the window */ 476312f080e7Smrj if (dma->dp_window != NULL) { 476412f080e7Smrj window = &dma->dp_window[dma->dp_current_win]; 476512f080e7Smrj hp->dmai_cookie = window->wd_first_cookie; 476612f080e7Smrj } else { 476712f080e7Smrj hp->dmai_cookie = dma->dp_cookies; 476812f080e7Smrj } 476912f080e7Smrj 477012f080e7Smrj *objpp = (caddr_t)handle; 477112f080e7Smrj return (DDI_SUCCESS); 477212f080e7Smrj 477312f080e7Smrj case DDI_DMA_FREE: /* ddi_dma_free() */ 477412f080e7Smrj (void) rootnex_dma_unbindhdl(dip, rdip, handle); 477512f080e7Smrj (void) rootnex_dma_freehdl(dip, rdip, handle); 477612f080e7Smrj if (rootnex_state->r_dvma_call_list_id) { 477712f080e7Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 477812f080e7Smrj } 477912f080e7Smrj return (DDI_SUCCESS); 478012f080e7Smrj 478112f080e7Smrj case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 478212f080e7Smrj case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 478312f080e7Smrj /* should never get here, handled in genunix */ 478412f080e7Smrj ASSERT(0); 478512f080e7Smrj return (DDI_FAILURE); 478612f080e7Smrj 478712f080e7Smrj case DDI_DMA_KVADDR: 478812f080e7Smrj case DDI_DMA_GETERR: 478912f080e7Smrj case DDI_DMA_COFF: 479012f080e7Smrj return (DDI_FAILURE); 479112f080e7Smrj } 479212f080e7Smrj 479312f080e7Smrj return (DDI_FAILURE); 479412f080e7Smrj #endif /* defined(__amd64) */ 47957c478bd9Sstevel@tonic-gate } 47967aec1d6eScindi 479720906b23SVikram Hegde /* 479800d0963fSdilpreet * ********* 479900d0963fSdilpreet * FMA Code 480000d0963fSdilpreet * ********* 480100d0963fSdilpreet */ 480200d0963fSdilpreet 480300d0963fSdilpreet /* 480400d0963fSdilpreet * rootnex_fm_init() 480500d0963fSdilpreet * FMA init busop 480600d0963fSdilpreet */ 48077aec1d6eScindi /* ARGSUSED */ 48087aec1d6eScindi static int 480900d0963fSdilpreet rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 481000d0963fSdilpreet ddi_iblock_cookie_t *ibc) 48117aec1d6eScindi { 481200d0963fSdilpreet *ibc = rootnex_state->r_err_ibc; 481300d0963fSdilpreet 481400d0963fSdilpreet return (ddi_system_fmcap); 481500d0963fSdilpreet } 481600d0963fSdilpreet 481700d0963fSdilpreet /* 481800d0963fSdilpreet * rootnex_dma_check() 481900d0963fSdilpreet * Function called after a dma fault occurred to find out whether the 482000d0963fSdilpreet * fault address is associated with a driver that is able to handle faults 482100d0963fSdilpreet * and recover from faults. 482200d0963fSdilpreet */ 482300d0963fSdilpreet /* ARGSUSED */ 482400d0963fSdilpreet static int 482500d0963fSdilpreet rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, 482600d0963fSdilpreet const void *not_used) 482700d0963fSdilpreet { 482800d0963fSdilpreet rootnex_window_t *window; 482900d0963fSdilpreet uint64_t start_addr; 483000d0963fSdilpreet uint64_t fault_addr; 483100d0963fSdilpreet ddi_dma_impl_t *hp; 483200d0963fSdilpreet rootnex_dma_t *dma; 483300d0963fSdilpreet uint64_t end_addr; 483400d0963fSdilpreet size_t csize; 483500d0963fSdilpreet int i; 483600d0963fSdilpreet int j; 483700d0963fSdilpreet 483800d0963fSdilpreet 483900d0963fSdilpreet /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */ 484000d0963fSdilpreet hp = (ddi_dma_impl_t *)handle; 484100d0963fSdilpreet ASSERT(hp); 484200d0963fSdilpreet 484300d0963fSdilpreet dma = (rootnex_dma_t *)hp->dmai_private; 484400d0963fSdilpreet 484500d0963fSdilpreet /* Get the address that we need to search for */ 484600d0963fSdilpreet fault_addr = *(uint64_t *)addr; 484700d0963fSdilpreet 484800d0963fSdilpreet /* 484900d0963fSdilpreet * if we don't have any windows, we can just walk through all the 485000d0963fSdilpreet * cookies. 485100d0963fSdilpreet */ 485200d0963fSdilpreet if (dma->dp_window == NULL) { 485300d0963fSdilpreet /* for each cookie */ 485400d0963fSdilpreet for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) { 485500d0963fSdilpreet /* 485600d0963fSdilpreet * if the faulted address is within the physical address 485700d0963fSdilpreet * range of the cookie, return DDI_FM_NONFATAL. 485800d0963fSdilpreet */ 485900d0963fSdilpreet if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) && 486000d0963fSdilpreet (fault_addr <= (dma->dp_cookies[i].dmac_laddress + 486100d0963fSdilpreet dma->dp_cookies[i].dmac_size))) { 486200d0963fSdilpreet return (DDI_FM_NONFATAL); 486300d0963fSdilpreet } 486400d0963fSdilpreet } 486500d0963fSdilpreet 486600d0963fSdilpreet /* fault_addr not within this DMA handle */ 486700d0963fSdilpreet return (DDI_FM_UNKNOWN); 486800d0963fSdilpreet } 486900d0963fSdilpreet 487000d0963fSdilpreet /* we have mutiple windows, walk through each window */ 487100d0963fSdilpreet for (i = 0; i < hp->dmai_nwin; i++) { 487200d0963fSdilpreet window = &dma->dp_window[i]; 487300d0963fSdilpreet 487400d0963fSdilpreet /* Go through all the cookies in the window */ 487500d0963fSdilpreet for (j = 0; j < window->wd_cookie_cnt; j++) { 487600d0963fSdilpreet 487700d0963fSdilpreet start_addr = window->wd_first_cookie[j].dmac_laddress; 487800d0963fSdilpreet csize = window->wd_first_cookie[j].dmac_size; 487900d0963fSdilpreet 488000d0963fSdilpreet /* 488100d0963fSdilpreet * if we are trimming the first cookie in the window, 488200d0963fSdilpreet * and this is the first cookie, adjust the start 488300d0963fSdilpreet * address and size of the cookie to account for the 488400d0963fSdilpreet * trim. 488500d0963fSdilpreet */ 488600d0963fSdilpreet if (window->wd_trim.tr_trim_first && (j == 0)) { 488700d0963fSdilpreet start_addr = window->wd_trim.tr_first_paddr; 488800d0963fSdilpreet csize = window->wd_trim.tr_first_size; 488900d0963fSdilpreet } 489000d0963fSdilpreet 489100d0963fSdilpreet /* 489200d0963fSdilpreet * if we are trimming the last cookie in the window, 489300d0963fSdilpreet * and this is the last cookie, adjust the start 489400d0963fSdilpreet * address and size of the cookie to account for the 489500d0963fSdilpreet * trim. 489600d0963fSdilpreet */ 489700d0963fSdilpreet if (window->wd_trim.tr_trim_last && 489800d0963fSdilpreet (j == (window->wd_cookie_cnt - 1))) { 489900d0963fSdilpreet start_addr = window->wd_trim.tr_last_paddr; 490000d0963fSdilpreet csize = window->wd_trim.tr_last_size; 490100d0963fSdilpreet } 490200d0963fSdilpreet 490300d0963fSdilpreet end_addr = start_addr + csize; 490400d0963fSdilpreet 490500d0963fSdilpreet /* 4906*3a634bfcSVikram Hegde * if the faulted address is within the physical 4907*3a634bfcSVikram Hegde * address of the cookie, return DDI_FM_NONFATAL. 490800d0963fSdilpreet */ 490900d0963fSdilpreet if ((fault_addr >= start_addr) && 491000d0963fSdilpreet (fault_addr <= end_addr)) { 491100d0963fSdilpreet return (DDI_FM_NONFATAL); 491200d0963fSdilpreet } 491300d0963fSdilpreet } 491400d0963fSdilpreet } 491500d0963fSdilpreet 491600d0963fSdilpreet /* fault_addr not within this DMA handle */ 491700d0963fSdilpreet return (DDI_FM_UNKNOWN); 49187aec1d6eScindi } 4919*3a634bfcSVikram Hegde 4920*3a634bfcSVikram Hegde /*ARGSUSED*/ 4921*3a634bfcSVikram Hegde static int 4922*3a634bfcSVikram Hegde rootnex_quiesce(dev_info_t *dip) 4923*3a634bfcSVikram Hegde { 4924*3a634bfcSVikram Hegde #if defined(__amd64) && !defined(__xpv) 4925*3a634bfcSVikram Hegde return (immu_quiesce()); 4926*3a634bfcSVikram Hegde #else 4927*3a634bfcSVikram Hegde return (DDI_SUCCESS); 4928*3a634bfcSVikram Hegde #endif 4929*3a634bfcSVikram Hegde } 4930*3a634bfcSVikram Hegde 4931*3a634bfcSVikram Hegde #if defined(__xpv) 4932*3a634bfcSVikram Hegde void 4933*3a634bfcSVikram Hegde immu_init(void) 4934*3a634bfcSVikram Hegde { 4935*3a634bfcSVikram Hegde ; 4936*3a634bfcSVikram Hegde } 4937*3a634bfcSVikram Hegde 4938*3a634bfcSVikram Hegde void 4939*3a634bfcSVikram Hegde immu_startup(void) 4940*3a634bfcSVikram Hegde { 4941*3a634bfcSVikram Hegde ; 4942*3a634bfcSVikram Hegde } 4943*3a634bfcSVikram Hegde /*ARGSUSED*/ 4944*3a634bfcSVikram Hegde void 4945*3a634bfcSVikram Hegde immu_physmem_update(uint64_t addr, uint64_t size) 4946*3a634bfcSVikram Hegde { 4947*3a634bfcSVikram Hegde ; 4948*3a634bfcSVikram Hegde } 4949*3a634bfcSVikram Hegde #endif 4950