xref: /titanic_53/usr/src/lib/libipmi/common/libipmi.h (revision 283bfb4d4abcf7382b46f32663005b883ee2e3e0)
19113a79cSeschrock /*
29113a79cSeschrock  * CDDL HEADER START
39113a79cSeschrock  *
49113a79cSeschrock  * The contents of this file are subject to the terms of the
59113a79cSeschrock  * Common Development and Distribution License (the "License").
69113a79cSeschrock  * You may not use this file except in compliance with the License.
79113a79cSeschrock  *
89113a79cSeschrock  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
99113a79cSeschrock  * or http://www.opensolaris.org/os/licensing.
109113a79cSeschrock  * See the License for the specific language governing permissions
119113a79cSeschrock  * and limitations under the License.
129113a79cSeschrock  *
139113a79cSeschrock  * When distributing Covered Code, include this CDDL HEADER in each
149113a79cSeschrock  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
159113a79cSeschrock  * If applicable, add the following below this CDDL HEADER, with the
169113a79cSeschrock  * fields enclosed by brackets "[]" replaced with your own identifying
179113a79cSeschrock  * information: Portions Copyright [yyyy] [name of copyright owner]
189113a79cSeschrock  *
199113a79cSeschrock  * CDDL HEADER END
209113a79cSeschrock  */
219113a79cSeschrock /*
222eeaed14Srobj  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
239113a79cSeschrock  * Use is subject to license terms.
249113a79cSeschrock  */
259113a79cSeschrock 
269113a79cSeschrock #ifndef	_LIBIPMI_H
279113a79cSeschrock #define	_LIBIPMI_H
289113a79cSeschrock 
299113a79cSeschrock #include <sys/bmc_intf.h>
309113a79cSeschrock #include <sys/byteorder.h>
312c32020fSeschrock #include <sys/sysmacros.h>
329113a79cSeschrock 
339113a79cSeschrock /*
349113a79cSeschrock  * Private interfaces for communicating with attached services over IPMI.  This
359113a79cSeschrock  * library is designed for system software communicating with Sun-supported
369113a79cSeschrock  * service processors over /dev/bmc.  It is not a generic IPMI library.
379113a79cSeschrock  *
389113a79cSeschrock  * Documentation references refer to "Intelligent Platform Management Interface
399113a79cSeschrock  * Specification Second Generation v2.0", document revision 1.0 with Februrary
409113a79cSeschrock  * 15, 2006 Markup from "IPMI v2.0 Addenda, Errata, and Clarifications Revision
419113a79cSeschrock  * 3".
429113a79cSeschrock  */
439113a79cSeschrock 
449113a79cSeschrock #ifdef	__cplusplus
459113a79cSeschrock extern "C" {
469113a79cSeschrock #endif
479113a79cSeschrock 
489113a79cSeschrock typedef struct ipmi_handle ipmi_handle_t;
499113a79cSeschrock 
509113a79cSeschrock #pragma pack(1)
519113a79cSeschrock 
529113a79cSeschrock /*
539113a79cSeschrock  * Basic netfn definitions.  See section 5.1.
549113a79cSeschrock  */
559113a79cSeschrock #define	IPMI_NETFN_APP			BMC_NETFN_APP
569113a79cSeschrock #define	IPMI_NETFN_STORAGE		BMC_NETFN_STORAGE
579113a79cSeschrock #define	IPMI_NETFN_SE			BMC_NETFN_SE
58*283bfb4dSEric Schrock #define	IPMI_NETFN_TRANSPORT		0x0C
599113a79cSeschrock #define	IPMI_NETFN_OEM			0x2e
609113a79cSeschrock 
619113a79cSeschrock /*
629113a79cSeschrock  * Error definitions
639113a79cSeschrock  */
649113a79cSeschrock #define	EIPMI_BASE	2000
659113a79cSeschrock 
662eeaed14Srobj typedef enum {
679113a79cSeschrock 	EIPMI_NOMEM = EIPMI_BASE,	/* memory allocation failure */
689113a79cSeschrock 	EIPMI_BMC_OPEN_FAILED,		/* failed to open /dev/bmc */
692eeaed14Srobj 	EIPMI_BMC_PUTMSG,		/* failed to send message to /dev/bmc */
702eeaed14Srobj 	EIPMI_BMC_GETMSG,	/* failed to read response from /dev/bmc */
719113a79cSeschrock 	EIPMI_BMC_RESPONSE,		/* response from /dev/bmc failed */
729113a79cSeschrock 	EIPMI_INVALID_COMMAND,		/* invalid command */
739113a79cSeschrock 	EIPMI_COMMAND_TIMEOUT,		/* command timeout */
749113a79cSeschrock 	EIPMI_DATA_LENGTH_EXCEEDED,	/* maximum data length exceeded */
759113a79cSeschrock 	EIPMI_SEND_FAILED,		/* failed to send BMC request */
762eeaed14Srobj 	EIPMI_UNSPECIFIED,		/* unspecified BMC error */
779113a79cSeschrock 	EIPMI_UNKNOWN,			/* unknown error */
789113a79cSeschrock 	EIPMI_BAD_RESPONSE,		/* received unexpected response */
799113a79cSeschrock 	EIPMI_BAD_RESPONSE_LENGTH,	/* unexpected response length */
802eeaed14Srobj 	EIPMI_INVALID_RESERVATION,	/* invalid or cancelled reservation */
819113a79cSeschrock 	EIPMI_NOT_PRESENT,		/* requested entity not present */
822eeaed14Srobj 	EIPMI_INVALID_REQUEST,		/* malformed request data */
832eeaed14Srobj 	EIPMI_BUSY,			/* service processor is busy */
842eeaed14Srobj 	EIPMI_NOSPACE,			/* service processor is out of space */
852eeaed14Srobj 	EIPMI_UNAVAILABLE,		/* service processor is unavailable */
86*283bfb4dSEric Schrock 	EIPMI_ACCESS,			/* insufficient privileges */
87*283bfb4dSEric Schrock 	EIPMI_BADPARAM,			/* parameter is not supported */
88*283bfb4dSEric Schrock 	EIPMI_READONLY,			/* attempt to write read-only param */
89*283bfb4dSEric Schrock 	EIPMI_WRITEONLY			/* attempt to read write-only param */
902eeaed14Srobj } ipmi_errno_t;
919113a79cSeschrock 
929113a79cSeschrock /*
939113a79cSeschrock  * Basic library functions.
949113a79cSeschrock  *
959113a79cSeschrock  * The ipmi_handle is the primary interface to the library.  The library itself
969113a79cSeschrock  * is not MT-safe, but it is safe within a single handle.  Multithreaded clients
979113a79cSeschrock  * should either open multiple handles, or otherwise synchronize access to the
989113a79cSeschrock  * same handle.
999113a79cSeschrock  *
1009113a79cSeschrock  * There is a single command response buffer that is stored with the handle, to
1019113a79cSeschrock  * simplify memory management in the caller.  The memory referenced by a command
1029113a79cSeschrock  * response is only valid until the next command is issued.  The caller is
1039113a79cSeschrock  * responsible for making a copy of the response if it is needed.
1049113a79cSeschrock  */
1059113a79cSeschrock extern ipmi_handle_t *ipmi_open(int *, char **);
1069113a79cSeschrock extern void ipmi_close(ipmi_handle_t *);
1079113a79cSeschrock 
1089113a79cSeschrock extern int ipmi_errno(ipmi_handle_t *);
1099113a79cSeschrock extern const char *ipmi_errmsg(ipmi_handle_t *);
1109113a79cSeschrock 
1119113a79cSeschrock /*
1129113a79cSeschrock  * Raw requests.  See section 5.
1139113a79cSeschrock  */
1149113a79cSeschrock typedef struct ipmi_cmd {
1159113a79cSeschrock 	uint8_t		ic_netfn:6;
1169113a79cSeschrock 	uint8_t		ic_lun:2;
1179113a79cSeschrock 	uint8_t		ic_cmd;
1189113a79cSeschrock 	uint16_t	ic_dlen;
1199113a79cSeschrock 	void		*ic_data;
1209113a79cSeschrock } ipmi_cmd_t;
1219113a79cSeschrock 
1229113a79cSeschrock extern ipmi_cmd_t *ipmi_send(ipmi_handle_t *, ipmi_cmd_t *);
1239113a79cSeschrock 
1249113a79cSeschrock /*
1259113a79cSeschrock  * Retrieve basic information about the IPMI device.  See section 20.1 "Get
1269113a79cSeschrock  * Device ID Command".
1279113a79cSeschrock  */
1289113a79cSeschrock #define	IPMI_CMD_GET_DEVICEID		0x01
1299113a79cSeschrock 
1309113a79cSeschrock typedef struct ipmi_deviceid {
1319113a79cSeschrock 	uint8_t		id_devid;
1322c32020fSeschrock 	DECL_BITFIELD3(
1332c32020fSeschrock 	    id_dev_rev		:4,
1342c32020fSeschrock 	    __reserved		:3,
1352c32020fSeschrock 	    id_dev_sdrs		:1);
1362c32020fSeschrock 	DECL_BITFIELD2(
1372c32020fSeschrock 	    id_firm_major	:7,
1382c32020fSeschrock 	    id_dev_available	:1);
1399113a79cSeschrock 	uint8_t		id_firm_minor;
1409113a79cSeschrock 	uint8_t		id_ipmi_rev;
1419113a79cSeschrock 	uint8_t		id_dev_support;
1429113a79cSeschrock 	uint8_t		id_manufacturer[3];
1439113a79cSeschrock 	uint16_t	id_product;
1449113a79cSeschrock } ipmi_deviceid_t;
1459113a79cSeschrock 
1469113a79cSeschrock #define	IPMI_OEM_SUN		0x2a
1472eeaed14Srobj #define	IPMI_PROD_SUN_ILOM	0x4701
1489113a79cSeschrock 
1499113a79cSeschrock ipmi_deviceid_t *ipmi_get_deviceid(ipmi_handle_t *);
1509113a79cSeschrock 
1519113a79cSeschrock #define	ipmi_devid_manufacturer(dp)		\
1529113a79cSeschrock 	((dp)->id_manufacturer[0] |		\
1539113a79cSeschrock 	((dp)->id_manufacturer[1] << 8) |	\
1549113a79cSeschrock 	((dp)->id_manufacturer[2] << 16))
1559113a79cSeschrock 
1562eeaed14Srobj const char *ipmi_firmware_version(ipmi_handle_t *);
1572eeaed14Srobj 
1582eeaed14Srobj /*
159*283bfb4dSEric Schrock  * Get Channel Info.  See section 22.24.
160*283bfb4dSEric Schrock  */
161*283bfb4dSEric Schrock typedef struct ipmi_channel_info {
162*283bfb4dSEric Schrock 	DECL_BITFIELD2(
163*283bfb4dSEric Schrock 	    ici_number		:4,
164*283bfb4dSEric Schrock 	    __reserved1		:4);
165*283bfb4dSEric Schrock 	DECL_BITFIELD2(
166*283bfb4dSEric Schrock 	    ici_medium		:7,
167*283bfb4dSEric Schrock 	    __reserved2		:1);
168*283bfb4dSEric Schrock 	DECL_BITFIELD2(
169*283bfb4dSEric Schrock 	    ici_protocol	:5,
170*283bfb4dSEric Schrock 	    __reserved3		:3);
171*283bfb4dSEric Schrock 	DECL_BITFIELD3(
172*283bfb4dSEric Schrock 	    ici_session_count	:6,
173*283bfb4dSEric Schrock 	    ici_single_session	:1,
174*283bfb4dSEric Schrock 	    ici_multi_Session	:1);
175*283bfb4dSEric Schrock 	uint8_t		ici_vendor[3];
176*283bfb4dSEric Schrock 	uint8_t		ici_auxinfo[2];
177*283bfb4dSEric Schrock } ipmi_channel_info_t;
178*283bfb4dSEric Schrock 
179*283bfb4dSEric Schrock #define	IPMI_CMD_GET_CHANNEL_INFO	0x42
180*283bfb4dSEric Schrock 
181*283bfb4dSEric Schrock /*
182*283bfb4dSEric Schrock  * Channel Numbers.  See section 6.3.
183*283bfb4dSEric Schrock  */
184*283bfb4dSEric Schrock #define	IPMI_CHANNEL_PRIMARY		0x0
185*283bfb4dSEric Schrock #define	IPMI_CHANNEL_MIN		0x1
186*283bfb4dSEric Schrock #define	IPMI_CHANNEL_MAX		0xB
187*283bfb4dSEric Schrock #define	IPMI_CHANNEL_CURRENT		0xE
188*283bfb4dSEric Schrock #define	IPMI_CHANNEL_SYSTEM		0xF
189*283bfb4dSEric Schrock 
190*283bfb4dSEric Schrock extern ipmi_channel_info_t *ipmi_get_channel_info(ipmi_handle_t *, int);
191*283bfb4dSEric Schrock 
192*283bfb4dSEric Schrock /*
193*283bfb4dSEric Schrock  * Channel Protocol Types.  See section 6.4.
194*283bfb4dSEric Schrock  */
195*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_IPMB		0x1
196*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_ICMB		0x2
197*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_SMBUS		0x4
198*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_KCS		0x5
199*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_SMIC		0x6
200*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_BT10		0x7
201*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_BT15		0x8
202*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_TMODE		0x9
203*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_OEM1		0xC
204*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_OEM2		0xD
205*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_OEM3		0xE
206*283bfb4dSEric Schrock #define	IPMI_PROTOCOL_OEM4		0xF
207*283bfb4dSEric Schrock 
208*283bfb4dSEric Schrock /*
209*283bfb4dSEric Schrock  * Channel Medium Types.  See section 6.5.
210*283bfb4dSEric Schrock  */
211*283bfb4dSEric Schrock #define	IPMI_MEDIUM_IPMB		0x1
212*283bfb4dSEric Schrock #define	IPMI_MEDIUM_ICMB10		0x2
213*283bfb4dSEric Schrock #define	IPMI_MEDIUM_ICMB09		0x3
214*283bfb4dSEric Schrock #define	IPMI_MEDIUM_8023LAN		0x4
215*283bfb4dSEric Schrock #define	IPMI_MEDIUM_RS232		0x5
216*283bfb4dSEric Schrock #define	IPMI_MEDIUM_OTHERLAN		0x6
217*283bfb4dSEric Schrock #define	IPMI_MEDIUM_PCISMBUS		0x7
218*283bfb4dSEric Schrock #define	IPMI_MEDIUM_SMBUS10		0x8
219*283bfb4dSEric Schrock #define	IPMI_MEDIUM_SMBUS20		0x9
220*283bfb4dSEric Schrock #define	IPMI_MEDIUM_USB1		0xA
221*283bfb4dSEric Schrock #define	IPMI_MEDIUM_USB2		0xB
222*283bfb4dSEric Schrock #define	IPMI_MEDIUM_SYSTEM		0xC
223*283bfb4dSEric Schrock 
224*283bfb4dSEric Schrock /*
225*283bfb4dSEric Schrock  * LAN Configuration.  See section 23.  While the underlying mechanism is
226*283bfb4dSEric Schrock  * implemented via a sequence of get/set parameter commands, we assume that
227*283bfb4dSEric Schrock  * consumers prefer to get and set information in chunks, and therefore expose
228*283bfb4dSEric Schrock  * the configuration as a structure, with some of the less useful fields
229*283bfb4dSEric Schrock  * removed.  When making changes, the consumer specifies which fields to apply
230*283bfb4dSEric Schrock  * along with the structure the library takes care of the rest of the work.
231*283bfb4dSEric Schrock  *
232*283bfb4dSEric Schrock  * This can be expanded in the future as needed.
233*283bfb4dSEric Schrock  */
234*283bfb4dSEric Schrock 
235*283bfb4dSEric Schrock typedef struct ipmi_lan_config {
236*283bfb4dSEric Schrock 	boolean_t	ilc_set_in_progress;
237*283bfb4dSEric Schrock 	uint32_t	ilc_ipaddr;
238*283bfb4dSEric Schrock 	uint8_t		ilc_ipaddr_source;
239*283bfb4dSEric Schrock 	uint8_t		ilc_macaddr[6];
240*283bfb4dSEric Schrock 	uint32_t	ilc_subnet;
241*283bfb4dSEric Schrock 	uint32_t	ilc_gateway_addr;
242*283bfb4dSEric Schrock } ipmi_lan_config_t;
243*283bfb4dSEric Schrock 
244*283bfb4dSEric Schrock #define	IPMI_LAN_SRC_UNSPECIFIED	0x0
245*283bfb4dSEric Schrock #define	IPMI_LAN_SRC_STATIC		0x1
246*283bfb4dSEric Schrock #define	IPMI_LAN_SRC_DHCP		0x2
247*283bfb4dSEric Schrock #define	IPMI_LAN_SRC_BIOS		0x3
248*283bfb4dSEric Schrock #define	IPMI_LAN_SRC_OTHER		0x4
249*283bfb4dSEric Schrock 
250*283bfb4dSEric Schrock #define	IPMI_LAN_SET_IPADDR		0x01
251*283bfb4dSEric Schrock #define	IPMI_LAN_SET_IPADDR_SOURCE	0x02
252*283bfb4dSEric Schrock #define	IPMI_LAN_SET_MACADDR		0x04
253*283bfb4dSEric Schrock #define	IPMI_LAN_SET_SUBNET		0x08
254*283bfb4dSEric Schrock #define	IPMI_LAN_SET_GATEWAY_ADDR	0x10
255*283bfb4dSEric Schrock 
256*283bfb4dSEric Schrock #define	IPMI_CMD_SET_LAN_CONFIG		0x01
257*283bfb4dSEric Schrock #define	IPMI_CMD_GET_LAN_CONFIG		0x02
258*283bfb4dSEric Schrock 
259*283bfb4dSEric Schrock extern int ipmi_lan_get_config(ipmi_handle_t *, int,
260*283bfb4dSEric Schrock     ipmi_lan_config_t *);
261*283bfb4dSEric Schrock extern int ipmi_lan_set_config(ipmi_handle_t *, int, ipmi_lan_config_t *, int);
262*283bfb4dSEric Schrock 
263*283bfb4dSEric Schrock /*
2642eeaed14Srobj  * SEL (System Event Log) commands.  Currently the library only provides
2652eeaed14Srobj  * commands for reading the SEL.
2662eeaed14Srobj  */
2672eeaed14Srobj 
2682eeaed14Srobj /*
2692eeaed14Srobj  * 31.2 Get SEL Info Command
2702eeaed14Srobj  */
2712eeaed14Srobj #define	IPMI_CMD_GET_SEL_INFO		0x40
2722eeaed14Srobj 
2732eeaed14Srobj typedef struct ipmi_sel_info {
2742eeaed14Srobj 	uint8_t		isel_version;
2752eeaed14Srobj 	uint16_t	isel_entries;
2762eeaed14Srobj 	uint16_t	isel_free;
2772eeaed14Srobj 	uint32_t	isel_add_ts;
2782eeaed14Srobj 	uint32_t	isel_erase_ts;
2792eeaed14Srobj 	DECL_BITFIELD6(
2802eeaed14Srobj 	    isel_supp_allocation	:1,
2812eeaed14Srobj 	    isel_supp_reserve		:1,
2822eeaed14Srobj 	    isel_supp_partial		:1,
2832eeaed14Srobj 	    isel_supp_delete		:1,
2842eeaed14Srobj 	    __reserved			:3,
2852eeaed14Srobj 	    isel_overflow		:1);
2862eeaed14Srobj } ipmi_sel_info_t;
2872eeaed14Srobj 
2882eeaed14Srobj extern ipmi_sel_info_t *ipmi_sel_get_info(ipmi_handle_t *);
2892eeaed14Srobj extern boolean_t ipmi_sdr_changed(ipmi_handle_t *);
2902eeaed14Srobj extern int ipmi_sdr_refresh(ipmi_handle_t *);
2912eeaed14Srobj 
2922eeaed14Srobj /*
2932eeaed14Srobj  * 32.1 SEL Event Records
2942eeaed14Srobj  */
2952eeaed14Srobj typedef struct ipmi_sel_event {
2962eeaed14Srobj 	uint16_t	isel_ev_next;
2972eeaed14Srobj 	uint16_t	isel_ev_recid;
2982eeaed14Srobj 	uint8_t		isel_ev_rectype;
2992eeaed14Srobj 	uint32_t	isel_ev_ts;
3002eeaed14Srobj 	DECL_BITFIELD2(
3012eeaed14Srobj 	    isel_ev_software	:1,
3022eeaed14Srobj 	    isel_ev_addr_or_id	:7);
3032eeaed14Srobj 	DECL_BITFIELD3(
3042eeaed14Srobj 	    isel_ev_lun		:2,
3052eeaed14Srobj 	    __reserved		:2,
3062eeaed14Srobj 	    isel_ev_channel	:4);
3072eeaed14Srobj 	uint8_t		isel_ev_rev;
3082eeaed14Srobj 	uint8_t		isel_ev_sensor_type;
3092eeaed14Srobj 	uint8_t		isel_ev_sensor_number;
3102eeaed14Srobj 	DECL_BITFIELD2(
3112eeaed14Srobj 	    isel_ev_type	:7,
3122eeaed14Srobj 	    isel_ev_dir		:1);
3132eeaed14Srobj 	uint8_t		isel_ev_data[3];
3142eeaed14Srobj } ipmi_sel_event_t;
3152eeaed14Srobj 
3162eeaed14Srobj #define	IPMI_EV_REV15		0x04
3172eeaed14Srobj #define	IPMI_EV_REV1		0x03
3182eeaed14Srobj 
3192eeaed14Srobj #define	IPMI_SEL_SYSTEM		0x02
3202eeaed14Srobj #define	IPMI_SEL_OEMTS_LO	0xC0
3212eeaed14Srobj #define	IPMI_SEL_OEMTS_HI	0xDF
3222eeaed14Srobj #define	IPMI_SEL_OEM_LO		0xE0
3232eeaed14Srobj #define	IPMI_SEL_OEM_HI		0xFF
3242eeaed14Srobj 
3252eeaed14Srobj #define	IPMI_EV_ASSERT		0x0
3262eeaed14Srobj #define	IPMI_EV_DEASSERT	0x1
3272eeaed14Srobj 
3282eeaed14Srobj /*
3292eeaed14Srobj  * 32.2 OEM SEL Record (with timestamp)
3302eeaed14Srobj  */
3312eeaed14Srobj typedef struct ipmi_sel_oem_ts {
3322eeaed14Srobj 	uint16_t	isel_oem_next;
3332eeaed14Srobj 	uint16_t	isel_oem_id;
3342eeaed14Srobj 	uint8_t		isel_oem_type;
3352eeaed14Srobj 	uint32_t	isel_oem_ts;
3362eeaed14Srobj 	uint8_t		isel_oem_devid[3];
3372eeaed14Srobj 	uint8_t		isel_oem_data[6];
3382eeaed14Srobj } ipmi_sel_oem_ts_t;
3392eeaed14Srobj 
3402eeaed14Srobj /*
3412eeaed14Srobj  * 32.3 OEM SEL Record (no timestamp)
3422eeaed14Srobj  */
3432eeaed14Srobj typedef struct ipmi_sel_oem {
3442eeaed14Srobj 	uint16_t	isel_oem_next;
3452eeaed14Srobj 	uint16_t	isel_oem_id;
3462eeaed14Srobj 	uint8_t		isel_oem_type;
3472eeaed14Srobj 	uint8_t		isel_oem_data[13];
3482eeaed14Srobj } ipmi_sel_oem_t;
3492eeaed14Srobj 
3502eeaed14Srobj /*
351*283bfb4dSEric Schrock  * 29.3 Platform Event Message Command.
352*283bfb4dSEric Schrock  */
353*283bfb4dSEric Schrock typedef struct ipmi_platform_event_message {
354*283bfb4dSEric Schrock 	uint8_t		ipem_generator;
355*283bfb4dSEric Schrock 	uint8_t		ipem_rev;
356*283bfb4dSEric Schrock 	uint8_t		ipem_sensor_type;
357*283bfb4dSEric Schrock 	uint8_t		ipem_sensor_num;
358*283bfb4dSEric Schrock 	DECL_BITFIELD2(
359*283bfb4dSEric Schrock 	    ipem_event_type	:7,
360*283bfb4dSEric Schrock 	    ipem_event_dir	:1);
361*283bfb4dSEric Schrock 	uint8_t		ipem_event_data[3];
362*283bfb4dSEric Schrock } ipmi_platform_event_message_t;
363*283bfb4dSEric Schrock 
364*283bfb4dSEric Schrock #define	IPMI_CMD_PLATFORM_EVENT_MESSAGE	0x02
365*283bfb4dSEric Schrock 
366*283bfb4dSEric Schrock extern int ipmi_event_platform_message(ipmi_handle_t *,
367*283bfb4dSEric Schrock     ipmi_platform_event_message_t *);
368*283bfb4dSEric Schrock 
369*283bfb4dSEric Schrock /*
3702eeaed14Srobj  * 29.7 Event Data Field Formats.  Consumers can cast the data field of the
3712eeaed14Srobj  * event record to the appropriate type depending on the sensor class.
3722eeaed14Srobj  */
3732eeaed14Srobj 
3742eeaed14Srobj typedef struct ipmi_event_threshold {
3752eeaed14Srobj 	DECL_BITFIELD3(
3762eeaed14Srobj 	    iev_offset		:4,
3772eeaed14Srobj 	    iev_desc_byte3	:2,
3782eeaed14Srobj 	    iev_desc_byte2	:2);
3792eeaed14Srobj 	uint8_t		iev_reading;
3802eeaed14Srobj 	uint8_t		iev_threshold;
3812eeaed14Srobj } ipmi_event_threshold_t;
3822eeaed14Srobj 
3832eeaed14Srobj #define	IPMI_EV_DESC_UNSPECIFIED	0x00
3842eeaed14Srobj #define	IPMI_EV_DESC_TRIGGER		0x01
3852eeaed14Srobj #define	IPMI_EV_DESC_OEM		0x02
3862eeaed14Srobj #define	IPMI_EV_DESC_SPECIFIC		0x03
3872eeaed14Srobj 
3882eeaed14Srobj typedef struct ipmi_event_discrete {
3892eeaed14Srobj 	DECL_BITFIELD3(
3902eeaed14Srobj 	    iev_offset		:4,
3912eeaed14Srobj 	    iev_desc_byte3	:2,
3922eeaed14Srobj 	    iev_desc_byte2	:2);
3932eeaed14Srobj 	DECL_BITFIELD2(
3942eeaed14Srobj 	    iev_offset_type	:4,
3952eeaed14Srobj 	    iev_offset_severity	:4);
3962eeaed14Srobj 	uint8_t		iev_oem_code;
3972eeaed14Srobj } ipmi_event_discrete_t;
3982eeaed14Srobj 
3992eeaed14Srobj #define	IPMI_EV_DESC_PREVSTATE		0x01
4002eeaed14Srobj #define	IPMI_EV_DESC_SPECIFIC		0x03
4012eeaed14Srobj 
4022eeaed14Srobj typedef struct ipmi_event_oem {
4032eeaed14Srobj 	DECL_BITFIELD3(
4042eeaed14Srobj 	    iev_offset		:4,
4052eeaed14Srobj 	    iev_desc_byte3	:2,
4062eeaed14Srobj 	    iev_desc_byte2	:2);
4072eeaed14Srobj 	DECL_BITFIELD2(
4082eeaed14Srobj 	    iev_offset_type	:4,
4092eeaed14Srobj 	    iev_offset_severity	:4);
4102eeaed14Srobj 	uint8_t		iev_oem_code;
4112eeaed14Srobj } ipmi_event_oem_t;
4122eeaed14Srobj 
4132eeaed14Srobj /*
4142eeaed14Srobj  * Get SEL Entry Command.  See section 31.5.  We don't support partial reads, so
4152eeaed14Srobj  * this interface is quite a bit simpler than in the spec.  We default to
4162eeaed14Srobj  * returning event records, though the consumer should check the type field and
4172eeaed14Srobj  * cast it to the appropriate type if it is no IPMI_SEL_SYSTEM.
4182eeaed14Srobj  */
4192eeaed14Srobj #define	IPMI_CMD_GET_SEL_ENTRY		0x43
4202eeaed14Srobj 
4212eeaed14Srobj extern ipmi_sel_event_t *ipmi_sel_get_entry(ipmi_handle_t *, uint16_t);
4222eeaed14Srobj 
4232eeaed14Srobj #define	IPMI_SEL_FIRST_ENTRY		0x0000
4242eeaed14Srobj #define	IPMI_SEL_LAST_ENTRY		0xFFFF
4252eeaed14Srobj 
4262eeaed14Srobj /*
4272eeaed14Srobj  * SEL time management.  See sections 31.10 and 31.11.
4282eeaed14Srobj  */
4292eeaed14Srobj #define	IPMI_CMD_GET_SEL_TIME		0x48
4302eeaed14Srobj #define	IPMI_CMD_SET_SEL_TIME		0x49
4312eeaed14Srobj #define	IPMI_CMD_GET_SEL_UTC_OFFSET	0x5C
4322eeaed14Srobj #define	IPMI_CMD_SET_SEL_UTC_OFFSET	0x5D
4332eeaed14Srobj 
4342eeaed14Srobj extern int ipmi_sel_get_time(ipmi_handle_t *, uint32_t *);
4352eeaed14Srobj extern int ipmi_sel_set_time(ipmi_handle_t *, uint32_t);
4362eeaed14Srobj extern int ipmi_sel_get_utc_offset(ipmi_handle_t *, int *);
4372eeaed14Srobj extern int ipmi_sel_set_utc_offset(ipmi_handle_t *, int);
4382eeaed14Srobj 
4399113a79cSeschrock /*
4409113a79cSeschrock  * SDR (Sensor Device Record) requests.  A cache of the current SDR repository
4412eeaed14Srobj  * is kept as part of the IPMI handle and updated when necessary.  This does the
4422eeaed14Srobj  * work of processing the SDR names and providing an easy way to lookup
4432eeaed14Srobj  * individual records and iterate over all records.
4449113a79cSeschrock  */
4459113a79cSeschrock 
4469113a79cSeschrock /*
4472eeaed14Srobj  * Get SDR Repository Info Command.  See section 33.9.
4482eeaed14Srobj  */
4492eeaed14Srobj #define	IPMI_CMD_GET_SDR_INFO		0x20
4502eeaed14Srobj 
4512eeaed14Srobj typedef struct ipmi_sdr_info {
4522eeaed14Srobj 	uint8_t		isi_version;
4532eeaed14Srobj 	uint16_t	isi_record_count;
4542eeaed14Srobj 	uint16_t	isi_free_space;
4552eeaed14Srobj 	uint32_t	isi_add_ts;
4562eeaed14Srobj 	uint32_t	isi_erase_ts;
4572eeaed14Srobj 	DECL_BITFIELD7(
4582eeaed14Srobj 	    isi_supp_allocation		:1,
4592eeaed14Srobj 	    isi_supp_reserve		:1,
4602eeaed14Srobj 	    isi_supp_partial		:1,
4612eeaed14Srobj 	    isi_supp_delete		:1,
4622eeaed14Srobj 	    __reserved			:1,
4632eeaed14Srobj 	    isi_modal			:2,
4642eeaed14Srobj 	    isi_overflow		:1);
4652eeaed14Srobj } ipmi_sdr_info_t;
4662eeaed14Srobj 
4672eeaed14Srobj extern ipmi_sdr_info_t *ipmi_sdr_get_info(ipmi_handle_t *);
4682eeaed14Srobj 
4692eeaed14Srobj /*
4709113a79cSeschrock  * Reserve repository command.  See section 33.11.
4719113a79cSeschrock  */
4729113a79cSeschrock #define	IPMI_CMD_RESERVE_SDR_REPOSITORY	0x22
4739113a79cSeschrock 
4749113a79cSeschrock /*
4759113a79cSeschrock  * Get SDR command.  See section 33.12.  This command accesses the raw SDR
4769113a79cSeschrock  * repository.  Clients can also use the lookup functions to retrieve a
4779113a79cSeschrock  * particular SDR record by name.
4789113a79cSeschrock  *
4799113a79cSeschrock  * The list of possible types is indicated in the sub-chapters of section 43.
4809113a79cSeschrock  */
4819113a79cSeschrock typedef struct ipmi_sdr {
4829113a79cSeschrock 	uint16_t	is_id;
4839113a79cSeschrock 	uint8_t		is_version;
4849113a79cSeschrock 	uint8_t		is_type;
4859113a79cSeschrock 	uint8_t		is_length;
4869113a79cSeschrock 	uint8_t		is_record[1];
4879113a79cSeschrock } ipmi_sdr_t;
4889113a79cSeschrock #define	IPMI_CMD_GET_SDR		0x23
4899113a79cSeschrock 
4909113a79cSeschrock #define	IPMI_SDR_FIRST			0x0000
4919113a79cSeschrock #define	IPMI_SDR_LAST			0xFFFF
4929113a79cSeschrock 
4939113a79cSeschrock extern ipmi_sdr_t *ipmi_sdr_get(ipmi_handle_t *, uint16_t, uint16_t *);
4949113a79cSeschrock 
4959113a79cSeschrock /*
4962eeaed14Srobj  * Full Sensor Record.  See 43.1
4972eeaed14Srobj  */
4982eeaed14Srobj #define	IPMI_SDR_TYPE_FULL_SENSOR		0x01
4992eeaed14Srobj 
5002eeaed14Srobj typedef struct ipmi_sdr_full_sensor {
5012eeaed14Srobj 	/* RECORD KEY BYTES */
5022eeaed14Srobj 	uint8_t		is_fs_owner;
5032eeaed14Srobj 	DECL_BITFIELD3(
5042eeaed14Srobj 	    is_fs_sensor_lun			:2,
5052eeaed14Srobj 	    __reserved1				:2,
5062eeaed14Srobj 	    is_fs_channel			:4);
5072eeaed14Srobj 	uint8_t		is_fs_number;
5082eeaed14Srobj 	/* RECORD BODY BYTES */
5092eeaed14Srobj 	uint8_t		is_fs_entity_id;
5102eeaed14Srobj 	DECL_BITFIELD2(
5112eeaed14Srobj 	    is_fs_entity_instance		:7,
5122eeaed14Srobj 	    is_fs_entity_logical		:1);
5132eeaed14Srobj 	DECL_BITFIELD8(
5142eeaed14Srobj 	    is_fs_sensor_scanning_enabled	:1,
5152eeaed14Srobj 	    is_fs_event_generation_enabled	:1,
5162eeaed14Srobj 	    is_fs_init_sensor_type		:1,
5172eeaed14Srobj 	    is_fs_init_hysteresis		:1,
5182eeaed14Srobj 	    is_fs_init_thresholds		:1,
5192eeaed14Srobj 	    is_fs_init_events			:1,
5202eeaed14Srobj 	    is_fs_init_scanning			:1,
5212eeaed14Srobj 	    is_fs_settable			:1);
5222eeaed14Srobj 	DECL_BITFIELD5(
5232eeaed14Srobj 	    is_fs_event_support			:2,
5242eeaed14Srobj 	    is_fs_threshold_support		:2,
5252eeaed14Srobj 	    is_fs_hysteresis_support		:2,
5262eeaed14Srobj 	    is_fs_rearm_support			:1,
5272eeaed14Srobj 	    is_fs_ignore			:1);
5282eeaed14Srobj 	uint8_t		is_fs_type;
5292eeaed14Srobj 	uint8_t		is_fs_reading_type;
5302eeaed14Srobj 	uint16_t	is_fs_assert_mask;
5312eeaed14Srobj 	uint16_t	is_fs_deassert_mask;
5322eeaed14Srobj 	uint16_t	is_fs_reading_mask;
5332eeaed14Srobj 	DECL_BITFIELD4(
5342eeaed14Srobj 	    is_fs_units_isprcnt			:1,
5352eeaed14Srobj 	    is_fs_mod_unit			:2,
5362eeaed14Srobj 	    is_fs_rate_unit			:3,
5372eeaed14Srobj 	    is_fs_analog_fmt			:2);
5382eeaed14Srobj 	uint8_t		is_fs_unit2;
5392eeaed14Srobj 	uint8_t		is_fs_unit3;
5402eeaed14Srobj 	/* Linearization */
5412eeaed14Srobj 	DECL_BITFIELD2(
5422eeaed14Srobj 	    is_fs_sensor_linear_type		:7,
5432eeaed14Srobj 	    __reserved2				:1);
5442eeaed14Srobj 	/* M, Tolerance */
5452eeaed14Srobj 	uint16_t	is_fs_mtol;
5462eeaed14Srobj 	/* B, Accuracy, R exp, B exp */
5472eeaed14Srobj 	uint32_t	is_fs_bacc;
5482eeaed14Srobj 	DECL_BITFIELD4(
5492eeaed14Srobj 	    is_fs_nominal_reading_spec		:1,
5502eeaed14Srobj 	    is_fs_normal_max_spec		:1,
5512eeaed14Srobj 	    is_fs_normal_min_spec		:1,
5522eeaed14Srobj 	    __reserved3				:5);
5532eeaed14Srobj 	uint8_t	is_fs_nominal_reading;
5542eeaed14Srobj 	uint8_t	is_fs_normal_maximum;
5552eeaed14Srobj 	uint8_t	is_fs_normal_minimum;
5562eeaed14Srobj 	uint8_t	is_fs_max;
5572eeaed14Srobj 	uint8_t	is_fs_min;
5582eeaed14Srobj 	uint8_t is_fs_upper_nonrecov;
5592eeaed14Srobj 	uint8_t	is_fs_upper_critical;
5602eeaed14Srobj 	uint8_t	is_fs_upper_noncrit;
5612eeaed14Srobj 	uint8_t	is_fs_lower_nonrecov;
5622eeaed14Srobj 	uint8_t	is_fs_lower_critical;
5632eeaed14Srobj 	uint8_t	is_fs_lower_noncrit;
5642eeaed14Srobj 	uint8_t		is_fs_hysteresis_positive;
5652eeaed14Srobj 	uint8_t		is_fs_hysteresis_negative;
5662eeaed14Srobj 	uint16_t	__reserved4;
5672eeaed14Srobj 	uint8_t		is_fs_oem;
5682eeaed14Srobj 	DECL_BITFIELD3(
5692eeaed14Srobj 	    is_fs_idlen				:5,
5702eeaed14Srobj 	    __reserved5				:1,
5712eeaed14Srobj 	    is_fs_idtype			:2);
5722eeaed14Srobj 	char		is_fs_idstring[1];
5732eeaed14Srobj } ipmi_sdr_full_sensor_t;
5742eeaed14Srobj 
5752eeaed14Srobj #define	IPMI_SDR_TYPE_COMPACT_SENSOR		0x02
5762eeaed14Srobj 
5772eeaed14Srobj /*
5782eeaed14Srobj  * Compact Sensor Record.  See section 43.2
5792eeaed14Srobj  */
5802eeaed14Srobj typedef struct ipmi_sdr_compact_sensor {
5812eeaed14Srobj 	/* RECORD KEY BYTES */
5822eeaed14Srobj 	uint8_t		is_cs_owner;
5832eeaed14Srobj 	DECL_BITFIELD3(
5842eeaed14Srobj 	    is_cs_sensor_lun			:2,
5852eeaed14Srobj 	    is_cs_fru_lun			:2,
5862eeaed14Srobj 	    is_cs_channel			:4);
5872eeaed14Srobj 	uint8_t		is_cs_number;
5882eeaed14Srobj 	/* RECORD BODY BYTES */
5892eeaed14Srobj 	uint8_t		is_cs_entity_id;
5902eeaed14Srobj 	DECL_BITFIELD2(
5912eeaed14Srobj 	    is_cs_entity_instance		:7,
5922eeaed14Srobj 	    is_cs_entity_logical		:1);
5932eeaed14Srobj 	DECL_BITFIELD8(
5942eeaed14Srobj 	    is_cs_sensor_scanning_enabled	:1,
5952eeaed14Srobj 	    is_cs_event_generation_enabled	:1,
5962eeaed14Srobj 	    is_cs_init_sensor_type		:1,
5972eeaed14Srobj 	    is_cs_init_hysteresis		:1,
5982eeaed14Srobj 	    __reserved1				:1,
5992eeaed14Srobj 	    is_cs_init_events			:1,
6002eeaed14Srobj 	    is_cs_init_scanning			:1,
6012eeaed14Srobj 	    is_cs_settable			:1);
6022eeaed14Srobj 	DECL_BITFIELD5(
6032eeaed14Srobj 	    is_cs_event_support			:2,
6042eeaed14Srobj 	    is_cs_threshold_support		:2,
6052eeaed14Srobj 	    is_cs_hysteresis_support		:2,
6062eeaed14Srobj 	    is_cs_rearm_support			:1,
6072eeaed14Srobj 	    is_cs_ignore			:1);
6082eeaed14Srobj 	uint8_t		is_cs_type;
6092eeaed14Srobj 	uint8_t		is_cs_reading_type;
6102eeaed14Srobj 	uint16_t	is_cs_assert_mask;
6112eeaed14Srobj 	uint16_t	is_cs_deassert_mask;
6122eeaed14Srobj 	uint16_t	is_cs_reading_mask;
6132eeaed14Srobj 	DECL_BITFIELD4(
6142eeaed14Srobj 	    is_cs_units_isprcnt			:1,
6152eeaed14Srobj 	    is_cs_mod_unit			:2,
6162eeaed14Srobj 	    is_cs_rate_unit			:3,
6172eeaed14Srobj 	    __reserved2				:2);
6182eeaed14Srobj 	uint8_t		is_cs_unit2;
6192eeaed14Srobj 	uint8_t		is_cs_unit3;
6202eeaed14Srobj 	DECL_BITFIELD3(
6212eeaed14Srobj 	    is_cs_share_count			:4,
6222eeaed14Srobj 	    is_cs_modifier_type			:2,
6232eeaed14Srobj 	    is_cs_direction			:2);
6242eeaed14Srobj 	DECL_BITFIELD2(
6252eeaed14Srobj 	    is_cs_modifier_offset		:7,
6262eeaed14Srobj 	    is_cs_sharing			:1);
6272eeaed14Srobj 	uint8_t		is_cs_hysteresis_positive;
6282eeaed14Srobj 	uint8_t		is_cs_hysteresis_negative;
6292eeaed14Srobj 	uint16_t	__reserved3;
6302eeaed14Srobj 	uint8_t		__reserved4;
6312eeaed14Srobj 	uint8_t		is_cs_oem;
6322eeaed14Srobj 	DECL_BITFIELD3(
6332eeaed14Srobj 	    is_cs_idlen				:5,
6342eeaed14Srobj 	    __reserved5				:1,
6352eeaed14Srobj 	    is_cs_idtype			:2);
6362eeaed14Srobj 	char		is_cs_idstring[1];
6372eeaed14Srobj } ipmi_sdr_compact_sensor_t;
6382eeaed14Srobj 
6392eeaed14Srobj /*
6402eeaed14Srobj  * Threshold sensor masks for is_cs_assert_mask and is_cs_deassert_mask.
6412eeaed14Srobj  */
6422eeaed14Srobj #define	IPMI_SENSOR_RETURN_NONRECOV	0x4000
6432eeaed14Srobj #define	IPMI_SENSOR_RETURN_CRIT		0x2000
6442eeaed14Srobj #define	IPMI_SENSOR_RETURN_NONCRIT	0x1000
6452eeaed14Srobj 
6462eeaed14Srobj #define	IPMI_SENSOR_MASK_UPPER_NONRECOV_HI	0x0800
6472eeaed14Srobj #define	IPMI_SENSOR_MASK_UPPER_NONRECOV_LO	0x0400
6482eeaed14Srobj #define	IPMI_SENSOR_MASK_UPPER_CRIT_HI		0x0200
6492eeaed14Srobj #define	IPMI_SENSOR_MASK_UPPER_CRIT_LO		0x0100
6502eeaed14Srobj #define	IPMI_SENSOR_MASK_UPPER_NONCRIT_HI	0x0080
6512eeaed14Srobj #define	IPMI_SENSOR_MASK_UPPER_NONCRIT_LO	0x0040
6522eeaed14Srobj #define	IPMI_SENSOR_MASK_LOWER_NONRECOV_HI	0x0020
6532eeaed14Srobj #define	IPMI_SENSOR_MASK_LOWER_NONRECOV_LO	0x0010
6542eeaed14Srobj #define	IPMI_SENSOR_MASK_LOWER_CRIT_HI		0x0008
6552eeaed14Srobj #define	IPMI_SENSOR_MASK_LOWER_CRIT_LO		0x0004
6562eeaed14Srobj #define	IPMI_SENSOR_MASK_LOWER_NONCRIT_HI	0x0002
6572eeaed14Srobj #define	IPMI_SENSOR_MASK_LOWER_NONCRIT_LO	0x0001
6582eeaed14Srobj 
6592eeaed14Srobj /*
6602eeaed14Srobj  * Threshold sensor masks for is_cs_reading_mask.
6612eeaed14Srobj  */
6622eeaed14Srobj #define	IPMI_SENSOR_SETTABLE_UPPER_NONRECOV	0x2000
6632eeaed14Srobj #define	IPMI_SENSOR_SETTABLE_UPPER_CRIT		0x1000
6642eeaed14Srobj #define	IPMI_SENSOR_SETTABLE_UPPER_NONCRIT	0x0800
6652eeaed14Srobj #define	IPMI_SENSOR_SETTABLE_LOWER_NONRECOV	0x0400
6662eeaed14Srobj #define	IPMI_SENSOR_SETTABLE_LOWER_CRIT		0x0200
6672eeaed14Srobj #define	IPMI_SENSOR_SETTABLE_LOWER_NONCRIT	0x0100
6682eeaed14Srobj #define	IPMI_SENSOR_READABLE_UPPER_NONRECOV	0x0020
6692eeaed14Srobj #define	IPMI_SENSOR_READABLE_UPPER_CRIT		0x0010
6702eeaed14Srobj #define	IPMI_SENSOR_READABLE_UPPER_NONCRIT	0x0008
6712eeaed14Srobj #define	IPMI_SENSOR_READABLE_LOWER_NONRECOV	0x0004
6722eeaed14Srobj #define	IPMI_SENSOR_READABLE_LOWER_CRIT		0x0002
6732eeaed14Srobj #define	IPMI_SENSOR_READABLE_LOWER_NONCRIT	0x0001
6742eeaed14Srobj 
6752eeaed14Srobj /*
6762eeaed14Srobj  * Values for is_cs_reading_type.  See table 42-2.
6772eeaed14Srobj  */
6782eeaed14Srobj #define	IPMI_RT_THRESHOLD			0x01
6792eeaed14Srobj #define	IPMI_RT_USAGE				0x02
6802eeaed14Srobj #define	IPMI_RT_STATE				0x03
6812eeaed14Srobj #define	IPMI_RT_PREDFAIL			0x04
6822eeaed14Srobj #define	IPMI_RT_LIMIT				0x05
6832eeaed14Srobj #define	IPMI_RT_PERFORMANCE			0x06
6842eeaed14Srobj #define	IPMI_RT_SEVERITY			0x07
6852eeaed14Srobj #define	IPMI_RT_PRESENT				0x08
6862eeaed14Srobj #define	IPMI_RT_ENABLED				0x09
6872eeaed14Srobj #define	IPMI_RT_AVAILABILITY			0x0A
6882eeaed14Srobj #define	IPMI_RT_REDUNDANCY			0x0B
6892eeaed14Srobj #define	IPMI_RT_ACPI				0x0C
6902eeaed14Srobj #define	IPMI_RT_SPECIFIC			0x6F
6912eeaed14Srobj 
6922eeaed14Srobj /*
6932eeaed14Srobj  * Bitmasks based on above reading types.  See table 42-2
6942eeaed14Srobj  */
6952eeaed14Srobj #define	IPMI_SR_THRESHOLD_LOWER_NONCRIT_LOW	0x0001
6962eeaed14Srobj #define	IPMI_SR_THRESHOLD_LOWER_NONCRIT_HIGH	0x0002
6972eeaed14Srobj #define	IPMI_SR_THRESHOLD_LOWER_CRIT_LOW	0x0004
6982eeaed14Srobj #define	IPMI_SR_THRESHOLD_LOWER_CRIT_HIGH	0x0008
6992eeaed14Srobj #define	IPMI_SR_THRESHOLD_LOWER_NONRECOV_LOW	0x0010
7002eeaed14Srobj #define	IPMI_SR_THRESHOLD_LOWER_NONRECOV_HIGH	0x0020
7012eeaed14Srobj #define	IPMI_SR_THRESHOLD_UPPER_NONCRIT_LOW	0x0040
7022eeaed14Srobj #define	IPMI_SR_THRESHOLD_UPPER_NONCRIT_HIGH	0x0080
7032eeaed14Srobj #define	IPMI_SR_THRESHOLD_UPPER_CRIT_LOW	0x0100
7042eeaed14Srobj #define	IPMI_SR_THRESHOLD_UPPER_CRIT_HIGH	0x0200
7052eeaed14Srobj #define	IPMI_SR_THRESHOLD_UPPER_NONRECOV_LOW	0x0400
7062eeaed14Srobj #define	IPMI_SR_THRESHOLD_UPPER_NONRECOV_HIGH	0x0800
7072eeaed14Srobj 
7082eeaed14Srobj #define	IPMI_SR_USAGE_IDLE			0x0001
7092eeaed14Srobj #define	IPMI_SR_USAGE_ACTIVE			0x0002
7102eeaed14Srobj #define	IPMI_SR_USAGE_BUSY			0x0004
7112eeaed14Srobj 
7122eeaed14Srobj #define	IPMI_SR_STATE_DEASSERT			0x0001
7132eeaed14Srobj #define	IPMI_SR_STATE_ASSERT			0x0002
7142eeaed14Srobj 
7152eeaed14Srobj #define	IPMI_SR_PREDFAIL_DEASSERT		0x0001
7162eeaed14Srobj #define	IPMI_SR_PREDFAIL_ASSERT			0x0002
7172eeaed14Srobj 
7182eeaed14Srobj #define	IPMI_SR_LIMIT_NOTEXCEEDED		0x0001
7192eeaed14Srobj #define	IPMI_SR_LIMIT_EXCEEDED			0x0002
7202eeaed14Srobj 
7212eeaed14Srobj #define	IPMI_SR_PERFORMANCE_MET			0x0001
7222eeaed14Srobj #define	IPMI_SR_PERFORMANCE_LAGS		0x0002
7232eeaed14Srobj 
7242eeaed14Srobj #define	IPMI_SR_SEVERITY_TO_OK			0x0001
7252eeaed14Srobj #define	IPMI_SR_SEVERITY_OK_TO_NONCRIT		0x0002
7262eeaed14Srobj #define	IPMI_SR_SEVERITY_LESS_TO_CRIT		0x0004
7272eeaed14Srobj #define	IPMI_SR_SEVERITY_LESS_TO_NONRECOV	0x0008
7282eeaed14Srobj #define	IPMI_SR_SEVERITY_MORE_TO_NONCRIT	0x0010
7292eeaed14Srobj #define	IPMI_SR_SEVERITY_NONRECOV_TO_CRIT	0x0020
7302eeaed14Srobj #define	IPMI_SR_SEVERITY_TO_NONRECOV		0x0040
7312eeaed14Srobj #define	IPMI_SR_SEVERITY_MONITOR		0x0080
7322eeaed14Srobj #define	IPMI_SR_SEVERITY_INFO			0x0100
7332eeaed14Srobj 
7342eeaed14Srobj #define	IPMI_SR_PRESENT_DEASSERT		0x0001
7352eeaed14Srobj #define	IPMI_SR_PRESENT_ASSERT			0x0002
7362eeaed14Srobj 
7372eeaed14Srobj #define	IPMI_SR_ENABLED_DEASSERT		0x0001
7382eeaed14Srobj #define	IPMI_SR_ENABLED_ASSERT			0x0002
7392eeaed14Srobj 
7402eeaed14Srobj #define	IPMI_SR_AVAILABILITY_RUNNING		0x0001
7412eeaed14Srobj #define	IPMI_SR_AVAILABILITY_INTEST		0x0002
7422eeaed14Srobj #define	IPMI_SR_AVAILABILITY_POWEROFF		0x0004
7432eeaed14Srobj #define	IPMI_SR_AVAILABILITY_ONLINE		0x0008
7442eeaed14Srobj #define	IPMI_SR_AVAILABILITY_OFFLINE		0x0010
7452eeaed14Srobj #define	IPMI_SR_AVAILABILITY_OFFDUTY		0x0020
7462eeaed14Srobj #define	IPMI_SR_AVAILABILITY_DEGRADED		0x0040
7472eeaed14Srobj #define	IPMI_SR_AVAILABILITY_POWERSAVE		0x0080
7482eeaed14Srobj #define	IPMI_SR_AVAILABILITY_INSTALLERR		0x0100
7492eeaed14Srobj 
7502eeaed14Srobj #define	IPMI_SR_REDUNDANCY_FULL			0x0001
7512eeaed14Srobj #define	IPMI_SR_REDUNDANCY_LOST			0x0002
7522eeaed14Srobj #define	IPMI_SR_REDUNDANCY_DEGRADED		0x0004
7532eeaed14Srobj #define	IPMI_SR_REDUNDANCY_NONE_MINIMAL		0x0008
7542eeaed14Srobj #define	IPMI_SR_REDUNDANCY_NONE_REGAINED	0x0010
7552eeaed14Srobj #define	IPMI_SR_REDUNDANCY_NONE_INSUFFFICIENT	0x0020
7562eeaed14Srobj #define	IPMI_SR_REDUNDANCY_DEG_FROM_FULL	0x0040
7572eeaed14Srobj #define	IPMI_SR_REDUNDANCY_DEG_FROM_NON		0x0080
7582eeaed14Srobj 
7592eeaed14Srobj #define	IPMI_SR_ACPI_DO				0x0001
7602eeaed14Srobj #define	IPMI_SR_ACPI_D1				0x0002
7612eeaed14Srobj #define	IPMI_SR_ACPI_D2				0x0004
7622eeaed14Srobj #define	IPMI_SR_ACPI_D3				0x0008
7632eeaed14Srobj 
7642eeaed14Srobj /*
7652eeaed14Srobj  * Bitmasks for sensor-specific reading type (0x6F).  See section 42.2.
7662eeaed14Srobj  */
7672eeaed14Srobj #define	IPMI_ST_RESERVED			0x00
7682eeaed14Srobj #define	IPMI_ST_TEMP				0x01
7692eeaed14Srobj #define	IPMI_ST_VOLTAGE				0x02
7702eeaed14Srobj #define	IPMI_ST_CURRENT				0x03
7712eeaed14Srobj #define	IPMI_ST_FAN				0x04
7722eeaed14Srobj #define	IPMI_ST_PHYSICAL			0x05
7732eeaed14Srobj 
7742eeaed14Srobj #define	IPMI_EV_PHYSICAL_GENERAL		0x0001
7752eeaed14Srobj #define	IPMI_EV_PHYSICAL_BAY			0x0002
7762eeaed14Srobj #define	IPMI_EV_PHYSICAL_CARD			0x0004
7772eeaed14Srobj #define	IPMI_EV_PHYSICAL_PROCESSOR		0x0008
7782eeaed14Srobj #define	IPMI_EV_PHYSICAL_LAN			0x0010
7792eeaed14Srobj #define	IPMI_EV_PHYSICAL_DOCK			0x0020
7802eeaed14Srobj #define	IPMI_EV_PHYSICAL_FAN			0x0040
7812eeaed14Srobj 
7822eeaed14Srobj #define	IPMI_ST_PLATFORM			0x06
7832eeaed14Srobj 
7842eeaed14Srobj #define	IPMI_EV_PLATFORM_SECURE			0x0001
7852eeaed14Srobj #define	IPMI_EV_PLATFORM_USER_PASS		0x0002
7862eeaed14Srobj #define	IPMI_EV_PLATFORM_SETUP_PASS		0x0004
7872eeaed14Srobj #define	IPMI_EV_PLATFORM_NETWORK_PASS		0x0008
7882eeaed14Srobj #define	IPMI_EV_PLATFORM_OTHER_PASS		0x0010
7892eeaed14Srobj #define	IPMI_EV_PLATFORM_OUT_OF_BAND		0x0020
7902eeaed14Srobj 
7912eeaed14Srobj #define	IPMI_ST_PROCESSOR			0x07
7922eeaed14Srobj 
7932eeaed14Srobj #define	IPMI_EV_PROCESSOR_IERR			0x0001
7942eeaed14Srobj #define	IPMI_EV_PROCESSOR_THERMAL		0x0002
7952eeaed14Srobj #define	IPMI_EV_PROCESSOR_FRB1			0x0004
7962eeaed14Srobj #define	IPMI_EV_PROCESSOR_FRB2			0x0008
7972eeaed14Srobj #define	IPMI_EV_PROCESSOR_FRB3			0x0010
7982eeaed14Srobj #define	IPMI_EV_PROCESSOR_CONFIG		0x0020
7992eeaed14Srobj #define	IPMI_EV_PROCESSOR_SMBIOS		0x0040
8002eeaed14Srobj #define	IPMI_EV_PROCESSOR_PRESENT		0x0080
8012eeaed14Srobj #define	IPMI_EV_PROCESSOR_DISABLED		0x0100
8022eeaed14Srobj #define	IPMI_EV_PROCESSOR_TERMINATOR		0x0200
8032eeaed14Srobj #define	IPMI_EV_PROCESSOR_THROTTLED		0x0400
8042eeaed14Srobj 
8052eeaed14Srobj #define	IPMI_ST_POWER_SUPPLY			0x08
8062eeaed14Srobj 
8072eeaed14Srobj #define	IPMI_EV_POWER_SUPPLY_PRESENT		0x0001
8082eeaed14Srobj #define	IPMI_EV_POWER_SUPPLY_FAILURE		0x0002
8092eeaed14Srobj #define	IPMI_EV_POWER_SUPPLY_PREDFAIL		0x0004
8102eeaed14Srobj #define	IPMI_EV_POWER_SUPPLY_INPUT_LOST		0x0008
8112eeaed14Srobj #define	IPMI_EV_POWER_SUPPLY_INPUT_RANGE	0x0010
8122eeaed14Srobj #define	IPMI_EV_POWER_SUPPLY_INPUT_RANGE_PRES	0x0020
8132eeaed14Srobj #define	IPMI_EV_POWER_SUPPLY_CONFIG_ERR		0x0040
8142eeaed14Srobj 
8152eeaed14Srobj #define	IPMI_ST_POWER_UNIT			0x09
8162eeaed14Srobj 
8172eeaed14Srobj #define	IPMI_EV_POWER_UNIT_OFF			0x0001
8182eeaed14Srobj #define	IPMI_EV_POWER_UNIT_CYCLE		0x0002
8192eeaed14Srobj #define	IPMI_EV_POWER_UNIT_240_DOWN		0x0004
8202eeaed14Srobj #define	IPMI_EV_POWER_UNIT_INTERLOCK_DOWN	0x0008
8212eeaed14Srobj #define	IPMI_EV_POWER_UNIT_AC_LOST		0x0010
8222eeaed14Srobj #define	IPMI_EV_POWER_UNIT_SOFT_FAILURE		0x0020
8232eeaed14Srobj #define	IPMI_EV_POWER_UNIT_FAIL			0x0040
8242eeaed14Srobj #define	IPMI_EV_POWER_UNIT_PREDFAIL		0x0080
8252eeaed14Srobj 
8262eeaed14Srobj #define	IPMI_ST_COOLING				0x0A
8272eeaed14Srobj #define	IPMI_ST_OTHER				0x0B
8282eeaed14Srobj #define	IPMI_ST_MEMORY				0x0C
8292eeaed14Srobj 
8302eeaed14Srobj #define	IPMI_EV_MEMORY_CE			0x0001
8312eeaed14Srobj #define	IPMI_EV_MEMORY_UE			0x0002
8322eeaed14Srobj #define	IPMI_EV_MEMORY_PARITY			0x0004
8332eeaed14Srobj #define	IPMI_EV_MEMORY_SCRUB_FAIL		0x0008
8342eeaed14Srobj #define	IPMI_EV_MEMORY_DISABLED			0x0010
8352eeaed14Srobj #define	IPMI_EV_MEMORY_CE_LOG_LIMIT		0x0020
8362eeaed14Srobj #define	IPMI_EV_MEMORY_PRESENT			0x0040
8372eeaed14Srobj #define	IPMI_EV_MEMORY_CONFIG_ERR		0x0080
8382eeaed14Srobj #define	IPMI_EV_MEMORY_SPARE			0x0100
8392eeaed14Srobj #define	IPMI_EV_MEMORY_THROTTLED		0x0200
8402eeaed14Srobj #define	IPMI_EV_MEMORY_OVERTEMP			0x0400
8412eeaed14Srobj 
8422eeaed14Srobj #define	IPMI_ST_BAY				0x0D
8432eeaed14Srobj 
8442eeaed14Srobj #define	IPMI_EV_BAY_PRESENT			0x0001
8452eeaed14Srobj #define	IPMI_EV_BAY_FAULT			0x0002
8462eeaed14Srobj #define	IPMI_EV_BAY_PREDFAIL			0x0004
8472eeaed14Srobj #define	IPMI_EV_BAY_SPARE			0x0008
8482eeaed14Srobj #define	IPMI_EV_BAY_CHECK			0x0010
8492eeaed14Srobj #define	IPMI_EV_BAY_CRITICAL			0x0020
8502eeaed14Srobj #define	IPMI_EV_BAY_FAILED			0x0040
8512eeaed14Srobj #define	IPMI_EV_BAY_REBUILDING			0x0080
8522eeaed14Srobj #define	IPMI_EV_BAY_ABORTED			0x0100
8532eeaed14Srobj 
8542eeaed14Srobj #define	IPMI_ST_POST_RESIZE			0x0E
8552eeaed14Srobj #define	IPMI_ST_FIRMWARE			0x0F
8562eeaed14Srobj 
8572eeaed14Srobj #define	IPMI_EV_FIRMWARE_ERROR			0x0001
8582eeaed14Srobj #define	IPMI_EV_FIRMWARE_HANG			0x0002
8592eeaed14Srobj #define	IPMI_EV_FIRMWARE_PROGRESS		0x0004
8602eeaed14Srobj 
8612eeaed14Srobj #define	IPMI_ST_EVENT_LOG			0x10
8622eeaed14Srobj 
8632eeaed14Srobj #define	IPMI_EV_EVENT_LOG_CE			0x0001
8642eeaed14Srobj #define	IPMI_EV_EVENT_LOG_TYPE			0x0002
8652eeaed14Srobj #define	IPMI_EV_EVENT_LOG_RESET			0x0004
8662eeaed14Srobj #define	IPMI_EV_EVENT_LOG_ALL			0x0008
8672eeaed14Srobj #define	IPMI_EV_EVENT_LOG_FULL			0x0010
8682eeaed14Srobj #define	IPMI_EV_EVENT_LOG_ALMOST_FULL		0x0020
8692eeaed14Srobj 
8702eeaed14Srobj #define	IPMI_ST_WATCHDOG1			0x11
8712eeaed14Srobj 
8722eeaed14Srobj #define	IPMI_EV_WATCHDOG_BIOS_RESET		0x0001
8732eeaed14Srobj #define	IPMI_EV_WATCHDOG_OS_RESET		0x0002
8742eeaed14Srobj #define	IPMI_EV_WATCHDOG_OS_SHUTDOWN		0x0004
8752eeaed14Srobj #define	IPMI_EV_WATCHDOG_OS_PWR_DOWN		0x0008
8762eeaed14Srobj #define	IPMI_EV_WATCHDOG_OS_PWR_CYCLE		0x0010
8772eeaed14Srobj #define	IPMI_EV_WATCHDOG_OS_NMI_DIAG		0x0020
8782eeaed14Srobj #define	IPMI_EV_WATCHDOG_EXPIRED		0x0040
8792eeaed14Srobj #define	IPMI_EV_WATCHDOG_PRE_TIMEOUT_INT	0x0080
8802eeaed14Srobj 
8812eeaed14Srobj #define	IPMI_ST_SYSTEM				0x12
8822eeaed14Srobj 
8832eeaed14Srobj #define	IPMI_EV_STSTEM_RECONF			0x0001
8842eeaed14Srobj #define	IPMI_EV_STSTEM_BOOT			0x0002
8852eeaed14Srobj #define	IPMI_EV_STSTEM_UNKNOWN_HW_FAILURE	0x0004
8862eeaed14Srobj #define	IPMI_EV_STSTEM_AUX_LOG_UPDATED		0x0008
8872eeaed14Srobj #define	IPMI_EV_STSTEM_PEF_ACTION		0x0010
8882eeaed14Srobj #define	IPMI_EV_SYSTEM_TIMETAMP_CLOCKSYNC	0x0020
8892eeaed14Srobj 
8902eeaed14Srobj #define	IPMI_ST_CRITICAL			0x13
8912eeaed14Srobj 
8922eeaed14Srobj #define	IPMI_EV_CRITICAL_EXT_NMI		0x0001
8932eeaed14Srobj #define	IPMI_EV_CRITICAL_BUS_TIMOEOUT		0x0002
8942eeaed14Srobj #define	IPMI_EV_CRITICAL_IO_NMI			0x0004
8952eeaed14Srobj #define	IPMI_EV_CRITICAL_SW_NMI			0x0008
8962eeaed14Srobj #define	IPMI_EV_CRITICAL_PCI_PERR		0x0010
8972eeaed14Srobj #define	IPMI_EV_CRITICAL_PCI_SERR		0x0020
8982eeaed14Srobj #define	IPMI_EV_CRITICAL_EISA_FAILSAFE		0x0040
8992eeaed14Srobj #define	IPMI_EV_CRITICAL_BUS_CE			0x0080
9002eeaed14Srobj #define	IPMI_EV_CRITICAL_BUS_UE			0x0100
9012eeaed14Srobj #define	IPMI_EV_CRITICAL_FATAL_NMI		0x0200
9022eeaed14Srobj #define	IPMI_EV_CRITICAL_BUS_FATAL_ERR		0x0400
9032eeaed14Srobj #define	IPMI_EV_CRITICAL_BUS_DEGRADED		0x0800
9042eeaed14Srobj 
9052eeaed14Srobj #define	IPMI_ST_BUTTON				0x14
9062eeaed14Srobj 
9072eeaed14Srobj #define	IPMI_EV_BUTTON_PWR			0x0001
9082eeaed14Srobj #define	IPMI_EV_BUTTON_SLEEP			0x0002
9092eeaed14Srobj #define	IPMI_EV_BUTTON_RESET			0x0004
9102eeaed14Srobj #define	IPMI_EV_BUTTON_FRU_LATCH		0x0008
9112eeaed14Srobj #define	IPMI_EV_BUTTON_FRU_SERVICE		0x0010
9122eeaed14Srobj 
9132eeaed14Srobj #define	IPMI_ST_MODULE				0x15
9142eeaed14Srobj #define	IPMI_ST_MICROCONTROLLER			0x16
9152eeaed14Srobj #define	IPMI_ST_CARD				0x17
9162eeaed14Srobj #define	IPMI_ST_CHASSIS				0x18
9172eeaed14Srobj 
9182eeaed14Srobj #define	IPMI_ST_CHIPSET				0x19
9192eeaed14Srobj 
9202eeaed14Srobj #define	IPMI_EV_CHIPSET_PWR_CTL_FAIL		0x0001
9212eeaed14Srobj 
9222eeaed14Srobj #define	IPMI_ST_FRU				0x1A
9232eeaed14Srobj #define	IPMI_ST_CABLE				0x1B
9242eeaed14Srobj 
9252eeaed14Srobj #define	IPMI_EV_CABLE_CONNECTED			0x0001
9262eeaed14Srobj #define	IPMI_EV_CABLE_CONFIG_ERR		0x0002
9272eeaed14Srobj 
9282eeaed14Srobj #define	IPMI_ST_TERMINATOR			0x1C
9292eeaed14Srobj 
9302eeaed14Srobj #define	IPMI_ST_BOOT				0x1D
9312eeaed14Srobj 
9322eeaed14Srobj #define	IPMI_EV_BOOT_BIOS_PWR_UP		0x0001
9332eeaed14Srobj #define	IPMI_EV_BOOT_BIOS_HARD_RESET		0x0002
9342eeaed14Srobj #define	IPMI_EV_BOOT_BIOS_WARM_RESET		0x0004
9352eeaed14Srobj #define	IPMI_EV_BOOT_PXE_BOOT			0x0008
9362eeaed14Srobj #define	IPMI_EV_BOOT_DIAG_BOOT			0x0010
9372eeaed14Srobj #define	IPMI_EV_BOOT_OS_HARD_RESET		0x0020
9382eeaed14Srobj #define	IPMI_EV_BOOT_OS_WARM_RESET		0x0040
9392eeaed14Srobj #define	IPMI_EV_BOOT_SYS_RESTART		0x0080
9402eeaed14Srobj 
9412eeaed14Srobj #define	IPMI_ST_BOOT_ERROR			0x1E
9422eeaed14Srobj 
9432eeaed14Srobj #define	IPMI_EV_BOOT_ERROR_NOMEDIA		0x0001
9442eeaed14Srobj #define	IPMI_EV_BOOT_ERROR_NON_BOOTABLE_DISK	0x0002
9452eeaed14Srobj #define	IPMI_EV_BOOT_ERROR_NO_PXE_SERVER	0x0004
9462eeaed14Srobj #define	IPMI_EV_BOOT_ERROR_INV_BOOT_SECT	0x0008
9472eeaed14Srobj #define	IPMI_EV_BOOT_ERROR_USR_SELECT_TIMEOUT	0x0010
9482eeaed14Srobj 
9492eeaed14Srobj #define	IPMI_ST_BOOT_OS				0x1F
9502eeaed14Srobj 
9512eeaed14Srobj #define	IPMI_EV_BOOT_OS_A_DRV_BOOT_COMPLETE	0x0001
9522eeaed14Srobj #define	IPMI_EV_BOOT_OS_C_DRV_BOOT_COMPLETE	0x0002
9532eeaed14Srobj #define	IPMI_EV_BOOT_OS_PXE_BOOT_COMPLETE	0x0004
9542eeaed14Srobj #define	IPMI_EV_BOOT_OS_DIAG_BOOT_COMPLETE	0x0008
9552eeaed14Srobj #define	IPMI_EV_BOOT_OS_CDROM_BOOT_COMPLETE	0x0010
9562eeaed14Srobj #define	IPMI_EV_BOOT_OS_ROM_BOOT_COMPLETE	0x0020
9572eeaed14Srobj #define	IPMI_EV_BOOT_OS_UNSPEC_BOOT_COMPLETE	0x0040
9582eeaed14Srobj 
9592eeaed14Srobj #define	IPMI_ST_OS_SHUTDOWN			0x20
9602eeaed14Srobj 
9612eeaed14Srobj #define	IPMI_EV_OS_SHUTDOWN_LOADING		0x0001
9622eeaed14Srobj #define	IPMI_EV_OS_SHUTDOWN_CRASH		0x0002
9632eeaed14Srobj #define	IPMI_EV_OS_STOP_GRACEFUL		0x0004
9642eeaed14Srobj #define	IPMI_EV_OS_SHUTDOWN_GRACEFUL		0x0008
9652eeaed14Srobj #define	IPMI_EV_OS_SHUTDOWN_PEF			0x0010
9662eeaed14Srobj #define	IPMI_EV_OS_SHUTDOWN_BMC			0x0020
9672eeaed14Srobj 
9682eeaed14Srobj #define	IPMI_ST_SLOT				0x21
9692eeaed14Srobj 
9702eeaed14Srobj #define	IPMI_EV_SLOT_FAULT_ASSERTED		0x0001
9712eeaed14Srobj #define	IPMI_EV_SLOT_IDENTIFY_ASSERTED		0x0002
9722eeaed14Srobj #define	IPMI_EV_SLOT_CONNECTED			0x0004
9732eeaed14Srobj #define	IPMI_EV_SLOT_INSTALL_READY		0x0008
9742eeaed14Srobj #define	IPMI_EV_SLOT_REMOVE_READY		0x0010
9752eeaed14Srobj #define	IPMI_EV_SLOT_PWR_OFF			0x0020
9762eeaed14Srobj #define	IPMI_EV_SLOT_REMOVED			0x0040
9772eeaed14Srobj #define	IPMI_EV_SLOT_INTERLOCK_ASSERTED		0x0080
9782eeaed14Srobj #define	IPMI_EV_SLOT_DISABLED			0x0100
9792eeaed14Srobj #define	IPMI_EV_SLOT_SPARE_DEVICE		0x0200
9802eeaed14Srobj 
9812eeaed14Srobj #define	IPMI_ST_ACPI				0x22
9822eeaed14Srobj 
9832eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_S0_G0		0x0001
9842eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_S1			0x0002
9852eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_S2			0x0004
9862eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_S3			0x0008
9872eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_S4			0x0010
9882eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_S5_G2_SOFT_OFF	0x0020
9892eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_S4_S5_SOFT_OFF	0x0040
9902eeaed14Srobj #define	IPMI_EV_ACPI_PSATTE_G3_MECH_OFF		0x0080
9912eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_S1_S2_S3_SLEEP	0x0100
9922eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_G1_SLEEP		0x0200
9932eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_S5_OVERRIDE		0x0400
9942eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_LEGACY_ON		0x0800
9952eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_LEGACY_OFF		0x1000
9962eeaed14Srobj #define	IPMI_EV_ACPI_PSTATE_UNKNOWN		0x2000
9972eeaed14Srobj 
9982eeaed14Srobj #define	IPMI_ST_WATCHDOG2			0x23
9992eeaed14Srobj 
10002eeaed14Srobj #define	IPMI_EV_WATCHDOG2_EXPIRED		0x0001
10012eeaed14Srobj #define	IPMI_EV_WATCHDOG2_HARD_RESET		0x0002
10022eeaed14Srobj #define	IPMI_EV_WATCHDOG2_PWR_DOWN		0x0004
10032eeaed14Srobj #define	IPMI_EV_WATCHDOG2_PWR_CYCLE		0x0008
10042eeaed14Srobj #define	IPMI_EV_WATCHDOG2_RESERVED1		0x0010
10052eeaed14Srobj #define	IPMI_EV_WATCHDOG2_RESERVED2		0x0020
10062eeaed14Srobj #define	IPMI_EV_WATCHDOG2_RESERVED3		0x0040
10072eeaed14Srobj #define	IPMI_EV_WATCHDOG2_RESERVED4		0x0080
10082eeaed14Srobj #define	IPMI_EV_WATCHDOG2_TIMEOUT_INT		0x0100
10092eeaed14Srobj 
10102eeaed14Srobj #define	IPMI_ST_ALERT				0x24
10112eeaed14Srobj 
10122eeaed14Srobj #define	IPMI_EV_ALERT_PLAT_PAGE			0x0001
10132eeaed14Srobj #define	IPMI_EV_ALERT_PLAT_LAN_ALERT		0x0002
10142eeaed14Srobj #define	IPMI_EV_ALERT_PLAT_EVT_TRAP		0x0004
10152eeaed14Srobj #define	IPMI_EV_ALERT_PLAT_SNMP_TRAP		0x0008
10162eeaed14Srobj 
10172eeaed14Srobj #define	IPMI_ST_PRESENCE			0x25
10182eeaed14Srobj 
10192eeaed14Srobj #define	IPMI_EV_PRESENCE_PRESENT		0x0001
10202eeaed14Srobj #define	IPMI_EV_PRESENCE_ABSENT			0x0002
10212eeaed14Srobj #define	IPMI_EV_PRESENCE_DISABLED		0x0004
10222eeaed14Srobj 
10232eeaed14Srobj #define	IPMI_ST_ASIC				0x26
10242eeaed14Srobj 
10252eeaed14Srobj #define	IPMI_ST_LAN				0x27
10262eeaed14Srobj 
10272eeaed14Srobj #define	IPMI_EV_LAN_HEARTBEAT_LOST		0x0001
10282eeaed14Srobj #define	IPMI_EV_LAN_HEARTBEAT			0x0002
10292eeaed14Srobj 
10302eeaed14Srobj #define	IPMI_ST_HEALTH				0x28
10312eeaed14Srobj 
10322eeaed14Srobj #define	IPMI_EV_HEALTH_SENSOR_ACC_DEGRADED	0x0001
10332eeaed14Srobj #define	IPMI_EV_HEALTH_CNTLR_ACC_DEGRADED	0x0002
10342eeaed14Srobj #define	IPMI_EV_HEALTH_CNTLR_OFFLINE		0x0004
10352eeaed14Srobj #define	IPMI_EV_HEALTH_CNTLR_UNAVAIL		0x0008
10362eeaed14Srobj #define	IPMI_EV_HEALTH_SENSOR_FAILURE		0x0010
10372eeaed14Srobj #define	IPMI_EV_HEALTH_FRU_FAILURE		0x0020
10382eeaed14Srobj 
10392eeaed14Srobj #define	IPMI_ST_BATTERY				0x29
10402eeaed14Srobj 
10412eeaed14Srobj #define	IPMI_EV_BATTERY_LOW			0x0001
10422eeaed14Srobj #define	IPMI_EV_BATTERY_FAILED			0x0002
10432eeaed14Srobj #define	IPMI_EV_BATTERY_PRESENCE		0x0004
10442eeaed14Srobj 
10452eeaed14Srobj #define	IPMI_ST_AUDIT				0x2A
10462eeaed14Srobj 
10472eeaed14Srobj #define	IPMI_EV_AUDIT_SESSION_ACTIVATED		0x0001
10482eeaed14Srobj #define	IPMI_EV_AUDIT_SESSION_DEACTIVATED	0x0002
10492eeaed14Srobj 
10502eeaed14Srobj #define	IPMI_ST_VERSION				0x2B
10512eeaed14Srobj 
10522eeaed14Srobj #define	IPMI_EV_VERSION_HW_CHANGE		0x0001
10532eeaed14Srobj #define	IPMI_EV_VERSION_SW_CHANGE		0x0002
10542eeaed14Srobj #define	IPMI_EV_VERSION_HW_INCOMPATIBLE		0x0004
10552eeaed14Srobj #define	IPMI_EV_VERSION_SW_INCOMPATIBLE		0x0008
10562eeaed14Srobj #define	IPMI_EV_VERSION_HW_INVAL		0x0010
10572eeaed14Srobj #define	IPMI_EV_VERSION_SW_INVAL		0x0020
10582eeaed14Srobj #define	IPMI_EV_VERSION_HW_CHANGE_SUCCESS	0x0040
10592eeaed14Srobj #define	IPMI_EV_VERSION_SW_CHANGE_SUCCESS	0x0080
10602eeaed14Srobj 
10612eeaed14Srobj #define	IPMI_ST_FRU_STATE			0x2C
10622eeaed14Srobj 
10632eeaed14Srobj #define	IPMI_EV_FRU_STATE_NOT_INSTALLED		0x0001
10642eeaed14Srobj #define	IPMI_EV_FRU_STATE_INACTIVE		0x0002
10652eeaed14Srobj #define	IPMI_EV_FRU_STATE_ACT_REQ		0x0004
10662eeaed14Srobj #define	IPMI_EV_FRU_STATE_ACT_INPROGRESS	0x0008
10672eeaed14Srobj #define	IPMI_EV_FRU_STATE_ACTIVE		0x0010
10682eeaed14Srobj #define	IPMI_EV_FRU_STATE_DEACT_REQ		0x0020
10692eeaed14Srobj #define	IPMI_EV_FRU_STATE_DEACT_INPROGRESS	0x0040
10702eeaed14Srobj #define	IPMI_EV_FRU_STATE_COMM_LOST		0x0080
10712eeaed14Srobj 
10722eeaed14Srobj /*
10732eeaed14Srobj  * Constants for unit type codes.  See Table 43-15.
10742eeaed14Srobj  */
10752eeaed14Srobj #define	IPMI_UNITS_UNSPECIFIED			0x00
10762eeaed14Srobj #define	IPMI_UNITS_DEGREES_C			0x01
10772eeaed14Srobj #define	IPMI_UNITS_DEGREES_F			0x02
10782eeaed14Srobj #define	IPMI_UNITS_DEGREES_K			0x03
10792eeaed14Srobj #define	IPMI_UNITS_VOLTS			0x04
10802eeaed14Srobj #define	IPMI_UNITS_AMPS				0x05
10812eeaed14Srobj #define	IPMI_UNITS_WATTS			0x06
10822eeaed14Srobj #define	IPMI_UNITS_JOULES			0x07
10832eeaed14Srobj #define	IPMI_UNITS_COULOMBS			0x08
10842eeaed14Srobj #define	IPMI_UNITS_VA				0x09
10852eeaed14Srobj #define	IPMI_UNITS_NITS				0x0A
10862eeaed14Srobj #define	IPMI_UNITS_LUMEN			0x0B
10872eeaed14Srobj #define	IPMI_UNITS_LUX				0x0C
10882eeaed14Srobj #define	IPMI_UNITS_CANDELA			0x0D
10892eeaed14Srobj #define	IPMI_UNITS_KPA				0x0E
10902eeaed14Srobj #define	IPMI_UNITS_PSI				0x0F
10912eeaed14Srobj 
10922eeaed14Srobj #define	IPMI_UNITS_NEWTON			0x10
10932eeaed14Srobj #define	IPMI_UNITS_CFM				0x11
10942eeaed14Srobj #define	IPMI_UNITS_RPM				0x12
10952eeaed14Srobj #define	IPMI_UNITS_HZ				0x13
10962eeaed14Srobj #define	IPMI_UNITS_MICROSEC			0x14
10972eeaed14Srobj #define	IPMI_UNITS_MILLISEC			0x15
10982eeaed14Srobj #define	IPMI_UNITS_SECS				0x16
10992eeaed14Srobj #define	IPMI_UNITS_MIN				0x17
11002eeaed14Srobj #define	IPMI_UNITS_HOUR				0x18
11012eeaed14Srobj #define	IPMI_UNITS_DAY				0x19
11022eeaed14Srobj #define	IPMI_UNITS_WEEK				0x1A
11032eeaed14Srobj #define	IPMI_UNITS_MIL				0x1B
11042eeaed14Srobj #define	IPMI_UNITS_INCHES			0x1C
11052eeaed14Srobj #define	IPMI_UNITS_FEET				0x1D
11062eeaed14Srobj #define	IPMI_UNITS_CUB_INCH			0x1E
11072eeaed14Srobj #define	IPMI_UNITS_CUB_FEET			0x1F
11082eeaed14Srobj 
11092eeaed14Srobj #define	IPMI_UNITS_MM				0x20
11102eeaed14Srobj #define	IPMI_UNITS_CM				0x21
11112eeaed14Srobj #define	IPMI_UNITS_METERS			0x22
11122eeaed14Srobj #define	IPMI_UNITS_CUB_CM			0x23
11132eeaed14Srobj #define	IPMI_UNITS_CUB_METER			0x24
11142eeaed14Srobj #define	IPMI_UNITS_LITERS			0x25
11152eeaed14Srobj #define	IPMI_UNITS_FLUID_OUNCE			0x26
11162eeaed14Srobj #define	IPMI_UNITS_RADIANS			0x27
11172eeaed14Srobj #define	IPMI_UNITS_STERADIANS			0x28
11182eeaed14Srobj #define	IPMI_UNITS_REVOLUTIONS			0x29
11192eeaed14Srobj #define	IPMI_UNITS_CYCLES			0x2A
11202eeaed14Srobj #define	IPMI_UNITS_GRAVITIES			0x2B
11212eeaed14Srobj #define	IPMI_UNITS_OUNCE			0x2C
11222eeaed14Srobj #define	IPMI_UNITS_POUND			0x2D
11232eeaed14Srobj #define	IPMI_UNITS_FOOT_POUND			0x2E
11242eeaed14Srobj #define	IPMI_UNITS_OZ_INCH			0x2F
11252eeaed14Srobj 
11262eeaed14Srobj #define	IPMI_UNITS_GAUSS			0x30
11272eeaed14Srobj #define	IPMI_UNITS_GILBERTS			0x31
11282eeaed14Srobj #define	IPMI_UNITS_HENRY			0x32
11292eeaed14Srobj #define	IPMI_UNITS_MILHENRY			0x33
11302eeaed14Srobj #define	IPMI_UNITS_FARAD			0x34
11312eeaed14Srobj #define	IPMI_UNITS_MICROFARAD			0x35
11322eeaed14Srobj #define	IPMI_UNITS_OHMS				0x36
11332eeaed14Srobj #define	IPMI_UNITS_SIEMENS			0x37
11342eeaed14Srobj #define	IPMI_UNITS_MOLE				0x38
11352eeaed14Srobj #define	IPMI_UNITS_BECQUEREL			0x39
11362eeaed14Srobj #define	IPMI_UNITS_PPM				0x3A
11372eeaed14Srobj /* 0x3B is reserved */
11382eeaed14Srobj #define	IPMI_UNITS_DECIBELS			0x3C
11392eeaed14Srobj #define	IPMI_UNITS_DBA				0x3D
11402eeaed14Srobj #define	IPMI_UNITS_DBC				0x3E
11412eeaed14Srobj #define	IPMI_UNITS_GRAY				0x3F
11422eeaed14Srobj 
11432eeaed14Srobj #define	IPMI_UNITS_SIEVERT			0x40
11442eeaed14Srobj #define	IPMI_UNITS_COLOR_TEMP_K			0x41
11452eeaed14Srobj #define	IPMI_UNITS_BIT				0x42
11462eeaed14Srobj #define	IPMI_UNITS_KILOBIT			0x43
11472eeaed14Srobj #define	IPMI_UNITS_MEGABIT			0x44
11482eeaed14Srobj #define	IPMI_UNITS_GIGABIT			0x45
11492eeaed14Srobj #define	IPMI_UNITS_BYTE				0x46
11502eeaed14Srobj #define	IPMI_UNITS_KILOBYTE			0x47
11512eeaed14Srobj #define	IPMI_UNITS_MEGABYTE			0x48
11522eeaed14Srobj #define	IPMI_UNITS_GIGABYTE			0x49
11532eeaed14Srobj #define	IPMI_UNITS_WORD				0x4A
11542eeaed14Srobj #define	IPMI_UNITS_DWORD			0x4B
11552eeaed14Srobj #define	IPMI_UNITS_QWORD			0x4C
11562eeaed14Srobj #define	IPMI_UNITS_MEMLINE			0x4D
11572eeaed14Srobj #define	IPMI_UNITS_HIT				0x4E
11582eeaed14Srobj #define	IPMI_UNITS_MISS				0x4F
11592eeaed14Srobj 
11602eeaed14Srobj #define	IPMI_UNITS_RETRY			0x50
11612eeaed14Srobj #define	IPMI_UNITS_RESET			0x51
11622eeaed14Srobj #define	IPMI_UNITS_OVERFLOW			0x52
11632eeaed14Srobj #define	IPMI_UNITS_UNDERRUN			0x53
11642eeaed14Srobj #define	IPMI_UNITS_COLLISION			0x54
11652eeaed14Srobj #define	IPMI_UNITS_PACKETS			0x55
11662eeaed14Srobj #define	IPMI_UNITS_MESSAGES			0x56
11672eeaed14Srobj #define	IPMI_UNITS_CHARACTERS			0x57
11682eeaed14Srobj #define	IPMI_UNITS_ERROR			0x58
11692eeaed14Srobj #define	IPMI_UNITS_CE				0x59
11702eeaed14Srobj #define	IPMI_UNITS_UE				0x5A
11712eeaed14Srobj #define	IPMI_UNITS_FATAL_ERROR			0x5B
11722eeaed14Srobj #define	IPMI_UNITS_GRAMS			0x5C
11732eeaed14Srobj 
11742eeaed14Srobj /*
11752eeaed14Srobj  * Event-Only Record.  See section 43.3.
11762eeaed14Srobj  */
11772eeaed14Srobj 
11782eeaed14Srobj #define	IPMI_SDR_TYPE_EVENT_ONLY		0x03
11792eeaed14Srobj 
11802eeaed14Srobj typedef struct ipmi_sdr_event_only {
11812eeaed14Srobj 	/* RECORD KEY BYTES */
11822eeaed14Srobj 	uint8_t		is_eo_owner;
11832eeaed14Srobj 	DECL_BITFIELD3(
11842eeaed14Srobj 	    is_eo_sensor_lun			:2,
11852eeaed14Srobj 	    is_eo_fru_lun			:2,
11862eeaed14Srobj 	    is_eo_channel			:4);
11872eeaed14Srobj 	uint8_t		is_eo_number;
11882eeaed14Srobj 	/* RECORD BODY BYTES */
11892eeaed14Srobj 	uint8_t		is_eo_entity_id;
11902eeaed14Srobj 	DECL_BITFIELD2(
11912eeaed14Srobj 	    is_eo_entity_instance		:7,
11922eeaed14Srobj 	    is_eo_entity_logical		:1);
11932eeaed14Srobj 	uint8_t		is_eo_sensor_type;
11942eeaed14Srobj 	uint8_t		is_eo_reading_type;
11952eeaed14Srobj 	DECL_BITFIELD3(
11962eeaed14Srobj 	    is_eo_share_count			:4,
11972eeaed14Srobj 	    is_eo_modifier_type			:2,
11982eeaed14Srobj 	    is_eo_direction			:2);
11992eeaed14Srobj 	DECL_BITFIELD2(
12002eeaed14Srobj 	    is_eo_modifier_offset		:7,
12012eeaed14Srobj 	    is_eo_sharing			:1);
12022eeaed14Srobj 	uint8_t		__reserved;
12032eeaed14Srobj 	uint8_t		is_eo_oem;
12042eeaed14Srobj 	DECL_BITFIELD3(
12052eeaed14Srobj 	    is_eo_idlen				:5,
12062eeaed14Srobj 	    __reserved1				:1,
12072eeaed14Srobj 	    is_eo_idtype			:2);
12082eeaed14Srobj 	char		is_eo_idstring[1];
12092eeaed14Srobj } ipmi_sdr_event_only_t;
12102eeaed14Srobj 
12112eeaed14Srobj /*
12122eeaed14Srobj  * Entity Association Record.  See section 43.4.
12132eeaed14Srobj  */
12142eeaed14Srobj 
12152eeaed14Srobj #define	IPMI_SDR_TYPE_ENTITY_ASSOCIATION	0x08
12162eeaed14Srobj 
12172eeaed14Srobj typedef struct ipmi_sdr_entity_association {
12182eeaed14Srobj 	/* RECORD KEY BYTES */
12192eeaed14Srobj 	uint8_t		is_ea_entity_id;
12202eeaed14Srobj 	uint8_t		is_ea_entity_instance;
12212eeaed14Srobj 	DECL_BITFIELD4(
12222eeaed14Srobj 	    __reserved		:5,
12232eeaed14Srobj 	    is_ea_presence	:1,
12242eeaed14Srobj 	    is_ea_record_link	:1,
12252eeaed14Srobj 	    is_ea_range		:1);
12262eeaed14Srobj 	/* RECORD BODY BYTES */
12272eeaed14Srobj 	struct {
12282eeaed14Srobj 		uint8_t		is_ea_sub_id;
12292eeaed14Srobj 		uint8_t		is_ea_sub_instance;
12302eeaed14Srobj 	} is_ea_sub[4];
12312eeaed14Srobj } ipmi_sdr_entity_association_t;
12322eeaed14Srobj 
12332eeaed14Srobj /*
12342eeaed14Srobj  * Device-relative Entity Association Record.  See section 43.5.
12352eeaed14Srobj  */
12362eeaed14Srobj 
12372eeaed14Srobj #define	IPMI_SDR_TYPE_DEVICE_RELATIVE		0x09
12382eeaed14Srobj 
12392eeaed14Srobj typedef struct ipmi_sdr_device_relative {
12402eeaed14Srobj 	/* RECORD KEY BYTES */
12412eeaed14Srobj 	uint8_t		is_dr_entity_id;
12422eeaed14Srobj 	uint8_t		is_dr_entity_instance;
12432eeaed14Srobj 	DECL_BITFIELD2(
12442eeaed14Srobj 	    __reserved1			:1,
12452eeaed14Srobj 	    is_dr_slaveaddr		:7);
12462eeaed14Srobj 	DECL_BITFIELD2(
12472eeaed14Srobj 	    __reserved2			:4,
12482eeaed14Srobj 	    is_dr_channel		:4);
12492eeaed14Srobj 	DECL_BITFIELD4(
12502eeaed14Srobj 	    __reserved			:5,
12512eeaed14Srobj 	    is_dr_presence		:1,
12522eeaed14Srobj 	    is_dr_record_link		:1,
12532eeaed14Srobj 	    is_dr_range			:1);
12542eeaed14Srobj 	/* RECORD BODY BYTES */
12552eeaed14Srobj 	struct {
12562eeaed14Srobj 		DECL_BITFIELD2(
12572eeaed14Srobj 		    __reserved3		:1,
12582eeaed14Srobj 		    is_dr_sub_slaveaddr	:7);
12592eeaed14Srobj 		DECL_BITFIELD2(
12602eeaed14Srobj 		    __reserved4		:4,
12612eeaed14Srobj 		    is_dr_sub_channel	:4);
12622eeaed14Srobj 		uint8_t		is_ea_sub_id;
12632eeaed14Srobj 		uint8_t		is_ea_sub_instance;
12642eeaed14Srobj 	} is_ea_sub[4];
12652eeaed14Srobj } ipmi_sdr_device_relative_t;
12662eeaed14Srobj 
12672eeaed14Srobj /*
12689113a79cSeschrock  * Generic Device Locator Record.  See section 43.7.
12699113a79cSeschrock  */
12709113a79cSeschrock 
12719113a79cSeschrock #define	IPMI_SDR_TYPE_GENERIC_LOCATOR		0x10
12729113a79cSeschrock 
12739113a79cSeschrock typedef struct ipmi_sdr_generic_locator {
12749113a79cSeschrock 	/* RECORD KEY BYTES */
12752c32020fSeschrock 	DECL_BITFIELD2(
12762c32020fSeschrock 	    __reserved1		:1,
12772c32020fSeschrock 	    is_gl_accessaddr	:7);
12782c32020fSeschrock 	DECL_BITFIELD2(
12792c32020fSeschrock 	    is_gl_channel_msb	:1,
12802c32020fSeschrock 	    is_gl_slaveaddr	:7);
12812c32020fSeschrock 	DECL_BITFIELD3(
12822c32020fSeschrock 	    is_gl_bus		:3,
12832c32020fSeschrock 	    is_gl_lun		:2,
12842c32020fSeschrock 	    is_gl_channel	:3);
12859113a79cSeschrock 	/* RECORD BODY BYTES */
12862c32020fSeschrock 	DECL_BITFIELD2(
12872c32020fSeschrock 	    is_gl_span		:3,
12882c32020fSeschrock 	    __reserved2		:5);
12899113a79cSeschrock 	uint8_t		__reserved3;
12909113a79cSeschrock 	uint8_t		is_gl_type;
12919113a79cSeschrock 	uint8_t		is_gl_modifier;
12929113a79cSeschrock 	uint8_t		is_gl_entity;
12939113a79cSeschrock 	uint8_t		is_gl_instance;
12949113a79cSeschrock 	uint8_t		is_gl_oem;
12952eeaed14Srobj 	DECL_BITFIELD3(
12962eeaed14Srobj 	    is_gl_idlen		:5,
12972eeaed14Srobj 	    __reserved4		:1,
12982c32020fSeschrock 	    is_gl_idtype	:2);
12999113a79cSeschrock 	char		is_gl_idstring[1];
13009113a79cSeschrock } ipmi_sdr_generic_locator_t;
13019113a79cSeschrock 
13029113a79cSeschrock /*
13039113a79cSeschrock  * FRU Device Locator Record.  See section 43.8.
13049113a79cSeschrock  */
13059113a79cSeschrock 
13069113a79cSeschrock #define	IPMI_SDR_TYPE_FRU_LOCATOR		0x11
13079113a79cSeschrock 
13089113a79cSeschrock typedef struct ipmi_sdr_fru_locator {
13099113a79cSeschrock 	/* RECORD KEY BYTES */
13102c32020fSeschrock 	DECL_BITFIELD2(
13112c32020fSeschrock 	    __reserved1		:1,
13122c32020fSeschrock 	    is_fl_accessaddr	:7);
13139113a79cSeschrock 	union {
13149113a79cSeschrock 		struct {
13159113a79cSeschrock 			uint8_t	_is_fl_devid;
13169113a79cSeschrock 		} _logical;
13179113a79cSeschrock 		struct {
13182c32020fSeschrock 			DECL_BITFIELD2(
13192c32020fSeschrock 			    __reserved		:1,
13202c32020fSeschrock 			    _is_fl_slaveaddr	:7);
13219113a79cSeschrock 		} _nonintelligent;
13229113a79cSeschrock 	} _devid_or_slaveaddr;
13232c32020fSeschrock 	DECL_BITFIELD4(
13242c32020fSeschrock 	    is_fl_bus		:3,
13252c32020fSeschrock 	    is_fl_lun		:2,
13262c32020fSeschrock 	    __reserved2		:2,
13272c32020fSeschrock 	    is_fl_logical	:1);
13282c32020fSeschrock 	DECL_BITFIELD2(
13292c32020fSeschrock 	    __reserved3		:4,
13302c32020fSeschrock 	    is_fl_channel	:4);
13319113a79cSeschrock 	/* RECORD BODY BYTES */
13329113a79cSeschrock 	uint8_t		__reserved4;
13339113a79cSeschrock 	uint8_t		is_fl_type;
13349113a79cSeschrock 	uint8_t		is_fl_modifier;
13359113a79cSeschrock 	uint8_t		is_fl_entity;
13369113a79cSeschrock 	uint8_t		is_fl_instance;
13379113a79cSeschrock 	uint8_t		is_fl_oem;
13382eeaed14Srobj 	DECL_BITFIELD3(
13392eeaed14Srobj 	    is_fl_idlen		:5,
13402eeaed14Srobj 	    __reserved5		:1,
13412c32020fSeschrock 	    is_fl_idtype	:2);
13429113a79cSeschrock 	char		is_fl_idstring[1];
13439113a79cSeschrock } ipmi_sdr_fru_locator_t;
13449113a79cSeschrock 
13459113a79cSeschrock #define	is_fl_devid	_devid_or_slaveaddr._logical._is_fl_devid
13469113a79cSeschrock #define	is_fl_slaveaddr	_devid_or_slaveaddr._nonintelligent._is_fl_slaveaddr
13479113a79cSeschrock 
13489113a79cSeschrock /*
13492eeaed14Srobj  * Management Controller Device Locator Record.  See section 43.9
13509113a79cSeschrock  */
13512eeaed14Srobj 
13522eeaed14Srobj #define	IPMI_SDR_TYPE_MANAGEMENT_LOCATOR	0x12
13532eeaed14Srobj 
13542eeaed14Srobj typedef struct ipmi_sdr_management_locator {
13552eeaed14Srobj 	/* RECORD KEY BYTES */
13562eeaed14Srobj 	DECL_BITFIELD2(
13572eeaed14Srobj 	    __reserved1			:1,
13582eeaed14Srobj 	    is_ml_devaddr		:7);
13592eeaed14Srobj 	DECL_BITFIELD2(
13602eeaed14Srobj 	    is_ml_channel		:4,
13612eeaed14Srobj 	    __reserved2			:4);
13622eeaed14Srobj 	/* RECORD BODY BYTES */
13632eeaed14Srobj 	DECL_BITFIELD7(
13642eeaed14Srobj 	    is_ml_init_message		:2,
13652eeaed14Srobj 	    is_ml_init_log		:1,
13662eeaed14Srobj 	    is_ml_init_controller_log	:1,
13672eeaed14Srobj 	    __reserved3			:1,
13682eeaed14Srobj 	    is_ml_static		:1,
13692eeaed14Srobj 	    is_ml_acpi_device		:1,
13702eeaed14Srobj 	    is_ml_acpi_system		:1);
13712eeaed14Srobj 	DECL_BITFIELD8(
13722eeaed14Srobj 	    is_ml_supp_sensor		:1,
13732eeaed14Srobj 	    is_ml_supp_sdr		:1,
13742eeaed14Srobj 	    is_ml_supp_sel		:1,
13752eeaed14Srobj 	    is_ml_supp_fru		:1,
13762eeaed14Srobj 	    is_ml_supp_event_receiver	:1,
13772eeaed14Srobj 	    is_ml_supp_event_generator	:1,
13782eeaed14Srobj 	    is_ml_supp_bridge		:1,
13792eeaed14Srobj 	    is_ml_supp_chassis		:1);
13802eeaed14Srobj 	uint8_t		__reserved4;
13812eeaed14Srobj 	uint16_t	__reserved5;
13822eeaed14Srobj 	uint8_t		is_ml_entity_id;
13832eeaed14Srobj 	uint8_t		is_ml_entity_instance;
13842eeaed14Srobj 	uint8_t		is_ml_oem;
13852eeaed14Srobj 	DECL_BITFIELD3(
13862eeaed14Srobj 	    is_ml_idlen		:5,
13872eeaed14Srobj 	    __reserved6		:1,
13882eeaed14Srobj 	    is_ml_idtype	:2);
13892eeaed14Srobj 	char		is_ml_idstring[1];
13902eeaed14Srobj } ipmi_sdr_management_locator_t;
13912eeaed14Srobj 
13922eeaed14Srobj #define	IPMI_MESSAGE_INIT_ENABLE		0x0
13932eeaed14Srobj #define	IPMI_MESSAGE_INIT_DISABLE		0x1
13942eeaed14Srobj #define	IPMI_MESSAGE_INIT_NONE			0x2
13952eeaed14Srobj 
13962eeaed14Srobj /*
13972eeaed14Srobj  *  Management Controller Confirmation Record.  See section 43.10
13982eeaed14Srobj  */
13992eeaed14Srobj 
14009113a79cSeschrock #define	IPMI_SDR_TYPE_MANAGEMENT_CONFIRMATION	0x13
14012eeaed14Srobj 
14022eeaed14Srobj typedef struct ipmi_sdr_management_confirmation {
14032eeaed14Srobj 	/* RECORD KEY BYTES */
14042eeaed14Srobj 	DECL_BITFIELD2(
14052eeaed14Srobj 	    __reserved1		:1,
14062eeaed14Srobj 	    is_mc_slaveaddr	:7);
14072eeaed14Srobj 	uint8_t		is_mc_deviceid;
14082eeaed14Srobj 	DECL_BITFIELD2(
14092eeaed14Srobj 	    is_mc_dev_revision	:4,
14102eeaed14Srobj 	    is_mc_channel	:4);
14112eeaed14Srobj 	/* RECORD BODY BYTES */
14122eeaed14Srobj 	DECL_BITFIELD2(
14132eeaed14Srobj 	    is_mc_major_rev	:7,
14142eeaed14Srobj 	    __reserved2		:1);
14152eeaed14Srobj 	uint8_t		is_mc_minor_rev;
14162eeaed14Srobj 	uint8_t		is_mc_impi_ver;
14172eeaed14Srobj 	uint8_t		is_mc_manufacturer[3];
14182eeaed14Srobj 	uint16_t	is_mc_product;
14192eeaed14Srobj 	uint8_t		is_mc_guid[16];
14202eeaed14Srobj } ipmi_sdr_management_confirmation_t;
14212eeaed14Srobj 
14222eeaed14Srobj /*
14232eeaed14Srobj  * BMC Message Channel Info Record.  See esction 43.11.
14242eeaed14Srobj  */
14252eeaed14Srobj 
14269113a79cSeschrock #define	IPMI_SDR_TYPE_BMC_MESSAGE_CHANNEL	0x14
14272eeaed14Srobj 
14282eeaed14Srobj typedef struct ipmi_sdr_bmc_channel {
14292eeaed14Srobj 	/* RECORD BODY BYTES */
14302eeaed14Srobj 	struct {
14312eeaed14Srobj 		DECL_BITFIELD3(
14322eeaed14Srobj 		    is_bc_protocol	:4,
14332eeaed14Srobj 		    is_bc_receive_lun	:3,
14342eeaed14Srobj 		    is_bc_transmit	:1);
14352eeaed14Srobj 	} is_bc_channel[8];
14362eeaed14Srobj 	uint8_t		is_bc_interrupt_type;
14372eeaed14Srobj 	uint8_t		is_bc_buffer_type;
14382eeaed14Srobj 	uint8_t		__reserved;
14392eeaed14Srobj } ipmi_sdr_bmc_channel_t;
14402eeaed14Srobj 
14412eeaed14Srobj /*
14422eeaed14Srobj  * OEM Record.  See ction 43.12.
14432eeaed14Srobj  */
14442eeaed14Srobj 
14459113a79cSeschrock #define	IPMI_SDR_TYPE_OEM			0xC0
14469113a79cSeschrock 
14472eeaed14Srobj typedef struct ipmi_sdr_oem {
14482eeaed14Srobj 	uint8_t		is_oem_manufacturer[3];
14492eeaed14Srobj 	uint8_t		is_oem_data[1];
14502eeaed14Srobj } ipmi_sdr_oem_t;
14512eeaed14Srobj 
14522eeaed14Srobj /*
14532eeaed14Srobj  * Iterate over the SDR repository.  This function does the work of parsing the
14542eeaed14Srobj  * name when available, and keeping the repository in a consistent state.
14552eeaed14Srobj  */
14562eeaed14Srobj extern int ipmi_sdr_iter(ipmi_handle_t *,
14572eeaed14Srobj     int (*)(ipmi_handle_t *, const char *, ipmi_sdr_t *, void *), void *);
14582eeaed14Srobj 
14599113a79cSeschrock /*
14609113a79cSeschrock  * Lookup the given sensor type by name.  These functions automatically read in
14619113a79cSeschrock  * and cache the complete SDR repository.
14629113a79cSeschrock  */
14632eeaed14Srobj extern ipmi_sdr_t *ipmi_sdr_lookup(ipmi_handle_t *, const char *);
14649113a79cSeschrock extern ipmi_sdr_fru_locator_t *ipmi_sdr_lookup_fru(ipmi_handle_t *,
14659113a79cSeschrock     const char *);
14669113a79cSeschrock extern ipmi_sdr_generic_locator_t *ipmi_sdr_lookup_generic(ipmi_handle_t *,
14679113a79cSeschrock     const char *);
14682eeaed14Srobj extern ipmi_sdr_compact_sensor_t *ipmi_sdr_lookup_compact_sensor(
14692eeaed14Srobj     ipmi_handle_t *, const char *);
14702eeaed14Srobj extern ipmi_sdr_full_sensor_t *ipmi_sdr_lookup_full_sensor(
14712eeaed14Srobj     ipmi_handle_t *, const char *);
14722eeaed14Srobj 
14732eeaed14Srobj /*
14742eeaed14Srobj  * Entity ID codes.  See table 43.13.
14752eeaed14Srobj  */
14762eeaed14Srobj #define	IPMI_ET_UNSPECIFIED		0x00
14772eeaed14Srobj #define	IPMI_ET_OTHER			0x01
14782eeaed14Srobj #define	IPMI_ET_UNKNOWN			0x02
14792eeaed14Srobj #define	IPMI_ET_PROCESSOR		0x03
14802eeaed14Srobj #define	IPMI_ET_DISK			0x04
14812eeaed14Srobj #define	IPMI_ET_PERIPHERAL		0x05
14822eeaed14Srobj #define	IPMI_ET_MANAGEMENT_MODULE	0x06
14832eeaed14Srobj #define	IPMI_ET_MOTHERBOARD		0x07
14842eeaed14Srobj #define	IPMI_ET_MEMORY_MODULE		0x08
14852eeaed14Srobj #define	IPMI_ET_PROCESSOR_MODULE	0x09
14862eeaed14Srobj #define	IPMI_ET_PSU			0x0A
14872eeaed14Srobj #define	IPMI_ET_CARD			0x0B
14882eeaed14Srobj #define	IPMI_ET_FRONT_PANEL		0x0C
14892eeaed14Srobj #define	IPMI_ET_BACK_PANEL		0x0D
14902eeaed14Srobj #define	IPMI_ET_POWER_BOARD		0x0E
14912eeaed14Srobj #define	IPMI_ET_BACKPLANE		0x0F
14922eeaed14Srobj #define	IPMI_ET_EXPANSION_BOARD		0x10
14932eeaed14Srobj #define	IPMI_ET_OTHER_BOARD		0x11
14942eeaed14Srobj #define	IPMI_ET_PROCESSOR_BOARD		0x12
14952eeaed14Srobj #define	IPMI_ET_POWER_DOMAIN		0x13
14962eeaed14Srobj #define	IPMI_ET_POWER_CONVERTER		0x14
14972eeaed14Srobj #define	IPMI_ET_POWER_MANAGEMENT	0x15
14982eeaed14Srobj #define	IPMI_ET_BACK_CHASSIS		0x16
14992eeaed14Srobj #define	IPMI_ET_SYSTEM_CHASSIS		0x17
15002eeaed14Srobj #define	IPMI_ET_SUB_CHASSIS		0x18
15012eeaed14Srobj #define	IPMI_ET_OTHER_CHASSIS		0x19
15022eeaed14Srobj #define	IPMI_ET_DISK_BAY		0x1A
15032eeaed14Srobj #define	IPMI_ET_PERIPHERAL_BAY		0x1B
15042eeaed14Srobj #define	IPMI_ET_DEVICE_BAY		0x1C
15052eeaed14Srobj #define	IPMI_ET_FAN			0x1D
15062eeaed14Srobj #define	IPMI_ET_COOLING_DOMAIN		0x1E
15072eeaed14Srobj #define	IPMI_ET_CABLE			0x1F
15082eeaed14Srobj #define	IPMI_ET_MEMORY_DEVICE		0x20
15092eeaed14Srobj #define	IPMI_ET_MANAGEMENT_SOFTWARE	0x21
15102eeaed14Srobj #define	IPMI_ET_SYSTEM_FIRMWARE		0x22
15112eeaed14Srobj #define	IPMI_ET_OS			0x23
15122eeaed14Srobj #define	IPMI_ET_SYSTEM_BUS		0x24
15132eeaed14Srobj #define	IPMI_ET_GROUP			0x25
15142eeaed14Srobj #define	IPMI_ET_REMOTE			0x26
15152eeaed14Srobj #define	IPMI_ET_ENVIRONMENT		0x27
15162eeaed14Srobj #define	IPMI_ET_BATTERY			0x28
15172eeaed14Srobj #define	IPMI_ET_BLADE			0x29
15182eeaed14Srobj #define	IPMI_ET_SWITCH			0x2A
15192eeaed14Srobj #define	IPMI_ET_PROCMEM_MODULE		0x2B
15202eeaed14Srobj #define	IPMI_ET_IO_MODULE		0x2C
15212eeaed14Srobj #define	IPMI_ET_PROCIO_MODULE		0x2D
15222eeaed14Srobj #define	IPMI_ET_CONTROLLER_FIRMWARE	0x2E
15232eeaed14Srobj #define	IPMI_ET_CHANNEL			0x2F
15242eeaed14Srobj #define	IPMI_ET_PCI			0x30
15252eeaed14Srobj #define	IPMI_ET_PCIE			0x31
15262eeaed14Srobj #define	IPMI_ET_SCSI			0x32
15272eeaed14Srobj #define	IPMI_ET_SATA_SAS		0x33
15282eeaed14Srobj #define	IPMI_ET_FSB			0x34
15292eeaed14Srobj #define	IPMI_ET_RTC			0x35
15309113a79cSeschrock 
15319113a79cSeschrock /*
15329113a79cSeschrock  * Get Sensor Reading.  See section 35.14.
15339113a79cSeschrock  */
15349113a79cSeschrock 
15359113a79cSeschrock #define	IPMI_CMD_GET_SENSOR_READING	0x2d
15369113a79cSeschrock 
15379113a79cSeschrock typedef struct ipmi_sensor_reading {
15389113a79cSeschrock 	uint8_t		isr_reading;
15392c32020fSeschrock 	DECL_BITFIELD4(
15402c32020fSeschrock 	    __reserved1			:5,
15412c32020fSeschrock 	    isr_state_unavailable	:1,
15422eeaed14Srobj 	    isr_scanning_enabled	:1,
15432eeaed14Srobj 	    isr_event_enabled		:1);
15449113a79cSeschrock 	uint16_t	isr_state;
15459113a79cSeschrock } ipmi_sensor_reading_t;
15469113a79cSeschrock 
15472eeaed14Srobj #define	IPMI_SENSOR_THRESHOLD_LOWER_NONCRIT		0x0001
15482eeaed14Srobj #define	IPMI_SENSOR_THRESHOLD_LOWER_CRIT		0x0002
15492eeaed14Srobj #define	IPMI_SENSOR_THRESHOLD_LOWER_NONRECOV		0x0004
15502eeaed14Srobj #define	IPMI_SENSOR_THRESHOLD_UPPER_NONCRIT		0x0008
15512eeaed14Srobj #define	IPMI_SENSOR_THRESHOLD_UPPER_CRIT		0x0010
15522eeaed14Srobj #define	IPMI_SENSOR_THRESHOLD_UPPER_NONRECOV		0x0020
15532eeaed14Srobj 
15549113a79cSeschrock extern ipmi_sensor_reading_t *ipmi_get_sensor_reading(ipmi_handle_t *, uint8_t);
1555825ba0f2Srobj extern int ipmi_sdr_conv_reading(ipmi_sdr_full_sensor_t *, uint8_t,
1556825ba0f2Srobj     double *);
15579113a79cSeschrock /*
15589113a79cSeschrock  * Set Sensor Reading.  See section 35.14.
15599113a79cSeschrock  */
15609113a79cSeschrock #define	IPMI_CMD_SET_SENSOR_READING	0x30
15619113a79cSeschrock 
15629113a79cSeschrock #define	IPMI_SENSOR_OP_CLEAR	0x3	/* clear '0' bits */
15639113a79cSeschrock #define	IPMI_SENSOR_OP_SET	0x2	/* set '1' bits */
15649113a79cSeschrock #define	IPMI_SENSOR_OP_EXACT	0x1	/* set bits exactly */
15659113a79cSeschrock 
15669113a79cSeschrock typedef struct ipmi_set_sensor_reading {
15679113a79cSeschrock 	uint8_t		iss_id;
15682c32020fSeschrock 	DECL_BITFIELD5(
15692c32020fSeschrock 	    iss_set_reading		:1,
15702c32020fSeschrock 	    __reserved			:1,
15712c32020fSeschrock 	    iss_deassrt_op		:2,
15722c32020fSeschrock 	    iss_assert_op		:2,
15732c32020fSeschrock 	    iss_data_bytes		:2);
15749113a79cSeschrock 	uint8_t		iss_sensor_reading;
15759113a79cSeschrock 	uint16_t	iss_assert_state;	/* optional */
15769113a79cSeschrock 	uint16_t	iss_deassert_state;	/* optional */
15779113a79cSeschrock 	uint8_t		iss_event_data1;	/* optional */
15789113a79cSeschrock 	uint8_t		iss_event_data2;	/* optional */
15799113a79cSeschrock 	uint8_t		iss_event_data3;	/* optional */
15809113a79cSeschrock } ipmi_set_sensor_reading_t;
15819113a79cSeschrock 
15829113a79cSeschrock extern int ipmi_set_sensor_reading(ipmi_handle_t *,
15839113a79cSeschrock     ipmi_set_sensor_reading_t *);
15849113a79cSeschrock 
15859113a79cSeschrock /*
15864557a2a1Srobj  * These IPMI message id/opcodes are documented in Appendix G in the IPMI spec.
15874557a2a1Srobj  *
15884557a2a1Srobj  * Payloads for these two commands are described in Sections 34.1 and 34.2 of
15894557a2a1Srobj  * the spec, respectively.
15904557a2a1Srobj  */
15914557a2a1Srobj #define	IPMI_CMD_GET_FRU_INV_AREA	0x10
15924557a2a1Srobj #define	IPMI_CMD_READ_FRU_DATA		0x11
15934557a2a1Srobj 
15944557a2a1Srobj /*
15954557a2a1Srobj  * Structs to hold the FRU Common Header and the FRU Product Info Area, as
15964557a2a1Srobj  * described in the IPMI Platform Management FRU Information Storage
15974557a2a1Srobj  * Definition (v1.1).
15984557a2a1Srobj  */
15994557a2a1Srobj typedef struct ipmi_fru_hdr
16004557a2a1Srobj {
16014557a2a1Srobj 	uint8_t		ifh_format;
16024557a2a1Srobj 	uint8_t		ifh_int_use_off;
16034557a2a1Srobj 	uint8_t		ifh_chassis_info_off;
16044557a2a1Srobj 	uint8_t		ifh_board_info_off;
16054557a2a1Srobj 	uint8_t		ifh_product_info_off;
16064557a2a1Srobj 	uint8_t		ifh_multi_rec_off;
16074557a2a1Srobj 	uint8_t		ifh_pad;
16084557a2a1Srobj 	uint8_t		ifh_chksum;
16094557a2a1Srobj } ipmi_fru_hdr_t;
16104557a2a1Srobj 
16114557a2a1Srobj /*
16124557a2a1Srobj  * Because only 6 bits are used to specify the length of each field in the FRU
16134557a2a1Srobj  * product and board info areas, the biggest string we would ever need to hold
16144557a2a1Srobj  * would be 63 chars plus a NULL.
16154557a2a1Srobj  */
16164557a2a1Srobj #define	FRU_INFO_MAXLEN	64
16174557a2a1Srobj 
16184557a2a1Srobj typedef struct ipmi_fru_brd_info
16194557a2a1Srobj {
16204557a2a1Srobj 	char	ifbi_manuf_date[3];
16214557a2a1Srobj 	char	ifbi_manuf_name[FRU_INFO_MAXLEN];
16224557a2a1Srobj 	char	ifbi_board_name[FRU_INFO_MAXLEN];
16234557a2a1Srobj 	char	ifbi_product_serial[FRU_INFO_MAXLEN];
16244557a2a1Srobj 	char	ifbi_part_number[FRU_INFO_MAXLEN];
16254557a2a1Srobj } ipmi_fru_brd_info_t;
16264557a2a1Srobj 
16274557a2a1Srobj typedef struct ipmi_fru_prod_info
16284557a2a1Srobj {
16294557a2a1Srobj 	char	ifpi_manuf_name[FRU_INFO_MAXLEN];
16304557a2a1Srobj 	char	ifpi_product_name[FRU_INFO_MAXLEN];
16314557a2a1Srobj 	char	ifpi_part_number[FRU_INFO_MAXLEN];
16324557a2a1Srobj 	char	ifpi_product_version[FRU_INFO_MAXLEN];
16334557a2a1Srobj 	char	ifpi_product_serial[FRU_INFO_MAXLEN];
16344557a2a1Srobj 	char	ifpi_asset_tag[FRU_INFO_MAXLEN];
16354557a2a1Srobj } ipmi_fru_prod_info_t;
16364557a2a1Srobj 
16372eeaed14Srobj extern int ipmi_fru_read(ipmi_handle_t *, ipmi_sdr_fru_locator_t *, char **);
16382eeaed14Srobj extern int ipmi_fru_parse_board(ipmi_handle_t *, char *, ipmi_fru_brd_info_t *);
16392eeaed14Srobj extern int ipmi_fru_parse_product(ipmi_handle_t *, char *,
16402eeaed14Srobj     ipmi_fru_prod_info_t *);
16412eeaed14Srobj 
16422eeaed14Srobj /*
16432eeaed14Srobj  * Routines to convert from entity and sensors defines into text strings.
16442eeaed14Srobj  */
16452eeaed14Srobj void ipmi_entity_name(uint8_t, char *, size_t);
16462eeaed14Srobj void ipmi_sensor_type_name(uint8_t, char *, size_t);
1647825ba0f2Srobj void ipmi_sensor_units_name(uint8_t, char *, size_t);
16482eeaed14Srobj void ipmi_sensor_reading_name(uint8_t, uint8_t, char *, size_t);
16492eeaed14Srobj 
16502eeaed14Srobj /*
16512eeaed14Srobj  * Entity management.  IPMI has a notion of 'entities', but these are not
16522eeaed14Srobj  * directly accessible from any commands.  Instead, their existence is inferred
16532eeaed14Srobj  * from examining the SDR repository.  Since this is rather unwieldy, and
16542eeaed14Srobj  * iterating over entities is a common operation, libipmi provides an entity
16552eeaed14Srobj  * abstraction that hides the implementation details.  This handles entity
16562eeaed14Srobj  * groupings as well as SDR associations.
16572eeaed14Srobj  */
16582eeaed14Srobj typedef struct ipmi_entity {
16592eeaed14Srobj 	uint8_t		ie_type;
16602eeaed14Srobj 	uint8_t		ie_instance;
16612eeaed14Srobj 	uint8_t		ie_children;
16622eeaed14Srobj 	boolean_t	ie_logical;
16632eeaed14Srobj } ipmi_entity_t;
16642eeaed14Srobj 
16652eeaed14Srobj extern int ipmi_entity_iter(ipmi_handle_t *, int (*)(ipmi_handle_t *,
16662eeaed14Srobj     ipmi_entity_t *, void *), void *);
16672eeaed14Srobj extern int ipmi_entity_iter_sdr(ipmi_handle_t *, ipmi_entity_t *,
16682eeaed14Srobj     int (*)(ipmi_handle_t *, ipmi_entity_t *, const char *, ipmi_sdr_t *,
16692eeaed14Srobj     void *), void *);
16702eeaed14Srobj extern int ipmi_entity_iter_children(ipmi_handle_t *, ipmi_entity_t *,
16712eeaed14Srobj     int (*)(ipmi_handle_t *, ipmi_entity_t *, void *), void *);
16722eeaed14Srobj extern ipmi_entity_t *ipmi_entity_lookup(ipmi_handle_t *, uint8_t,
16732eeaed14Srobj     uint8_t);
16742eeaed14Srobj extern ipmi_entity_t *ipmi_entity_lookup_sdr(ipmi_handle_t *, const char *);
16752eeaed14Srobj extern ipmi_entity_t *ipmi_entity_parent(ipmi_handle_t *, ipmi_entity_t *);
16762eeaed14Srobj extern int ipmi_entity_present(ipmi_handle_t *, ipmi_entity_t *, boolean_t *);
16772eeaed14Srobj extern int ipmi_entity_present_sdr(ipmi_handle_t *, ipmi_sdr_t *, boolean_t *);
16784557a2a1Srobj 
16794557a2a1Srobj /*
16801af98250Seschrock  * User management.  The raw functions are private to libipmi, and only the
16811af98250Seschrock  * higher level abstraction (ipmi_user_t) is exported to consumers of the
16821af98250Seschrock  * library.
16831af98250Seschrock  */
16841af98250Seschrock 
16851af98250Seschrock #define	IPMI_USER_PRIV_CALLBACK		0x1
16861af98250Seschrock #define	IPMI_USER_PRIV_USER		0x2
16871af98250Seschrock #define	IPMI_USER_PRIV_OPERATOR		0x3
16881af98250Seschrock #define	IPMI_USER_PRIV_ADMIN		0x4
16891af98250Seschrock #define	IPMI_USER_PRIV_OEM		0x5
16901af98250Seschrock #define	IPMI_USER_PRIV_NONE		0xf
16911af98250Seschrock 
16921af98250Seschrock typedef struct ipmi_user {
16931af98250Seschrock 	uint8_t		iu_uid;
16941af98250Seschrock 	char		*iu_name;
16951af98250Seschrock 	boolean_t	iu_enabled;
16961af98250Seschrock 	boolean_t	iu_ipmi_msg_enable;
16971af98250Seschrock 	boolean_t	iu_link_auth_enable;
16981af98250Seschrock 	uint8_t		iu_priv;
16991af98250Seschrock } ipmi_user_t;
17001af98250Seschrock 
17011af98250Seschrock extern int ipmi_user_iter(ipmi_handle_t *,
17021af98250Seschrock     int (*)(ipmi_user_t *, void *), void *);
17031af98250Seschrock extern ipmi_user_t *ipmi_user_lookup_name(ipmi_handle_t *, const char *);
17041af98250Seschrock extern ipmi_user_t *ipmi_user_lookup_id(ipmi_handle_t *, uint8_t);
17051af98250Seschrock extern int ipmi_user_set_password(ipmi_handle_t *, uint8_t, const char *);
17061af98250Seschrock 
17071af98250Seschrock /*
17089113a79cSeschrock  * The remaining functions are private to the implementation of the Sun ILOM
17099113a79cSeschrock  * service processor.  These function first check the manufacturer from the IPMI
17109113a79cSeschrock  * device ID, and will return EIPMI_NOT_SUPPORTED if attempted for non-Sun
17119113a79cSeschrock  * devices.
17129113a79cSeschrock  */
17139113a79cSeschrock 
17149113a79cSeschrock /*
17159113a79cSeschrock  * Sun OEM LED requests.
17169113a79cSeschrock  */
17179113a79cSeschrock 
17189113a79cSeschrock #define	IPMI_SUNOEM_LED_MODE_OFF	0
17199113a79cSeschrock #define	IPMI_SUNOEM_LED_MODE_ON		1
17209113a79cSeschrock #define	IPMI_SUNOEM_LED_MODE_STANDBY	2
17219113a79cSeschrock #define	IPMI_SUNOEM_LED_MODE_SLOW	3
17229113a79cSeschrock #define	IPMI_SUNOEM_LED_MODE_FAST	4
17239113a79cSeschrock 
17249113a79cSeschrock /*
17259113a79cSeschrock  * These functions take a SDR record and construct the appropriate form of the
17269113a79cSeschrock  * above commands.
17279113a79cSeschrock  */
17289113a79cSeschrock extern int ipmi_sunoem_led_set(ipmi_handle_t *,
17299113a79cSeschrock     ipmi_sdr_generic_locator_t *, uint8_t);
17309113a79cSeschrock extern int ipmi_sunoem_led_get(ipmi_handle_t *,
17319113a79cSeschrock     ipmi_sdr_generic_locator_t *, uint8_t *);
17329113a79cSeschrock 
17339113a79cSeschrock /*
17349113a79cSeschrock  * Sun OEM uptime.  Note that the underlying command returns the uptime in big
17359113a79cSeschrock  * endian form.  This wrapper automatically converts to the appropriate native
17369113a79cSeschrock  * form.
17379113a79cSeschrock  */
17389113a79cSeschrock 
17399113a79cSeschrock #define	IPMI_CMD_SUNOEM_UPTIME		0x08
17409113a79cSeschrock 
17419113a79cSeschrock extern int ipmi_sunoem_uptime(ipmi_handle_t *, uint32_t *, uint32_t *);
17429113a79cSeschrock 
17439113a79cSeschrock /*
17449113a79cSeschrock  * Sun OEM FRU update.  The FRU information is managed through a generic
17459113a79cSeschrock  * identifier, and then a type-specific data portion.  The wrapper function will
17469113a79cSeschrock  * automatically fill in the data length field according to which type is
17479113a79cSeschrock  * specified.
17489113a79cSeschrock  */
17499113a79cSeschrock 
17509113a79cSeschrock #define	IPMI_CMD_SUNOEM_FRU_UPDATE	0x16
17519113a79cSeschrock 
17529113a79cSeschrock #define	IPMI_SUNOEM_FRU_DIMM	0x00
17539113a79cSeschrock #define	IPMI_SUNOEM_FRU_CPU	0x01
17549113a79cSeschrock #define	IPMI_SUNOEM_FRU_BIOS	0x02
17559113a79cSeschrock #define	IPMI_SUNOEM_FRU_DISK	0x03
17569113a79cSeschrock 
17579113a79cSeschrock typedef struct ipmi_sunoem_fru {
17589113a79cSeschrock 	uint8_t				isf_type;
17599113a79cSeschrock 	uint8_t				isf_id;
17609113a79cSeschrock 	uint8_t				isf_datalen;
17619113a79cSeschrock 	union {
17629113a79cSeschrock 		struct {
17639113a79cSeschrock 			uint8_t		isf_data[128];
17649113a79cSeschrock 		} dimm;
17659113a79cSeschrock 		struct {
17669113a79cSeschrock 			uint32_t	isf_thermtrip;
17679113a79cSeschrock 			uint32_t	isf_eax;
17689113a79cSeschrock 			char		isf_product[48];
17699113a79cSeschrock 		} cpu;
17709113a79cSeschrock 		struct {
17719113a79cSeschrock 			char		isf_part[16];
17729113a79cSeschrock 			char		isf_version[16];
17739113a79cSeschrock 		} bios;
17749113a79cSeschrock 		struct {
17759113a79cSeschrock 			char		isf_manufacturer[16];
17769113a79cSeschrock 			char		isf_model[28];
17779113a79cSeschrock 			char		isf_serial[20];
17789113a79cSeschrock 			char		isf_version[8];
17799113a79cSeschrock 			char		isf_capacity[16];
17809113a79cSeschrock 		} disk;
17819113a79cSeschrock 	} isf_data;
17829113a79cSeschrock } ipmi_sunoem_fru_t;
17839113a79cSeschrock 
17849113a79cSeschrock int ipmi_sunoem_update_fru(ipmi_handle_t *, ipmi_sunoem_fru_t *);
17859113a79cSeschrock 
17869113a79cSeschrock #pragma pack()
17879113a79cSeschrock 
17889113a79cSeschrock #ifdef	__cplusplus
17899113a79cSeschrock }
17909113a79cSeschrock #endif
17919113a79cSeschrock 
17929113a79cSeschrock #endif	/* _LIBIPMI_H */
1793