1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */ 27 /* All Rights Reserved */ 28 29 /* 30 * Portions of this source code were derived from Berkeley 4.3 BSD 31 * under license from the Regents of the University of California. 32 */ 33 34 #pragma ident "%Z%%M% %I% %E% SMI" 35 36 /* 37 * UNIX machine dependent virtual memory support. 38 */ 39 40 #include <sys/vm.h> 41 #include <sys/exec.h> 42 #include <sys/cmn_err.h> 43 #include <sys/cpu_module.h> 44 #include <sys/cpu.h> 45 #include <sys/elf_SPARC.h> 46 #include <sys/archsystm.h> 47 #include <vm/hat_sfmmu.h> 48 #include <sys/memnode.h> 49 #include <sys/mem_cage.h> 50 #include <vm/vm_dep.h> 51 #include <sys/error.h> 52 #include <sys/machsystm.h> 53 #include <vm/seg_kmem.h> 54 #include <sys/stack.h> 55 #include <sys/atomic.h> 56 57 uint_t page_colors = 0; 58 uint_t page_colors_mask = 0; 59 uint_t page_coloring_shift = 0; 60 int consistent_coloring; 61 62 uint_t mmu_page_sizes = MMU_PAGE_SIZES; 63 uint_t max_mmu_page_sizes = MMU_PAGE_SIZES; 64 uint_t mmu_hashcnt = MAX_HASHCNT; 65 uint_t max_mmu_hashcnt = MAX_HASHCNT; 66 size_t mmu_ism_pagesize = DEFAULT_ISM_PAGESIZE; 67 68 /* 69 * A bitmask of the page sizes supported by hardware based upon szc. 70 * The base pagesize (p_szc == 0) must always be supported by the hardware. 71 */ 72 int mmu_exported_pagesize_mask; 73 uint_t mmu_exported_page_sizes; 74 75 uint_t szc_2_userszc[MMU_PAGE_SIZES]; 76 uint_t userszc_2_szc[MMU_PAGE_SIZES]; 77 78 extern uint_t vac_colors_mask; 79 extern int vac_shift; 80 81 hw_pagesize_t hw_page_array[] = { 82 {MMU_PAGESIZE, MMU_PAGESHIFT, 0, MMU_PAGESIZE >> MMU_PAGESHIFT}, 83 {MMU_PAGESIZE64K, MMU_PAGESHIFT64K, 0, 84 MMU_PAGESIZE64K >> MMU_PAGESHIFT}, 85 {MMU_PAGESIZE512K, MMU_PAGESHIFT512K, 0, 86 MMU_PAGESIZE512K >> MMU_PAGESHIFT}, 87 {MMU_PAGESIZE4M, MMU_PAGESHIFT4M, 0, MMU_PAGESIZE4M >> MMU_PAGESHIFT}, 88 {MMU_PAGESIZE32M, MMU_PAGESHIFT32M, 0, 89 MMU_PAGESIZE32M >> MMU_PAGESHIFT}, 90 {MMU_PAGESIZE256M, MMU_PAGESHIFT256M, 0, 91 MMU_PAGESIZE256M >> MMU_PAGESHIFT}, 92 {0, 0, 0, 0} 93 }; 94 95 /* 96 * Maximum page size used to map 64-bit memory segment kmem64_base..kmem64_end 97 */ 98 int max_bootlp_tteszc = TTE256M; 99 100 /* 101 * Maximum and default segment size tunables for user heap, stack, private 102 * and shared anonymous memory, and user text and initialized data. 103 */ 104 size_t max_uheap_lpsize = MMU_PAGESIZE64K; 105 size_t default_uheap_lpsize = MMU_PAGESIZE64K; 106 size_t max_ustack_lpsize = MMU_PAGESIZE64K; 107 size_t default_ustack_lpsize = MMU_PAGESIZE64K; 108 size_t max_privmap_lpsize = MMU_PAGESIZE64K; 109 size_t max_uidata_lpsize = MMU_PAGESIZE64K; 110 size_t max_utext_lpsize = MMU_PAGESIZE4M; 111 size_t max_shm_lpsize = MMU_PAGESIZE4M; 112 113 /* 114 * Contiguous memory allocator data structures and variables. 115 * 116 * The sun4v kernel must provide a means to allocate physically 117 * contiguous, non-relocatable memory. The contig_mem_arena 118 * and contig_mem_slab_arena exist for this purpose. Allocations 119 * that require physically contiguous non-relocatable memory should 120 * be made using contig_mem_alloc() or contig_mem_alloc_align() 121 * which return memory from contig_mem_arena or contig_mem_reloc_arena. 122 * These arenas import memory from the contig_mem_slab_arena one 123 * contiguous chunk at a time. 124 * 125 * When importing slabs, an attempt is made to allocate a large page 126 * to use as backing. As a result of the non-relocatable requirement, 127 * slabs are allocated from the kernel cage freelists. If the cage does 128 * not contain any free contiguous chunks large enough to satisfy the 129 * slab allocation, the slab size will be downsized and the operation 130 * retried. Large slab sizes are tried first to minimize cage 131 * fragmentation. If the slab allocation is unsuccessful still, the slab 132 * is allocated from outside the kernel cage. This is undesirable because, 133 * until slabs are freed, it results in non-relocatable chunks scattered 134 * throughout physical memory. 135 * 136 * Allocations from the contig_mem_arena are backed by slabs from the 137 * cage. Allocations from the contig_mem_reloc_arena are backed by 138 * slabs allocated outside the cage. Slabs are left share locked while 139 * in use to prevent non-cage slabs from being relocated. 140 * 141 * Since there is no guarantee that large pages will be available in 142 * the kernel cage, contiguous memory is reserved and added to the 143 * contig_mem_arena at boot time, making it available for later 144 * contiguous memory allocations. This reserve will be used to satisfy 145 * contig_mem allocations first and it is only when the reserve is 146 * completely allocated that new slabs will need to be imported. 147 */ 148 static vmem_t *contig_mem_slab_arena; 149 static vmem_t *contig_mem_arena; 150 static vmem_t *contig_mem_reloc_arena; 151 static kmutex_t contig_mem_lock; 152 #define CONTIG_MEM_ARENA_QUANTUM 64 153 #define CONTIG_MEM_SLAB_ARENA_QUANTUM MMU_PAGESIZE64K 154 155 /* contig_mem_arena import slab sizes, in decreasing size order */ 156 static size_t contig_mem_import_sizes[] = { 157 MMU_PAGESIZE4M, 158 MMU_PAGESIZE512K, 159 MMU_PAGESIZE64K 160 }; 161 #define NUM_IMPORT_SIZES \ 162 (sizeof (contig_mem_import_sizes) / sizeof (size_t)) 163 static size_t contig_mem_import_size_max = MMU_PAGESIZE4M; 164 size_t contig_mem_slab_size = MMU_PAGESIZE4M; 165 166 /* Boot-time allocated buffer to pre-populate the contig_mem_arena */ 167 static size_t prealloc_size; 168 static void *prealloc_buf; 169 170 /* 171 * map_addr_proc() is the routine called when the system is to 172 * choose an address for the user. We will pick an address 173 * range which is just below the current stack limit. The 174 * algorithm used for cache consistency on machines with virtual 175 * address caches is such that offset 0 in the vnode is always 176 * on a shm_alignment'ed aligned address. Unfortunately, this 177 * means that vnodes which are demand paged will not be mapped 178 * cache consistently with the executable images. When the 179 * cache alignment for a given object is inconsistent, the 180 * lower level code must manage the translations so that this 181 * is not seen here (at the cost of efficiency, of course). 182 * 183 * addrp is a value/result parameter. 184 * On input it is a hint from the user to be used in a completely 185 * machine dependent fashion. For MAP_ALIGN, addrp contains the 186 * minimal alignment. 187 * 188 * On output it is NULL if no address can be found in the current 189 * processes address space or else an address that is currently 190 * not mapped for len bytes with a page of red zone on either side. 191 * If vacalign is true, then the selected address will obey the alignment 192 * constraints of a vac machine based on the given off value. 193 */ 194 /*ARGSUSED3*/ 195 void 196 map_addr_proc(caddr_t *addrp, size_t len, offset_t off, int vacalign, 197 caddr_t userlimit, struct proc *p, uint_t flags) 198 { 199 struct as *as = p->p_as; 200 caddr_t addr; 201 caddr_t base; 202 size_t slen; 203 uintptr_t align_amount; 204 int allow_largepage_alignment = 1; 205 206 base = p->p_brkbase; 207 if (userlimit < as->a_userlimit) { 208 /* 209 * This happens when a program wants to map something in 210 * a range that's accessible to a program in a smaller 211 * address space. For example, a 64-bit program might 212 * be calling mmap32(2) to guarantee that the returned 213 * address is below 4Gbytes. 214 */ 215 ASSERT(userlimit > base); 216 slen = userlimit - base; 217 } else { 218 slen = p->p_usrstack - base - (((size_t)rctl_enforced_value( 219 rctlproc_legacy[RLIMIT_STACK], p->p_rctls, p) + PAGEOFFSET) 220 & PAGEMASK); 221 } 222 len = (len + PAGEOFFSET) & PAGEMASK; 223 224 /* 225 * Redzone for each side of the request. This is done to leave 226 * one page unmapped between segments. This is not required, but 227 * it's useful for the user because if their program strays across 228 * a segment boundary, it will catch a fault immediately making 229 * debugging a little easier. 230 */ 231 len += (2 * PAGESIZE); 232 233 /* 234 * If the request is larger than the size of a particular 235 * mmu level, then we use that level to map the request. 236 * But this requires that both the virtual and the physical 237 * addresses be aligned with respect to that level, so we 238 * do the virtual bit of nastiness here. 239 * 240 * For 32-bit processes, only those which have specified 241 * MAP_ALIGN or an addr will be aligned on a page size > 4MB. Otherwise 242 * we can potentially waste up to 256MB of the 4G process address 243 * space just for alignment. 244 * 245 * XXXQ Should iterate trough hw_page_array here to catch 246 * all supported pagesizes 247 */ 248 if (p->p_model == DATAMODEL_ILP32 && ((flags & MAP_ALIGN) == 0 || 249 ((uintptr_t)*addrp) != 0)) { 250 allow_largepage_alignment = 0; 251 } 252 if ((mmu_page_sizes == max_mmu_page_sizes) && 253 allow_largepage_alignment && 254 (len >= MMU_PAGESIZE256M)) { /* 256MB mappings */ 255 align_amount = MMU_PAGESIZE256M; 256 } else if ((mmu_page_sizes == max_mmu_page_sizes) && 257 allow_largepage_alignment && 258 (len >= MMU_PAGESIZE32M)) { /* 32MB mappings */ 259 align_amount = MMU_PAGESIZE32M; 260 } else if (len >= MMU_PAGESIZE4M) { /* 4MB mappings */ 261 align_amount = MMU_PAGESIZE4M; 262 } else if (len >= MMU_PAGESIZE512K) { /* 512KB mappings */ 263 align_amount = MMU_PAGESIZE512K; 264 } else if (len >= MMU_PAGESIZE64K) { /* 64KB mappings */ 265 align_amount = MMU_PAGESIZE64K; 266 } else { 267 /* 268 * Align virtual addresses on a 64K boundary to ensure 269 * that ELF shared libraries are mapped with the appropriate 270 * alignment constraints by the run-time linker. 271 */ 272 align_amount = ELF_SPARC_MAXPGSZ; 273 if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp != 0) && 274 ((uintptr_t)*addrp < align_amount)) 275 align_amount = (uintptr_t)*addrp; 276 } 277 278 /* 279 * 64-bit processes require 1024K alignment of ELF shared libraries. 280 */ 281 if (p->p_model == DATAMODEL_LP64) 282 align_amount = MAX(align_amount, ELF_SPARCV9_MAXPGSZ); 283 #ifdef VAC 284 if (vac && vacalign && (align_amount < shm_alignment)) 285 align_amount = shm_alignment; 286 #endif 287 288 if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp > align_amount)) { 289 align_amount = (uintptr_t)*addrp; 290 } 291 len += align_amount; 292 293 /* 294 * Look for a large enough hole starting below the stack limit. 295 * After finding it, use the upper part. Addition of PAGESIZE is 296 * for the redzone as described above. 297 */ 298 as_purge(as); 299 if (as_gap(as, len, &base, &slen, AH_HI, NULL) == 0) { 300 caddr_t as_addr; 301 302 addr = base + slen - len + PAGESIZE; 303 as_addr = addr; 304 /* 305 * Round address DOWN to the alignment amount, 306 * add the offset, and if this address is less 307 * than the original address, add alignment amount. 308 */ 309 addr = (caddr_t)((uintptr_t)addr & (~(align_amount - 1l))); 310 addr += (long)(off & (align_amount - 1l)); 311 if (addr < as_addr) { 312 addr += align_amount; 313 } 314 315 ASSERT(addr <= (as_addr + align_amount)); 316 ASSERT(((uintptr_t)addr & (align_amount - 1l)) == 317 ((uintptr_t)(off & (align_amount - 1l)))); 318 *addrp = addr; 319 320 } else { 321 *addrp = NULL; /* no more virtual space */ 322 } 323 } 324 325 /* 326 * Platform-dependent page scrub call. 327 * We call hypervisor to scrub the page. 328 */ 329 void 330 pagescrub(page_t *pp, uint_t off, uint_t len) 331 { 332 uint64_t pa, length; 333 334 pa = (uint64_t)(pp->p_pagenum << MMU_PAGESHIFT + off); 335 length = (uint64_t)len; 336 337 (void) mem_scrub(pa, length); 338 } 339 340 void 341 sync_data_memory(caddr_t va, size_t len) 342 { 343 /* Call memory sync function */ 344 (void) mem_sync(va, len); 345 } 346 347 size_t 348 mmu_get_kernel_lpsize(size_t lpsize) 349 { 350 extern int mmu_exported_pagesize_mask; 351 uint_t tte; 352 353 if (lpsize == 0) { 354 /* no setting for segkmem_lpsize in /etc/system: use default */ 355 if (mmu_exported_pagesize_mask & (1 << TTE256M)) { 356 lpsize = MMU_PAGESIZE256M; 357 } else if (mmu_exported_pagesize_mask & (1 << TTE4M)) { 358 lpsize = MMU_PAGESIZE4M; 359 } else if (mmu_exported_pagesize_mask & (1 << TTE64K)) { 360 lpsize = MMU_PAGESIZE64K; 361 } else { 362 lpsize = MMU_PAGESIZE; 363 } 364 365 return (lpsize); 366 } 367 368 for (tte = TTE8K; tte <= TTE256M; tte++) { 369 370 if ((mmu_exported_pagesize_mask & (1 << tte)) == 0) 371 continue; 372 373 if (lpsize == TTEBYTES(tte)) 374 return (lpsize); 375 } 376 377 lpsize = TTEBYTES(TTE8K); 378 return (lpsize); 379 } 380 381 void 382 mmu_init_kcontext() 383 { 384 } 385 386 /*ARGSUSED*/ 387 void 388 mmu_init_kernel_pgsz(struct hat *hat) 389 { 390 } 391 392 static void * 393 contig_mem_span_alloc(vmem_t *vmp, size_t size, int vmflag) 394 { 395 page_t *ppl; 396 page_t *rootpp; 397 caddr_t addr = NULL; 398 pgcnt_t npages = btopr(size); 399 page_t **ppa; 400 int pgflags; 401 spgcnt_t i = 0; 402 403 404 ASSERT(size <= contig_mem_import_size_max); 405 ASSERT((size & (size - 1)) == 0); 406 407 if ((addr = vmem_xalloc(vmp, size, size, 0, 0, 408 NULL, NULL, vmflag)) == NULL) { 409 return (NULL); 410 } 411 412 /* The address should be slab-size aligned. */ 413 ASSERT(((uintptr_t)addr & (size - 1)) == 0); 414 415 if (page_resv(npages, vmflag & VM_KMFLAGS) == 0) { 416 vmem_xfree(vmp, addr, size); 417 return (NULL); 418 } 419 420 pgflags = PG_EXCL; 421 if (vmflag & VM_NORELOC) 422 pgflags |= PG_NORELOC; 423 424 ppl = page_create_va_large(&kvp, (u_offset_t)(uintptr_t)addr, size, 425 pgflags, &kvseg, addr, NULL); 426 427 if (ppl == NULL) { 428 vmem_xfree(vmp, addr, size); 429 page_unresv(npages); 430 return (NULL); 431 } 432 433 rootpp = ppl; 434 ppa = kmem_zalloc(npages * sizeof (page_t *), KM_SLEEP); 435 while (ppl != NULL) { 436 page_t *pp = ppl; 437 ppa[i++] = pp; 438 page_sub(&ppl, pp); 439 ASSERT(page_iolock_assert(pp)); 440 ASSERT(PAGE_EXCL(pp)); 441 page_io_unlock(pp); 442 } 443 444 /* 445 * Load the locked entry. It's OK to preload the entry into 446 * the TSB since we now support large mappings in the kernel TSB. 447 */ 448 hat_memload_array(kas.a_hat, (caddr_t)rootpp->p_offset, size, 449 ppa, (PROT_ALL & ~PROT_USER) | HAT_NOSYNC, HAT_LOAD_LOCK); 450 451 ASSERT(i == page_get_pagecnt(ppa[0]->p_szc)); 452 for (--i; i >= 0; --i) { 453 ASSERT(ppa[i]->p_szc == ppa[0]->p_szc); 454 ASSERT(page_pptonum(ppa[i]) == page_pptonum(ppa[0]) + i); 455 (void) page_pp_lock(ppa[i], 0, 1); 456 /* 457 * Leave the page share locked. For non-cage pages, 458 * this would prevent memory DR if it were supported 459 * on sun4v. 460 */ 461 page_downgrade(ppa[i]); 462 } 463 464 kmem_free(ppa, npages * sizeof (page_t *)); 465 return (addr); 466 } 467 468 /* 469 * Allocates a slab by first trying to use the largest slab size 470 * in contig_mem_import_sizes and then falling back to smaller slab 471 * sizes still large enough for the allocation. The sizep argument 472 * is a pointer to the requested size. When a slab is successfully 473 * allocated, the slab size, which must be >= *sizep and <= 474 * contig_mem_import_size_max, is returned in the *sizep argument. 475 * Returns the virtual address of the new slab. 476 */ 477 static void * 478 span_alloc_downsize(vmem_t *vmp, size_t *sizep, size_t align, int vmflag) 479 { 480 int i; 481 482 ASSERT(*sizep <= contig_mem_import_size_max); 483 484 for (i = 0; i < NUM_IMPORT_SIZES; i++) { 485 size_t page_size = contig_mem_import_sizes[i]; 486 487 /* 488 * Check that the alignment is also less than the 489 * import (large page) size. In the case where the 490 * alignment is larger than the size, a large page 491 * large enough for the allocation is not necessarily 492 * physical-address aligned to satisfy the requested 493 * alignment. Since alignment is required to be a 494 * power-of-2, any large page >= size && >= align will 495 * suffice. 496 */ 497 if (*sizep <= page_size && align <= page_size) { 498 void *addr; 499 addr = contig_mem_span_alloc(vmp, page_size, vmflag); 500 if (addr == NULL) 501 continue; 502 *sizep = page_size; 503 return (addr); 504 } 505 return (NULL); 506 } 507 508 return (NULL); 509 } 510 511 static void * 512 contig_mem_span_xalloc(vmem_t *vmp, size_t *sizep, size_t align, int vmflag) 513 { 514 return (span_alloc_downsize(vmp, sizep, align, vmflag | VM_NORELOC)); 515 } 516 517 static void * 518 contig_mem_reloc_span_xalloc(vmem_t *vmp, size_t *sizep, size_t align, 519 int vmflag) 520 { 521 ASSERT((vmflag & VM_NORELOC) == 0); 522 return (span_alloc_downsize(vmp, sizep, align, vmflag)); 523 } 524 525 /* 526 * Free a span, which is always exactly one large page. 527 */ 528 static void 529 contig_mem_span_free(vmem_t *vmp, void *inaddr, size_t size) 530 { 531 page_t *pp; 532 caddr_t addr = inaddr; 533 caddr_t eaddr; 534 pgcnt_t npages = btopr(size); 535 page_t *rootpp = NULL; 536 537 ASSERT(size <= contig_mem_import_size_max); 538 /* All slabs should be size aligned */ 539 ASSERT(((uintptr_t)addr & (size - 1)) == 0); 540 541 hat_unload(kas.a_hat, addr, size, HAT_UNLOAD_UNLOCK); 542 543 for (eaddr = addr + size; addr < eaddr; addr += PAGESIZE) { 544 pp = page_find(&kvp, (u_offset_t)(uintptr_t)addr); 545 if (pp == NULL) { 546 panic("contig_mem_span_free: page not found"); 547 } 548 if (!page_tryupgrade(pp)) { 549 page_unlock(pp); 550 pp = page_lookup(&kvp, 551 (u_offset_t)(uintptr_t)addr, SE_EXCL); 552 if (pp == NULL) 553 panic("contig_mem_span_free: page not found"); 554 } 555 556 ASSERT(PAGE_EXCL(pp)); 557 ASSERT(size == page_get_pagesize(pp->p_szc)); 558 ASSERT(rootpp == NULL || rootpp->p_szc == pp->p_szc); 559 ASSERT(rootpp == NULL || (page_pptonum(rootpp) + 560 (pgcnt_t)btop(addr - (caddr_t)inaddr) == page_pptonum(pp))); 561 562 page_pp_unlock(pp, 0, 1); 563 564 if (rootpp == NULL) 565 rootpp = pp; 566 } 567 page_destroy_pages(rootpp); 568 page_unresv(npages); 569 570 if (vmp != NULL) 571 vmem_xfree(vmp, inaddr, size); 572 } 573 574 static void * 575 contig_vmem_xalloc_aligned_wrapper(vmem_t *vmp, size_t *sizep, size_t align, 576 int vmflag) 577 { 578 ASSERT((align & (align - 1)) == 0); 579 return (vmem_xalloc(vmp, *sizep, align, 0, 0, NULL, NULL, vmflag)); 580 } 581 582 /* 583 * contig_mem_alloc, contig_mem_alloc_align 584 * 585 * Caution: contig_mem_alloc and contig_mem_alloc_align should be 586 * used only when physically contiguous non-relocatable memory is 587 * required. Furthermore, use of these allocation routines should be 588 * minimized as well as should the allocation size. As described in the 589 * contig_mem_arena comment block above, slab allocations fall back to 590 * being outside of the cage. Therefore, overuse of these allocation 591 * routines can lead to non-relocatable large pages being allocated 592 * outside the cage. Such pages prevent the allocation of a larger page 593 * occupying overlapping pages. This can impact performance for 594 * applications that utilize e.g. 256M large pages. 595 */ 596 597 /* 598 * Allocates size aligned contiguous memory up to contig_mem_import_size_max. 599 * Size must be a power of 2. 600 */ 601 void * 602 contig_mem_alloc(size_t size) 603 { 604 ASSERT((size & (size - 1)) == 0); 605 return (contig_mem_alloc_align(size, size)); 606 } 607 608 /* 609 * contig_mem_alloc_align allocates real contiguous memory with the specified 610 * alignment up to contig_mem_import_size_max. The alignment must be a 611 * power of 2 and no greater than contig_mem_import_size_max. We assert 612 * the aligment is a power of 2. For non-debug, vmem_xalloc will panic 613 * for non power of 2 alignments. 614 */ 615 void * 616 contig_mem_alloc_align(size_t size, size_t align) 617 { 618 void *buf; 619 620 ASSERT(size <= contig_mem_import_size_max); 621 ASSERT(align <= contig_mem_import_size_max); 622 ASSERT((align & (align - 1)) == 0); 623 624 if (align < CONTIG_MEM_ARENA_QUANTUM) 625 align = CONTIG_MEM_ARENA_QUANTUM; 626 627 /* 628 * We take the lock here to serialize span allocations. 629 * We do not lose concurrency for the common case, since 630 * allocations that don't require new span allocations 631 * are serialized by vmem_xalloc. Serializing span 632 * allocations also prevents us from trying to allocate 633 * more spans that necessary. 634 */ 635 mutex_enter(&contig_mem_lock); 636 637 buf = vmem_xalloc(contig_mem_arena, size, align, 0, 0, 638 NULL, NULL, VM_NOSLEEP | VM_NORELOC); 639 640 if ((buf == NULL) && (size <= MMU_PAGESIZE)) { 641 mutex_exit(&contig_mem_lock); 642 return (vmem_xalloc(static_alloc_arena, size, align, 0, 0, 643 NULL, NULL, VM_NOSLEEP)); 644 } 645 646 if (buf == NULL) { 647 buf = vmem_xalloc(contig_mem_reloc_arena, size, align, 0, 0, 648 NULL, NULL, VM_NOSLEEP); 649 } 650 651 mutex_exit(&contig_mem_lock); 652 653 return (buf); 654 } 655 656 void 657 contig_mem_free(void *vaddr, size_t size) 658 { 659 if (vmem_contains(contig_mem_arena, vaddr, size)) { 660 vmem_xfree(contig_mem_arena, vaddr, size); 661 } else if (size > MMU_PAGESIZE) { 662 vmem_xfree(contig_mem_reloc_arena, vaddr, size); 663 } else { 664 vmem_xfree(static_alloc_arena, vaddr, size); 665 } 666 } 667 668 /* 669 * We create a set of stacked vmem arenas to enable us to 670 * allocate large >PAGESIZE chucks of contiguous Real Address space. 671 * The vmem_xcreate interface is used to create the contig_mem_arena 672 * allowing the import routine to downsize the requested slab size 673 * and return a smaller slab. 674 */ 675 void 676 contig_mem_init(void) 677 { 678 mutex_init(&contig_mem_lock, NULL, MUTEX_DEFAULT, NULL); 679 680 contig_mem_slab_arena = vmem_xcreate("contig_mem_slab_arena", NULL, 0, 681 CONTIG_MEM_SLAB_ARENA_QUANTUM, contig_vmem_xalloc_aligned_wrapper, 682 vmem_xfree, heap_arena, 0, VM_SLEEP | VMC_XALIGN); 683 684 contig_mem_arena = vmem_xcreate("contig_mem_arena", NULL, 0, 685 CONTIG_MEM_ARENA_QUANTUM, contig_mem_span_xalloc, 686 contig_mem_span_free, contig_mem_slab_arena, 0, 687 VM_SLEEP | VM_BESTFIT | VMC_XALIGN); 688 689 contig_mem_reloc_arena = vmem_xcreate("contig_mem_reloc_arena", NULL, 0, 690 CONTIG_MEM_ARENA_QUANTUM, contig_mem_reloc_span_xalloc, 691 contig_mem_span_free, contig_mem_slab_arena, 0, 692 VM_SLEEP | VM_BESTFIT | VMC_XALIGN); 693 694 if (vmem_add(contig_mem_arena, prealloc_buf, prealloc_size, 695 VM_SLEEP) == NULL) 696 cmn_err(CE_PANIC, "Failed to pre-populate contig_mem_arena"); 697 } 698 699 /* 700 * In calculating how much memory to pre-allocate, we include a small 701 * amount per-CPU to account for per-CPU buffers in line with measured 702 * values for different size systems. contig_mem_prealloc_base is the 703 * base fixed amount to be preallocated before considering per-CPU 704 * requirements and memory size. We take the minimum of 705 * contig_mem_prealloc_base and a small percentage of physical memory 706 * to prevent allocating too much on smaller systems. 707 */ 708 #define PREALLOC_PER_CPU (256 * 1024) /* 256K */ 709 #define PREALLOC_PERCENT (4) /* 4% */ 710 #define PREALLOC_MIN (16 * 1024 * 1024) /* 16M */ 711 size_t contig_mem_prealloc_base = 0; 712 713 /* 714 * Called at boot-time allowing pre-allocation of contiguous memory. 715 * The argument 'alloc_base' is the requested base address for the 716 * allocation and originates in startup_memlist. 717 */ 718 caddr_t 719 contig_mem_prealloc(caddr_t alloc_base, pgcnt_t npages) 720 { 721 prealloc_size = MIN((PREALLOC_PER_CPU * ncpu_guest_max) + 722 contig_mem_prealloc_base, (ptob(npages) * PREALLOC_PERCENT) / 100); 723 prealloc_size = MAX(prealloc_size, PREALLOC_MIN); 724 prealloc_size = P2ROUNDUP(prealloc_size, MMU_PAGESIZE4M); 725 726 alloc_base = (caddr_t)roundup((uintptr_t)alloc_base, MMU_PAGESIZE4M); 727 prealloc_buf = alloc_base; 728 alloc_base += prealloc_size; 729 730 return (alloc_base); 731 } 732 733 static uint_t sp_color_stride = 16; 734 static uint_t sp_color_mask = 0x1f; 735 static uint_t sp_current_color = (uint_t)-1; 736 737 size_t 738 exec_get_spslew(void) 739 { 740 uint_t spcolor = atomic_inc_32_nv(&sp_current_color); 741 return ((size_t)((spcolor & sp_color_mask) * SA(sp_color_stride))); 742 } 743