xref: /titanic_52/usr/src/uts/sun4v/sys/dr_cpu.h (revision d2ec54f7875f7e05edd56195adbeb593c947763f)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _DR_CPU_H
28 #define	_DR_CPU_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 /*
33  * CPU DR Control Protocol
34  */
35 
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39 
40 /*
41  * CPU DR Message Header
42  */
43 typedef struct {
44 	uint64_t	req_num;	/* request number */
45 	uint32_t	msg_type;	/* message type */
46 	uint32_t	num_records;	/* number of records */
47 } dr_cpu_hdr_t;
48 
49 /*
50  * CPU command and response messages
51  */
52 
53 #define	DR_CPU_DS_ID		"dr-cpu"
54 
55 #define	DR_CPU_CONFIGURE	('C')
56 #define	DR_CPU_UNCONFIGURE	('U')
57 #define	DR_CPU_FORCE_UNCONFIG	('F')
58 #define	DR_CPU_STATUS		('S')
59 
60 #define	DR_CPU_OK		('o')
61 #define	DR_CPU_ERROR		('e')
62 
63 /*
64  * Response Message
65  */
66 typedef struct {
67 	uint32_t	cpuid;		/* virtual CPU ID */
68 	uint32_t	result;		/* result of the operation */
69 	uint32_t	status;		/* status of the CPU */
70 	uint32_t	string_off;	/* informational string offset */
71 } dr_cpu_stat_t;
72 
73 /*
74  * Result Codes
75  */
76 #define	DR_CPU_RES_OK			0x0	/* operation succeeded */
77 #define	DR_CPU_RES_FAILURE		0x1	/* operation failed */
78 #define	DR_CPU_RES_BLOCKED		0x2	/* operation was blocked */
79 #define	DR_CPU_RES_CPU_NOT_RESPONDING	0x3	/* CPU was not responding */
80 #define	DR_CPU_RES_NOT_IN_MD		0x4	/* CPU not defined in MD */
81 
82 /*
83  * Status Codes
84  */
85 #define	DR_CPU_STAT_NOT_PRESENT		0x0	/* CPU ID not in MD */
86 #define	DR_CPU_STAT_UNCONFIGURED	0x1	/* CPU unconfigured */
87 #define	DR_CPU_STAT_CONFIGURED		0x2	/* CPU configured */
88 
89 /*
90  * Macros to access arrays that follow message header
91  */
92 #define	DR_CPU_CMD_CPUIDS(_hdr)		((uint32_t *)((_hdr) + 1))
93 #define	DR_CPU_RESP_STATS(_hdr)		((dr_cpu_stat_t *)((_hdr) + 1))
94 
95 #ifdef __cplusplus
96 }
97 #endif
98 
99 #endif /* _DR_CPU_H */
100