xref: /titanic_52/usr/src/uts/sun4v/os/mach_cpu_states.c (revision 80feccabd0bc0fca1df2b60bfa50449d9a6e3e09)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
27 
28 #include <sys/types.h>
29 #include <sys/systm.h>
30 #include <sys/archsystm.h>
31 #include <sys/t_lock.h>
32 #include <sys/uadmin.h>
33 #include <sys/panic.h>
34 #include <sys/reboot.h>
35 #include <sys/autoconf.h>
36 #include <sys/machsystm.h>
37 #include <sys/promif.h>
38 #include <sys/membar.h>
39 #include <vm/hat_sfmmu.h>
40 #include <sys/cpu_module.h>
41 #include <sys/cpu_sgnblk_defs.h>
42 #include <sys/intreg.h>
43 #include <sys/consdev.h>
44 #include <sys/kdi_impl.h>
45 #include <sys/traptrace.h>
46 #include <sys/hypervisor_api.h>
47 #include <sys/vmsystm.h>
48 #include <sys/dtrace.h>
49 #include <sys/xc_impl.h>
50 #include <sys/callb.h>
51 #include <sys/mdesc.h>
52 #include <sys/mach_descrip.h>
53 #include <sys/wdt.h>
54 #include <sys/soft_state.h>
55 #include <sys/promimpl.h>
56 #include <sys/hsvc.h>
57 #include <sys/ldoms.h>
58 
59 /*
60  * hvdump_buf_va is a pointer to the currently-configured hvdump_buf.
61  * A value of NULL indicates that this area is not configured.
62  * hvdump_buf_sz is tunable but will be clamped to HVDUMP_SIZE_MAX.
63  */
64 
65 caddr_t hvdump_buf_va;
66 uint64_t hvdump_buf_sz = HVDUMP_SIZE_DEFAULT;
67 static uint64_t hvdump_buf_pa;
68 
69 u_longlong_t panic_tick;
70 
71 extern u_longlong_t gettick();
72 static void reboot_machine(char *);
73 static void update_hvdump_buffer(void);
74 
75 /*
76  * For xt_sync synchronization.
77  */
78 extern uint64_t xc_tick_limit;
79 extern uint64_t xc_tick_jump_limit;
80 
81 /*
82  * We keep our own copies, used for cache flushing, because we can be called
83  * before cpu_fiximpl().
84  */
85 static int kdi_dcache_size;
86 static int kdi_dcache_linesize;
87 static int kdi_icache_size;
88 static int kdi_icache_linesize;
89 
90 /*
91  * Assembly support for generic modules in sun4v/ml/mach_xc.s
92  */
93 extern void init_mondo_nocheck(xcfunc_t *func, uint64_t arg1, uint64_t arg2);
94 extern void kdi_flush_idcache(int, int, int, int);
95 extern uint64_t get_cpuaddr(uint64_t, uint64_t);
96 
97 
98 #define	BOOT_CMD_MAX_LEN	256
99 #define	BOOT_CMD_BASE		"boot "
100 
101 /*
102  * In an LDoms system we do not save the user's boot args in NVRAM
103  * as is done on legacy systems.  Instead, we format and send a
104  * 'reboot-command' variable to the variable service.  The contents
105  * of the variable are retrieved by OBP and used verbatim for
106  * the next boot.
107  */
108 static void
109 store_boot_cmd(char *args, boolean_t add_boot_str)
110 {
111 	static char	cmd_buf[BOOT_CMD_MAX_LEN];
112 	size_t		len = 1;
113 	pnode_t		node;
114 	size_t		base_len = 0;
115 	size_t		args_len;
116 	size_t		args_max;
117 
118 	if (add_boot_str) {
119 		(void) strcpy(cmd_buf, BOOT_CMD_BASE);
120 
121 		base_len = strlen(BOOT_CMD_BASE);
122 		len = base_len + 1;
123 	}
124 
125 	if (args != NULL) {
126 		args_len = strlen(args);
127 		args_max = BOOT_CMD_MAX_LEN - len;
128 
129 		if (args_len > args_max) {
130 			cmn_err(CE_WARN, "Reboot command too long (%ld), "
131 			    "truncating command arguments", len + args_len);
132 
133 			args_len = args_max;
134 		}
135 
136 		len += args_len;
137 		(void) strncpy(&cmd_buf[base_len], args, args_len);
138 	}
139 
140 	node = prom_optionsnode();
141 	if ((node == OBP_NONODE) || (node == OBP_BADNODE) ||
142 	    prom_setprop(node, "reboot-command", cmd_buf, len) == -1)
143 		cmn_err(CE_WARN, "Unable to store boot command for "
144 		    "use on reboot");
145 }
146 
147 
148 /*
149  * Machine dependent code to reboot.
150  *
151  * "bootstr", when non-null, points to a string to be used as the
152  * argument string when rebooting.
153  *
154  * "invoke_cb" is a boolean. It is set to true when mdboot() can safely
155  * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when
156  * we are in a normal shutdown sequence (interrupts are not blocked, the
157  * system is not panic'ing or being suspended).
158  */
159 /*ARGSUSED*/
160 void
161 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb)
162 {
163 	extern void pm_cfb_check_and_powerup(void);
164 
165 	/*
166 	 * XXX - rconsvp is set to NULL to ensure that output messages
167 	 * are sent to the underlying "hardware" device using the
168 	 * monitor's printf routine since we are in the process of
169 	 * either rebooting or halting the machine.
170 	 */
171 	rconsvp = NULL;
172 
173 	switch (fcn) {
174 	case AD_HALT:
175 		/*
176 		 * LDoms: By storing a no-op command
177 		 * in the 'reboot-command' variable we cause OBP
178 		 * to ignore the setting of 'auto-boot?' after
179 		 * it completes the reset.  This causes the system
180 		 * to stop at the ok prompt.
181 		 */
182 		if (domaining_enabled() && invoke_cb)
183 			store_boot_cmd("noop", B_FALSE);
184 		break;
185 
186 	case AD_POWEROFF:
187 		break;
188 
189 	default:
190 		if (bootstr == NULL) {
191 			switch (fcn) {
192 
193 			case AD_BOOT:
194 				bootstr = "";
195 				break;
196 
197 			case AD_IBOOT:
198 				bootstr = "-a";
199 				break;
200 
201 			case AD_SBOOT:
202 				bootstr = "-s";
203 				break;
204 
205 			case AD_SIBOOT:
206 				bootstr = "-sa";
207 				break;
208 			default:
209 				cmn_err(CE_WARN,
210 				    "mdboot: invalid function %d", fcn);
211 				bootstr = "";
212 				break;
213 			}
214 		}
215 
216 		/*
217 		 * If LDoms is running, we must save the boot string
218 		 * before we enter restricted mode.  This is possible
219 		 * only if we are not being called from panic.
220 		 */
221 		if (domaining_enabled() && invoke_cb)
222 			store_boot_cmd(bootstr, B_TRUE);
223 	}
224 
225 	/*
226 	 * At a high interrupt level we can't:
227 	 *	1) bring up the console
228 	 * or
229 	 *	2) wait for pending interrupts prior to redistribution
230 	 *	   to the current CPU
231 	 *
232 	 * so we do them now.
233 	 */
234 	pm_cfb_check_and_powerup();
235 
236 	/* make sure there are no more changes to the device tree */
237 	devtree_freeze();
238 
239 	if (invoke_cb)
240 		(void) callb_execute_class(CB_CL_MDBOOT, NULL);
241 
242 	/*
243 	 * Clear any unresolved UEs from memory.
244 	 */
245 	page_retire_mdboot();
246 
247 	/*
248 	 * stop other cpus which also raise our priority. since there is only
249 	 * one active cpu after this, and our priority will be too high
250 	 * for us to be preempted, we're essentially single threaded
251 	 * from here on out.
252 	 */
253 	stop_other_cpus();
254 
255 	/*
256 	 * try and reset leaf devices.  reset_leaves() should only
257 	 * be called when there are no other threads that could be
258 	 * accessing devices
259 	 */
260 	reset_leaves();
261 
262 	watchdog_clear();
263 
264 	if (fcn == AD_HALT) {
265 		mach_set_soft_state(SIS_TRANSITION,
266 		    &SOLARIS_SOFT_STATE_HALT_MSG);
267 		halt((char *)NULL);
268 	} else if (fcn == AD_POWEROFF) {
269 		mach_set_soft_state(SIS_TRANSITION,
270 		    &SOLARIS_SOFT_STATE_POWER_MSG);
271 		power_down(NULL);
272 	} else {
273 		mach_set_soft_state(SIS_TRANSITION,
274 		    &SOLARIS_SOFT_STATE_REBOOT_MSG);
275 		reboot_machine(bootstr);
276 	}
277 	/* MAYBE REACHED */
278 }
279 
280 /* mdpreboot - may be called prior to mdboot while root fs still mounted */
281 /*ARGSUSED*/
282 void
283 mdpreboot(int cmd, int fcn, char *bootstr)
284 {
285 }
286 
287 /*
288  * Halt the machine and then reboot with the device
289  * and arguments specified in bootstr.
290  */
291 static void
292 reboot_machine(char *bootstr)
293 {
294 	flush_windows();
295 	stop_other_cpus();		/* send stop signal to other CPUs */
296 	prom_printf("rebooting...\n");
297 	/*
298 	 * For platforms that use CPU signatures, we
299 	 * need to set the signature block to OS and
300 	 * the state to exiting for all the processors.
301 	 */
302 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1);
303 	prom_reboot(bootstr);
304 	/*NOTREACHED*/
305 }
306 
307 /*
308  * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs.
309  * Once in panic_idle() they raise spl, record their location, and spin.
310  */
311 static void
312 panic_idle(void)
313 {
314 	(void) spl7();
315 
316 	debug_flush_windows();
317 	(void) setjmp(&curthread->t_pcb);
318 
319 	CPU->cpu_m.in_prom = 1;
320 	membar_stld();
321 
322 	for (;;)
323 		;
324 }
325 
326 /*
327  * Force the other CPUs to trap into panic_idle(), and then remove them
328  * from the cpu_ready_set so they will no longer receive cross-calls.
329  */
330 /*ARGSUSED*/
331 void
332 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl)
333 {
334 	cpuset_t cps;
335 	int i;
336 
337 	(void) splzs();
338 	CPUSET_ALL_BUT(cps, cp->cpu_id);
339 	xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL);
340 
341 	for (i = 0; i < NCPU; i++) {
342 		if (i != cp->cpu_id && CPU_XCALL_READY(i)) {
343 			int ntries = 0x10000;
344 
345 			while (!cpu[i]->cpu_m.in_prom && ntries) {
346 				DELAY(50);
347 				ntries--;
348 			}
349 
350 			if (!cpu[i]->cpu_m.in_prom)
351 				printf("panic: failed to stop cpu%d\n", i);
352 
353 			cpu[i]->cpu_flags &= ~CPU_READY;
354 			cpu[i]->cpu_flags |= CPU_QUIESCED;
355 			CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id);
356 		}
357 	}
358 }
359 
360 /*
361  * Platform callback following each entry to panicsys().  If we've panicked at
362  * level 14, we examine t_panic_trap to see if a fatal trap occurred.  If so,
363  * we disable further %tick_cmpr interrupts.  If not, an explicit call to panic
364  * was made and so we re-enqueue an interrupt request structure to allow
365  * further level 14 interrupts to be processed once we lower PIL.  This allows
366  * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic.
367  */
368 void
369 panic_enter_hw(int spl)
370 {
371 	if (!panic_tick) {
372 		panic_tick = gettick();
373 		if (mach_htraptrace_enable) {
374 			uint64_t prev_freeze;
375 
376 			/*  there are no possible error codes for this hcall */
377 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
378 			    &prev_freeze);
379 		}
380 #ifdef TRAPTRACE
381 		TRAPTRACE_FREEZE;
382 #endif
383 	}
384 
385 	mach_set_soft_state(SIS_TRANSITION, &SOLARIS_SOFT_STATE_PANIC_MSG);
386 
387 	if (spl == ipltospl(PIL_14)) {
388 		uint_t opstate = disable_vec_intr();
389 
390 		if (curthread->t_panic_trap != NULL) {
391 			tickcmpr_disable();
392 			intr_dequeue_req(PIL_14, cbe_level14_inum);
393 		} else {
394 			if (!tickcmpr_disabled())
395 				intr_enqueue_req(PIL_14, cbe_level14_inum);
396 			/*
397 			 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT)
398 			 * and SOFTINT<16> (STICK_INT) to indicate
399 			 * that the current level 14 has been serviced.
400 			 */
401 			wr_clr_softint((1 << PIL_14) |
402 			    TICK_INT_MASK | STICK_INT_MASK);
403 		}
404 
405 		enable_vec_intr(opstate);
406 	}
407 }
408 
409 /*
410  * Miscellaneous hardware-specific code to execute after panicstr is set
411  * by the panic code: we also print and record PTL1 panic information here.
412  */
413 /*ARGSUSED*/
414 void
415 panic_quiesce_hw(panic_data_t *pdp)
416 {
417 	extern uint_t getpstate(void);
418 	extern void setpstate(uint_t);
419 
420 	/*
421 	 * Turn off TRAPTRACE and save the current %tick value in panic_tick.
422 	 */
423 	if (!panic_tick) {
424 		panic_tick = gettick();
425 		if (mach_htraptrace_enable) {
426 			uint64_t prev_freeze;
427 
428 			/*  there are no possible error codes for this hcall */
429 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
430 			    &prev_freeze);
431 		}
432 #ifdef TRAPTRACE
433 		TRAPTRACE_FREEZE;
434 #endif
435 	}
436 	/*
437 	 * For Platforms that use CPU signatures, we
438 	 * need to set the signature block to OS, the state to
439 	 * exiting, and the substate to panic for all the processors.
440 	 */
441 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1);
442 
443 	update_hvdump_buffer();
444 
445 	/*
446 	 * Disable further ECC errors from the bus nexus.
447 	 */
448 	(void) bus_func_invoke(BF_TYPE_ERRDIS);
449 
450 	/*
451 	 * Redirect all interrupts to the current CPU.
452 	 */
453 	intr_redist_all_cpus_shutdown();
454 
455 	/*
456 	 * This call exists solely to support dumps to network
457 	 * devices after sync from OBP.
458 	 *
459 	 * If we came here via the sync callback, then on some
460 	 * platforms, interrupts may have arrived while we were
461 	 * stopped in OBP.  OBP will arrange for those interrupts to
462 	 * be redelivered if you say "go", but not if you invoke a
463 	 * client callback like 'sync'.	 For some dump devices
464 	 * (network swap devices), we need interrupts to be
465 	 * delivered in order to dump, so we have to call the bus
466 	 * nexus driver to reset the interrupt state machines.
467 	 */
468 	(void) bus_func_invoke(BF_TYPE_RESINTR);
469 
470 	setpstate(getpstate() | PSTATE_IE);
471 }
472 
473 /*
474  * Platforms that use CPU signatures need to set the signature block to OS and
475  * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to
476  * write the crash dump, which tells the SSP/SMS to begin a timeout routine to
477  * reboot the machine if the dump never completes.
478  */
479 /*ARGSUSED*/
480 void
481 panic_dump_hw(int spl)
482 {
483 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1);
484 }
485 
486 /*
487  * for ptl1_panic
488  */
489 void
490 ptl1_init_cpu(struct cpu *cpu)
491 {
492 	ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state;
493 
494 	/*CONSTCOND*/
495 	if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) {
496 		panic("ptl1_init_cpu: not enough space left for ptl1_panic "
497 		    "stack, sizeof (struct cpu) = %lu",
498 		    (unsigned long)sizeof (struct cpu));
499 	}
500 
501 	pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE;
502 	cpu_pa[cpu->cpu_id] = va_to_pa(cpu);
503 }
504 
505 void
506 ptl1_panic_handler(ptl1_state_t *pstate)
507 {
508 	static const char *ptl1_reasons[] = {
509 #ifdef	PTL1_PANIC_DEBUG
510 		"trap for debug purpose",	/* PTL1_BAD_DEBUG */
511 #else
512 		"unknown trap",			/* PTL1_BAD_DEBUG */
513 #endif
514 		"register window trap",		/* PTL1_BAD_WTRAP */
515 		"kernel MMU miss",		/* PTL1_BAD_KMISS */
516 		"kernel protection fault",	/* PTL1_BAD_KPROT_FAULT */
517 		"ISM MMU miss",			/* PTL1_BAD_ISM */
518 		"kernel MMU trap",		/* PTL1_BAD_MMUTRAP */
519 		"kernel trap handler state",	/* PTL1_BAD_TRAP */
520 		"floating point trap",		/* PTL1_BAD_FPTRAP */
521 #ifdef	DEBUG
522 		"pointer to intr_vec",		/* PTL1_BAD_INTR_VEC */
523 #else
524 		"unknown trap",			/* PTL1_BAD_INTR_VEC */
525 #endif
526 #ifdef	TRAPTRACE
527 		"TRACE_PTR state",		/* PTL1_BAD_TRACE_PTR */
528 #else
529 		"unknown trap",			/* PTL1_BAD_TRACE_PTR */
530 #endif
531 		"stack overflow",		/* PTL1_BAD_STACK */
532 		"DTrace flags",			/* PTL1_BAD_DTRACE_FLAGS */
533 		"attempt to steal locked ctx",  /* PTL1_BAD_CTX_STEAL */
534 		"CPU ECC error loop",		/* PTL1_BAD_ECC */
535 		"unexpected error from hypervisor call", /* PTL1_BAD_HCALL */
536 		"unexpected global level(%gl)", /* PTL1_BAD_GL */
537 		"Watchdog Reset", 		/* PTL1_BAD_WATCHDOG */
538 		"unexpected RED mode trap", 	/* PTL1_BAD_RED */
539 		"return value EINVAL from hcall: "\
540 		    "UNMAP_PERM_ADDR",	/* PTL1_BAD_HCALL_UNMAP_PERM_EINVAL */
541 		"return value ENOMAP from hcall: "\
542 		    "UNMAP_PERM_ADDR", /* PTL1_BAD_HCALL_UNMAP_PERM_ENOMAP */
543 	};
544 
545 	uint_t reason = pstate->ptl1_regs.ptl1_gregs[0].ptl1_g1;
546 	uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl;
547 	struct panic_trap_info ti = { 0 };
548 
549 	/*
550 	 * Use trap_info for a place holder to call panic_savetrap() and
551 	 * panic_showtrap() to save and print out ptl1_panic information.
552 	 */
553 	if (curthread->t_panic_trap == NULL)
554 		curthread->t_panic_trap = &ti;
555 
556 	if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0]))
557 		panic("bad %s at TL %u", ptl1_reasons[reason], tl);
558 	else
559 		panic("ptl1_panic reason 0x%x at TL %u", reason, tl);
560 }
561 
562 void
563 clear_watchdog_on_exit(void)
564 {
565 	if (watchdog_enabled && watchdog_activated) {
566 		prom_printf("Debugging requested; hardware watchdog "
567 		    "suspended.\n");
568 		(void) watchdog_suspend();
569 	}
570 }
571 
572 /*
573  * Restore the watchdog timer when returning from a debugger
574  * after a panic or L1-A and resume watchdog pat.
575  */
576 void
577 restore_watchdog_on_entry()
578 {
579 	watchdog_resume();
580 }
581 
582 int
583 kdi_watchdog_disable(void)
584 {
585 	watchdog_suspend();
586 
587 	return (0);
588 }
589 
590 void
591 kdi_watchdog_restore(void)
592 {
593 	watchdog_resume();
594 }
595 
596 void
597 mach_dump_buffer_init(void)
598 {
599 	uint64_t  ret, minsize = 0;
600 
601 	if (hvdump_buf_sz > HVDUMP_SIZE_MAX)
602 		hvdump_buf_sz = HVDUMP_SIZE_MAX;
603 
604 	hvdump_buf_va = contig_mem_alloc_align(hvdump_buf_sz, PAGESIZE);
605 	if (hvdump_buf_va == NULL)
606 		return;
607 
608 	hvdump_buf_pa = va_to_pa(hvdump_buf_va);
609 
610 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
611 	    &minsize);
612 
613 	if (ret != H_EOK) {
614 		contig_mem_free(hvdump_buf_va, hvdump_buf_sz);
615 		hvdump_buf_va = NULL;
616 		cmn_err(CE_NOTE, "!Error in setting up hvstate"
617 		    "dump buffer. Error = 0x%lx, size = 0x%lx,"
618 		    "buf_pa = 0x%lx", ret, hvdump_buf_sz,
619 		    hvdump_buf_pa);
620 
621 		if (ret == H_EINVAL) {
622 			cmn_err(CE_NOTE, "!Buffer size too small."
623 			    "Available buffer size = 0x%lx,"
624 			    "Minimum buffer size required = 0x%lx",
625 			    hvdump_buf_sz, minsize);
626 		}
627 	}
628 }
629 
630 
631 static void
632 update_hvdump_buffer(void)
633 {
634 	uint64_t ret, dummy_val;
635 
636 	if (hvdump_buf_va == NULL)
637 		return;
638 
639 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
640 	    &dummy_val);
641 	if (ret != H_EOK) {
642 		cmn_err(CE_NOTE, "!Cannot update hvstate dump"
643 		    "buffer. Error = 0x%lx", ret);
644 	}
645 }
646 
647 
648 static int
649 getintprop(pnode_t node, char *name, int deflt)
650 {
651 	int	value;
652 
653 	switch (prom_getproplen(node, name)) {
654 	case 0:
655 		value = 1;	/* boolean properties */
656 		break;
657 
658 	case sizeof (int):
659 		(void) prom_getprop(node, name, (caddr_t)&value);
660 		break;
661 
662 	default:
663 		value = deflt;
664 		break;
665 	}
666 
667 	return (value);
668 }
669 
670 /*
671  * Called by setcpudelay
672  */
673 void
674 cpu_init_tick_freq(void)
675 {
676 	md_t *mdp;
677 	mde_cookie_t rootnode;
678 	int		listsz;
679 	mde_cookie_t	*listp = NULL;
680 	int	num_nodes;
681 	uint64_t stick_prop;
682 
683 	if (broken_md_flag) {
684 		sys_tick_freq = cpunodes[CPU->cpu_id].clock_freq;
685 		return;
686 	}
687 
688 	if ((mdp = md_get_handle()) == NULL)
689 		panic("stick_frequency property not found in MD");
690 
691 	rootnode = md_root_node(mdp);
692 	ASSERT(rootnode != MDE_INVAL_ELEM_COOKIE);
693 
694 	num_nodes = md_node_count(mdp);
695 
696 	ASSERT(num_nodes > 0);
697 	listsz = num_nodes * sizeof (mde_cookie_t);
698 	listp = (mde_cookie_t *)prom_alloc((caddr_t)0, listsz, 0);
699 
700 	if (listp == NULL)
701 		panic("cannot allocate list for MD properties");
702 
703 	num_nodes = md_scan_dag(mdp, rootnode, md_find_name(mdp, "platform"),
704 	    md_find_name(mdp, "fwd"), listp);
705 
706 	ASSERT(num_nodes == 1);
707 
708 	if (md_get_prop_val(mdp, *listp, "stick-frequency", &stick_prop) != 0)
709 		panic("stick_frequency property not found in MD");
710 
711 	sys_tick_freq = stick_prop;
712 
713 	prom_free((caddr_t)listp, listsz);
714 	(void) md_fini_handle(mdp);
715 }
716 
717 int shipit(int n, uint64_t cpu_list_ra);
718 extern uint64_t xc_tick_limit;
719 extern uint64_t xc_tick_jump_limit;
720 
721 #ifdef DEBUG
722 #define	SEND_MONDO_STATS	1
723 #endif
724 
725 #ifdef SEND_MONDO_STATS
726 uint32_t x_one_stimes[64];
727 uint32_t x_one_ltimes[16];
728 uint32_t x_set_stimes[64];
729 uint32_t x_set_ltimes[16];
730 uint32_t x_set_cpus[NCPU];
731 #endif
732 
733 void
734 send_one_mondo(int cpuid)
735 {
736 	int retries, stat;
737 	uint64_t starttick, endtick, tick, lasttick;
738 	struct machcpu	*mcpup = &(CPU->cpu_m);
739 
740 	CPU_STATS_ADDQ(CPU, sys, xcalls, 1);
741 	starttick = lasttick = gettick();
742 	mcpup->cpu_list[0] = (uint16_t)cpuid;
743 	stat = shipit(1, mcpup->cpu_list_ra);
744 	endtick = starttick + xc_tick_limit;
745 	retries = 0;
746 	while (stat != H_EOK) {
747 		if (stat != H_EWOULDBLOCK) {
748 			if (panic_quiesce)
749 				return;
750 			if (stat == H_ECPUERROR)
751 				cmn_err(CE_PANIC, "send_one_mondo: "
752 				    "cpuid: 0x%x has been marked in "
753 				    "error", cpuid);
754 			else
755 				cmn_err(CE_PANIC, "send_one_mondo: "
756 				    "unexpected hypervisor error 0x%x "
757 				    "while sending a mondo to cpuid: "
758 				    "0x%x", stat, cpuid);
759 		}
760 		tick = gettick();
761 		/*
762 		 * If there is a big jump between the current tick
763 		 * count and lasttick, we have probably hit a break
764 		 * point.  Adjust endtick accordingly to avoid panic.
765 		 */
766 		if (tick > (lasttick + xc_tick_jump_limit))
767 			endtick += (tick - lasttick);
768 		lasttick = tick;
769 		if (tick > endtick) {
770 			if (panic_quiesce)
771 				return;
772 			cmn_err(CE_PANIC, "send mondo timeout "
773 			    "(target 0x%x) [retries: 0x%x hvstat: 0x%x]",
774 			    cpuid, retries, stat);
775 		}
776 		drv_usecwait(1);
777 		stat = shipit(1, mcpup->cpu_list_ra);
778 		retries++;
779 	}
780 #ifdef SEND_MONDO_STATS
781 	{
782 		uint64_t n = gettick() - starttick;
783 		if (n < 8192)
784 			x_one_stimes[n >> 7]++;
785 		else if (n < 15*8192)
786 			x_one_ltimes[n >> 13]++;
787 		else
788 			x_one_ltimes[0xf]++;
789 	}
790 #endif
791 }
792 
793 void
794 send_mondo_set(cpuset_t set)
795 {
796 	uint64_t starttick, endtick, tick, lasttick;
797 	uint_t largestid, smallestid;
798 	int i, j;
799 	int ncpuids = 0;
800 	int shipped = 0;
801 	int retries = 0;
802 	struct machcpu	*mcpup = &(CPU->cpu_m);
803 
804 	ASSERT(!CPUSET_ISNULL(set));
805 	CPUSET_BOUNDS(set, smallestid, largestid);
806 	if (smallestid == CPUSET_NOTINSET) {
807 		return;
808 	}
809 
810 	starttick = lasttick = gettick();
811 	endtick = starttick + xc_tick_limit;
812 
813 	/*
814 	 * Assemble CPU list for HV argument. We already know
815 	 * smallestid and largestid are members of set.
816 	 */
817 	mcpup->cpu_list[ncpuids++] = (uint16_t)smallestid;
818 	if (largestid != smallestid) {
819 		for (i = smallestid+1; i <= largestid-1; i++) {
820 			if (CPU_IN_SET(set, i)) {
821 				mcpup->cpu_list[ncpuids++] = (uint16_t)i;
822 			}
823 		}
824 		mcpup->cpu_list[ncpuids++] = (uint16_t)largestid;
825 	}
826 
827 	do {
828 		int stat;
829 
830 		stat = shipit(ncpuids, mcpup->cpu_list_ra);
831 		if (stat == H_EOK) {
832 			shipped += ncpuids;
833 			break;
834 		}
835 
836 		/*
837 		 * Either not all CPU mondos were sent, or an
838 		 * error occurred. CPUs that were sent mondos
839 		 * have their CPU IDs overwritten in cpu_list.
840 		 * Reset cpu_list so that it only holds those
841 		 * CPU IDs that still need to be sent.
842 		 */
843 		for (i = 0, j = 0; i < ncpuids; i++) {
844 			if (mcpup->cpu_list[i] == HV_SEND_MONDO_ENTRYDONE) {
845 				shipped++;
846 			} else {
847 				mcpup->cpu_list[j++] = mcpup->cpu_list[i];
848 			}
849 		}
850 		ncpuids = j;
851 
852 		/*
853 		 * Now handle possible errors returned
854 		 * from hypervisor.
855 		 */
856 		if (stat == H_ECPUERROR) {
857 			int errorcpus;
858 
859 			if (!panic_quiesce)
860 				cmn_err(CE_CONT, "send_mondo_set: cpuid(s) ");
861 
862 			/*
863 			 * Remove any CPUs in the error state from
864 			 * cpu_list. At this point cpu_list only
865 			 * contains the CPU IDs for mondos not
866 			 * succesfully sent.
867 			 */
868 			for (i = 0, errorcpus = 0; i < ncpuids; i++) {
869 				uint64_t state = CPU_STATE_INVALID;
870 				uint16_t id = mcpup->cpu_list[i];
871 
872 				(void) hv_cpu_state(id, &state);
873 				if (state == CPU_STATE_ERROR) {
874 					if (!panic_quiesce)
875 						cmn_err(CE_CONT, "0x%x ", id);
876 					errorcpus++;
877 				} else if (errorcpus > 0) {
878 					mcpup->cpu_list[i - errorcpus] =
879 					    mcpup->cpu_list[i];
880 				}
881 			}
882 			ncpuids -= errorcpus;
883 
884 			if (!panic_quiesce) {
885 				if (errorcpus == 0) {
886 					cmn_err(CE_CONT, "<none> have been "
887 					    "marked in error\n");
888 					cmn_err(CE_PANIC, "send_mondo_set: "
889 					    "hypervisor returned "
890 					    "H_ECPUERROR but no CPU in "
891 					    "cpu_list in error state");
892 				} else {
893 					cmn_err(CE_CONT, "have been marked in "
894 					    "error\n");
895 					cmn_err(CE_PANIC, "send_mondo_set: "
896 					    "CPU(s) in error state");
897 				}
898 			}
899 		} else if (stat != H_EWOULDBLOCK) {
900 			if (panic_quiesce)
901 				return;
902 			/*
903 			 * For all other errors, panic.
904 			 */
905 			cmn_err(CE_CONT, "send_mondo_set: unexpected "
906 			    "hypervisor error 0x%x while sending a "
907 			    "mondo to cpuid(s):", stat);
908 			for (i = 0; i < ncpuids; i++) {
909 				cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]);
910 			}
911 			cmn_err(CE_CONT, "\n");
912 			cmn_err(CE_PANIC, "send_mondo_set: unexpected "
913 			    "hypervisor error");
914 		}
915 
916 		tick = gettick();
917 		/*
918 		 * If there is a big jump between the current tick
919 		 * count and lasttick, we have probably hit a break
920 		 * point.  Adjust endtick accordingly to avoid panic.
921 		 */
922 		if (tick > (lasttick + xc_tick_jump_limit))
923 			endtick += (tick - lasttick);
924 		lasttick = tick;
925 		if (tick > endtick) {
926 			if (panic_quiesce)
927 				return;
928 			cmn_err(CE_CONT, "send mondo timeout "
929 			    "[retries: 0x%x]  cpuids: ", retries);
930 			for (i = 0; i < ncpuids; i++)
931 				cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]);
932 			cmn_err(CE_CONT, "\n");
933 			cmn_err(CE_PANIC, "send_mondo_set: timeout");
934 		}
935 
936 		while (gettick() < (tick + sys_clock_mhz))
937 			;
938 		retries++;
939 	} while (ncpuids > 0);
940 
941 	CPU_STATS_ADDQ(CPU, sys, xcalls, shipped);
942 
943 #ifdef SEND_MONDO_STATS
944 	{
945 		uint64_t n = gettick() - starttick;
946 		if (n < 8192)
947 			x_set_stimes[n >> 7]++;
948 		else if (n < 15*8192)
949 			x_set_ltimes[n >> 13]++;
950 		else
951 			x_set_ltimes[0xf]++;
952 	}
953 	x_set_cpus[shipped]++;
954 #endif
955 }
956 
957 void
958 syncfpu(void)
959 {
960 }
961 
962 void
963 sticksync_slave(void)
964 {}
965 
966 void
967 sticksync_master(void)
968 {}
969 
970 void
971 cpu_init_cache_scrub(void)
972 {
973 	mach_set_soft_state(SIS_NORMAL, &SOLARIS_SOFT_STATE_RUN_MSG);
974 }
975 
976 int
977 dtrace_blksuword32_err(uintptr_t addr, uint32_t *data)
978 {
979 	int ret, watched;
980 
981 	watched = watch_disable_addr((void *)addr, 4, S_WRITE);
982 	ret = dtrace_blksuword32(addr, data, 0);
983 	if (watched)
984 		watch_enable_addr((void *)addr, 4, S_WRITE);
985 
986 	return (ret);
987 }
988 
989 int
990 dtrace_blksuword32(uintptr_t addr, uint32_t *data, int tryagain)
991 {
992 	if (suword32((void *)addr, *data) == -1)
993 		return (tryagain ? dtrace_blksuword32_err(addr, data) : -1);
994 	dtrace_flush_sec(addr);
995 
996 	return (0);
997 }
998 
999 /*ARGSUSED*/
1000 void
1001 cpu_faulted_enter(struct cpu *cp)
1002 {
1003 }
1004 
1005 /*ARGSUSED*/
1006 void
1007 cpu_faulted_exit(struct cpu *cp)
1008 {
1009 }
1010 
1011 static int
1012 kdi_cpu_ready_iter(int (*cb)(int, void *), void *arg)
1013 {
1014 	int rc, i;
1015 
1016 	for (rc = 0, i = 0; i < NCPU; i++) {
1017 		if (CPU_IN_SET(cpu_ready_set, i))
1018 			rc += cb(i, arg);
1019 	}
1020 
1021 	return (rc);
1022 }
1023 
1024 /*
1025  * Sends a cross-call to a specified processor.  The caller assumes
1026  * responsibility for repetition of cross-calls, as appropriate (MARSA for
1027  * debugging).
1028  */
1029 static int
1030 kdi_xc_one(int cpuid, void (*func)(uintptr_t, uintptr_t), uintptr_t arg1,
1031     uintptr_t arg2)
1032 {
1033 	int stat;
1034 	struct machcpu	*mcpup;
1035 	uint64_t cpuaddr_reg = 0, cpuaddr_scr = 0;
1036 
1037 	mcpup = &(((cpu_t *)get_cpuaddr(cpuaddr_reg, cpuaddr_scr))->cpu_m);
1038 
1039 	/*
1040 	 * if (idsr_busy())
1041 	 *	return (KDI_XC_RES_ERR);
1042 	 */
1043 
1044 	init_mondo_nocheck((xcfunc_t *)func, arg1, arg2);
1045 
1046 	mcpup->cpu_list[0] = (uint16_t)cpuid;
1047 	stat = shipit(1, mcpup->cpu_list_ra);
1048 
1049 	if (stat == 0)
1050 		return (KDI_XC_RES_OK);
1051 	else
1052 		return (KDI_XC_RES_NACK);
1053 }
1054 
1055 static void
1056 kdi_tickwait(clock_t nticks)
1057 {
1058 	clock_t endtick = gettick() + nticks;
1059 
1060 	while (gettick() < endtick)
1061 		;
1062 }
1063 
1064 static void
1065 kdi_cpu_init(int dcache_size, int dcache_linesize, int icache_size,
1066     int icache_linesize)
1067 {
1068 	kdi_dcache_size = dcache_size;
1069 	kdi_dcache_linesize = dcache_linesize;
1070 	kdi_icache_size = icache_size;
1071 	kdi_icache_linesize = icache_linesize;
1072 }
1073 
1074 /* used directly by kdi_read/write_phys */
1075 void
1076 kdi_flush_caches(void)
1077 {
1078 	/* Not required on sun4v architecture. */
1079 }
1080 
1081 /*ARGSUSED*/
1082 int
1083 kdi_get_stick(uint64_t *stickp)
1084 {
1085 	return (-1);
1086 }
1087 
1088 void
1089 cpu_kdi_init(kdi_t *kdi)
1090 {
1091 	kdi->kdi_flush_caches = kdi_flush_caches;
1092 	kdi->mkdi_cpu_init = kdi_cpu_init;
1093 	kdi->mkdi_cpu_ready_iter = kdi_cpu_ready_iter;
1094 	kdi->mkdi_xc_one = kdi_xc_one;
1095 	kdi->mkdi_tickwait = kdi_tickwait;
1096 	kdi->mkdi_get_stick = kdi_get_stick;
1097 }
1098 
1099 uint64_t	soft_state_message_ra[SOLARIS_SOFT_STATE_MSG_CNT];
1100 static uint64_t	soft_state_saved_state = (uint64_t)-1;
1101 static int	soft_state_initialized = 0;
1102 static uint64_t soft_state_sup_minor;		/* Supported minor number */
1103 static hsvc_info_t soft_state_hsvc = {
1104 			HSVC_REV_1, NULL, HSVC_GROUP_SOFT_STATE, 1, 0, NULL };
1105 
1106 
1107 static void
1108 sun4v_system_claim(void)
1109 {
1110 	watchdog_suspend();
1111 	/*
1112 	 * For "mdb -K", set soft state to debugging
1113 	 */
1114 	if (soft_state_saved_state == -1) {
1115 		mach_get_soft_state(&soft_state_saved_state,
1116 		    &SOLARIS_SOFT_STATE_SAVED_MSG);
1117 	}
1118 	/*
1119 	 * check again as the read above may or may not have worked and if
1120 	 * it didn't then soft state will still be -1
1121 	 */
1122 	if (soft_state_saved_state != -1) {
1123 		mach_set_soft_state(SIS_TRANSITION,
1124 		    &SOLARIS_SOFT_STATE_DEBUG_MSG);
1125 	}
1126 }
1127 
1128 static void
1129 sun4v_system_release(void)
1130 {
1131 	watchdog_resume();
1132 	/*
1133 	 * For "mdb -K", set soft_state state back to original state on exit
1134 	 */
1135 	if (soft_state_saved_state != -1) {
1136 		mach_set_soft_state(soft_state_saved_state,
1137 		    &SOLARIS_SOFT_STATE_SAVED_MSG);
1138 		soft_state_saved_state = -1;
1139 	}
1140 }
1141 
1142 void
1143 plat_kdi_init(kdi_t *kdi)
1144 {
1145 	kdi->pkdi_system_claim = sun4v_system_claim;
1146 	kdi->pkdi_system_release = sun4v_system_release;
1147 }
1148 
1149 /*
1150  * Routine to return memory information associated
1151  * with a physical address and syndrome.
1152  */
1153 /* ARGSUSED */
1154 int
1155 cpu_get_mem_info(uint64_t synd, uint64_t afar,
1156     uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep,
1157     int *segsp, int *banksp, int *mcidp)
1158 {
1159 	return (ENOTSUP);
1160 }
1161 
1162 /*
1163  * This routine returns the size of the kernel's FRU name buffer.
1164  */
1165 size_t
1166 cpu_get_name_bufsize()
1167 {
1168 	return (UNUM_NAMLEN);
1169 }
1170 
1171 /*
1172  * This routine is a more generic interface to cpu_get_mem_unum(),
1173  * that may be used by other modules (e.g. mm).
1174  */
1175 /* ARGSUSED */
1176 int
1177 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar,
1178     char *buf, int buflen, int *lenp)
1179 {
1180 	return (ENOTSUP);
1181 }
1182 
1183 /* ARGSUSED */
1184 int
1185 cpu_get_mem_sid(char *unum, char *buf, int buflen, int *lenp)
1186 {
1187 	return (ENOTSUP);
1188 }
1189 
1190 /* ARGSUSED */
1191 int
1192 cpu_get_mem_addr(char *unum, char *sid, uint64_t offset, uint64_t *addrp)
1193 {
1194 	return (ENOTSUP);
1195 }
1196 
1197 /*
1198  * xt_sync - wait for previous x-traps to finish
1199  */
1200 void
1201 xt_sync(cpuset_t cpuset)
1202 {
1203 	union {
1204 		uint8_t volatile byte[NCPU];
1205 		uint64_t volatile xword[NCPU / 8];
1206 	} cpu_sync;
1207 	uint64_t starttick, endtick, tick, lasttick, traptrace_id;
1208 	uint_t largestid, smallestid;
1209 	int i, j;
1210 
1211 	kpreempt_disable();
1212 	CPUSET_DEL(cpuset, CPU->cpu_id);
1213 	CPUSET_AND(cpuset, cpu_ready_set);
1214 
1215 	CPUSET_BOUNDS(cpuset, smallestid, largestid);
1216 	if (smallestid == CPUSET_NOTINSET)
1217 		goto out;
1218 
1219 	/*
1220 	 * Sun4v uses a queue for receiving mondos. Successful
1221 	 * transmission of a mondo only indicates that the mondo
1222 	 * has been written into the queue.
1223 	 *
1224 	 * We use an array of bytes to let each cpu to signal back
1225 	 * to the cross trap sender that the cross trap has been
1226 	 * executed. Set the byte to 1 before sending the cross trap
1227 	 * and wait until other cpus reset it to 0.
1228 	 */
1229 	bzero((void *)&cpu_sync, NCPU);
1230 	cpu_sync.byte[smallestid] = 1;
1231 	if (largestid != smallestid) {
1232 		for (i = (smallestid + 1); i <= (largestid - 1); i++)
1233 			if (CPU_IN_SET(cpuset, i))
1234 				cpu_sync.byte[i] = 1;
1235 		cpu_sync.byte[largestid] = 1;
1236 	}
1237 
1238 	/*
1239 	 * To help debug xt_sync panic, each mondo is uniquely identified
1240 	 * by passing the tick value, traptrace_id as the second mondo
1241 	 * argument to xt_some which is logged in CPU's mondo queue,
1242 	 * traptrace buffer and the panic message.
1243 	 */
1244 	traptrace_id = gettick();
1245 	xt_some(cpuset, (xcfunc_t *)xt_sync_tl1,
1246 	    (uint64_t)cpu_sync.byte, traptrace_id);
1247 
1248 	starttick = lasttick = gettick();
1249 	endtick = starttick + xc_tick_limit;
1250 
1251 	for (i = (smallestid / 8); i <= (largestid / 8); i++) {
1252 		while (cpu_sync.xword[i] != 0) {
1253 			tick = gettick();
1254 			/*
1255 			 * If there is a big jump between the current tick
1256 			 * count and lasttick, we have probably hit a break
1257 			 * point. Adjust endtick accordingly to avoid panic.
1258 			 */
1259 			if (tick > (lasttick + xc_tick_jump_limit)) {
1260 				endtick += (tick - lasttick);
1261 			}
1262 			lasttick = tick;
1263 			if (tick > endtick) {
1264 				if (panic_quiesce)
1265 					goto out;
1266 				cmn_err(CE_CONT, "Cross trap sync timeout:  "
1267 				    "at cpu_sync.xword[%d]: 0x%lx "
1268 				    "cpu_sync.byte: 0x%lx "
1269 				    "starttick: 0x%lx endtick: 0x%lx "
1270 				    "traptrace_id = 0x%lx\n",
1271 				    i, cpu_sync.xword[i],
1272 				    (uint64_t)cpu_sync.byte,
1273 				    starttick, endtick, traptrace_id);
1274 				cmn_err(CE_CONT, "CPUIDs:");
1275 				for (j = (i * 8); j <= largestid; j++) {
1276 					if (cpu_sync.byte[j] != 0)
1277 						cmn_err(CE_CONT, " 0x%x", j);
1278 				}
1279 				cmn_err(CE_PANIC, "xt_sync: timeout");
1280 			}
1281 		}
1282 	}
1283 
1284 out:
1285 	kpreempt_enable();
1286 }
1287 
1288 /*
1289  * Recalculate the values of the cross-call timeout variables based
1290  * on the value of the 'inter-cpu-latency' property of the platform node.
1291  * The property sets the number of nanosec to wait for a cross-call
1292  * to be acknowledged.  Other timeout variables are derived from it.
1293  *
1294  * N.B. This implementation is aware of the internals of xc_init()
1295  * and updates many of the same variables.
1296  */
1297 void
1298 recalc_xc_timeouts(void)
1299 {
1300 	typedef union {
1301 		uint64_t whole;
1302 		struct {
1303 			uint_t high;
1304 			uint_t low;
1305 		} half;
1306 	} u_number;
1307 
1308 	/* See x_call.c for descriptions of these extern variables. */
1309 	extern uint64_t xc_tick_limit_scale;
1310 	extern uint64_t xc_mondo_time_limit;
1311 	extern uint64_t xc_func_time_limit;
1312 	extern uint64_t xc_scale;
1313 	extern uint64_t xc_mondo_multiplier;
1314 	extern uint_t   nsec_shift;
1315 
1316 	/* Temp versions of the target variables */
1317 	uint64_t tick_limit;
1318 	uint64_t tick_jump_limit;
1319 	uint64_t mondo_time_limit;
1320 	uint64_t func_time_limit;
1321 	uint64_t scale;
1322 
1323 	uint64_t latency;	/* nanoseconds */
1324 	uint64_t maxfreq;
1325 	uint64_t tick_limit_save = xc_tick_limit;
1326 	uint_t   tick_scale;
1327 	uint64_t top;
1328 	uint64_t bottom;
1329 	u_number tk;
1330 
1331 	md_t *mdp;
1332 	int nrnode;
1333 	mde_cookie_t *platlist;
1334 
1335 	/*
1336 	 * Look up the 'inter-cpu-latency' (optional) property in the
1337 	 * platform node of the MD.  The units are nanoseconds.
1338 	 */
1339 	if ((mdp = md_get_handle()) == NULL) {
1340 		cmn_err(CE_WARN, "recalc_xc_timeouts: "
1341 		    "Unable to initialize machine description");
1342 		return;
1343 	}
1344 
1345 	nrnode = md_alloc_scan_dag(mdp,
1346 	    md_root_node(mdp), "platform", "fwd", &platlist);
1347 
1348 	ASSERT(nrnode == 1);
1349 	if (nrnode < 1) {
1350 		cmn_err(CE_WARN, "recalc_xc_timeouts: platform node missing");
1351 		goto done;
1352 	}
1353 
1354 	if (md_get_prop_val(mdp, platlist[0],
1355 	    "inter-cpu-latency", &latency) == -1)
1356 		goto done;
1357 
1358 	/*
1359 	 * clock.h defines an assembly-language macro
1360 	 * (NATIVE_TIME_TO_NSEC_SCALE) to convert from %stick
1361 	 * units to nanoseconds.  Since the inter-cpu-latency
1362 	 * units are nanoseconds and the xc_* variables require
1363 	 * %stick units, we need the inverse of that function.
1364 	 * The trick is to perform the calculation without
1365 	 * floating point, but also without integer truncation
1366 	 * or overflow.  To understand the calculation below,
1367 	 * please read the discussion of the macro in clock.h.
1368 	 * Since this new code will be invoked infrequently,
1369 	 * we can afford to implement it in C.
1370 	 *
1371 	 * tick_scale is the reciprocal of nsec_scale which is
1372 	 * calculated at startup in setcpudelay().  The calc
1373 	 * of tick_limit parallels that of NATIVE_TIME_TO_NSEC_SCALE
1374 	 * except we use tick_scale instead of nsec_scale and
1375 	 * C instead of assembler.
1376 	 */
1377 	tick_scale = (uint_t)(((u_longlong_t)sys_tick_freq
1378 	    << (32 - nsec_shift)) / NANOSEC);
1379 
1380 	tk.whole = latency;
1381 	top = ((uint64_t)tk.half.high << 4) * tick_scale;
1382 	bottom = (((uint64_t)tk.half.low << 4) * (uint64_t)tick_scale) >> 32;
1383 	tick_limit = top + bottom;
1384 
1385 
1386 	/*
1387 	 * xc_init() calculated 'maxfreq' by looking at all the cpus,
1388 	 * and used it to derive some of the timeout variables that we
1389 	 * recalculate below.  We can back into the original value by
1390 	 * using the inverse of one of those calculations.
1391 	 */
1392 	maxfreq = xc_mondo_time_limit / xc_scale;
1393 
1394 	/*
1395 	 * Don't allow the new timeout (xc_tick_limit) to fall below
1396 	 * the system tick frequency (stick).  Allowing the timeout
1397 	 * to be set more tightly than this empirically determined
1398 	 * value may cause panics.
1399 	 */
1400 	tick_limit = tick_limit < sys_tick_freq ? sys_tick_freq : tick_limit;
1401 
1402 	tick_jump_limit = tick_limit / 32;
1403 	tick_limit *= xc_tick_limit_scale;
1404 
1405 	/*
1406 	 * Recalculate xc_scale since it is used in a callback function
1407 	 * (xc_func_timeout_adj) to adjust two of the timeouts dynamically.
1408 	 * Make the change in xc_scale proportional to the change in
1409 	 * xc_tick_limit.
1410 	 */
1411 	scale = (xc_scale * tick_limit + sys_tick_freq / 2) / tick_limit_save;
1412 	if (scale == 0)
1413 		scale = 1;
1414 
1415 	mondo_time_limit = maxfreq * scale;
1416 	func_time_limit = mondo_time_limit * xc_mondo_multiplier;
1417 
1418 	/*
1419 	 * Don't modify the timeouts if nothing has changed.  Else,
1420 	 * stuff the variables with the freshly calculated (temp)
1421 	 * variables.  This minimizes the window where the set of
1422 	 * values could be inconsistent.
1423 	 */
1424 	if (tick_limit != xc_tick_limit) {
1425 		xc_tick_limit = tick_limit;
1426 		xc_tick_jump_limit = tick_jump_limit;
1427 		xc_scale = scale;
1428 		xc_mondo_time_limit = mondo_time_limit;
1429 		xc_func_time_limit = func_time_limit;
1430 		/*
1431 		 * Force the new values to be used for future cross
1432 		 * calls.  This is necessary only when we increase
1433 		 * the timeouts.
1434 		 */
1435 		if (tick_limit > tick_limit_save) {
1436 			cpuset_t cpuset = cpu_ready_set;
1437 
1438 			xt_sync(cpuset);
1439 		}
1440 	}
1441 
1442 done:
1443 	if (nrnode > 0)
1444 		md_free_scan_dag(mdp, &platlist);
1445 	(void) md_fini_handle(mdp);
1446 }
1447 
1448 void
1449 mach_soft_state_init(void)
1450 {
1451 	int		i;
1452 	uint64_t	ra;
1453 
1454 	/*
1455 	 * Try to register soft_state api. If it fails, soft_state api has not
1456 	 * been implemented in the firmware, so do not bother to setup
1457 	 * soft_state in the kernel.
1458 	 */
1459 	if ((i = hsvc_register(&soft_state_hsvc, &soft_state_sup_minor)) != 0) {
1460 		return;
1461 	}
1462 	for (i = 0; i < SOLARIS_SOFT_STATE_MSG_CNT; i++) {
1463 		ASSERT(strlen((const char *)(void *)
1464 		    soft_state_message_strings + i) < SSM_SIZE);
1465 		if ((ra = va_to_pa(
1466 		    (void *)(soft_state_message_strings + i))) == -1ll) {
1467 			return;
1468 		}
1469 		soft_state_message_ra[i] = ra;
1470 	}
1471 	/*
1472 	 * Tell OBP that we are supporting Guest State
1473 	 */
1474 	prom_sun4v_soft_state_supported();
1475 	soft_state_initialized = 1;
1476 }
1477 
1478 void
1479 mach_set_soft_state(uint64_t state, uint64_t *string_ra)
1480 {
1481 	uint64_t	rc;
1482 
1483 	if (soft_state_initialized && *string_ra) {
1484 		rc = hv_soft_state_set(state, *string_ra);
1485 		if (rc != H_EOK) {
1486 			cmn_err(CE_WARN,
1487 			    "hv_soft_state_set returned %ld\n", rc);
1488 		}
1489 	}
1490 }
1491 
1492 void
1493 mach_get_soft_state(uint64_t *state, uint64_t *string_ra)
1494 {
1495 	uint64_t	rc;
1496 
1497 	if (soft_state_initialized && *string_ra) {
1498 		rc = hv_soft_state_get(*string_ra, state);
1499 		if (rc != H_EOK) {
1500 			cmn_err(CE_WARN,
1501 			    "hv_soft_state_get returned %ld\n", rc);
1502 			*state = -1;
1503 		}
1504 	}
1505 }
1506