xref: /titanic_52/usr/src/uts/sun4v/os/cpc_subr.c (revision 327151705b7439cb7ab35c370f682cac7ef9523a)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
23  */
24 
25 /*
26  * sun4u common CPC subroutines.
27  */
28 
29 #include <sys/types.h>
30 #include <sys/time.h>
31 #include <sys/atomic.h>
32 #include <sys/thread.h>
33 #include <sys/regset.h>
34 #include <sys/archsystm.h>
35 #include <sys/machsystm.h>
36 #include <sys/cpc_impl.h>
37 #include <sys/cpc_ultra.h>
38 #include <sys/sunddi.h>
39 #include <sys/intr.h>
40 #include <sys/ivintr.h>
41 #include <sys/x_call.h>
42 #include <sys/cpuvar.h>
43 #include <sys/machcpuvar.h>
44 #include <sys/cpc_pcbe.h>
45 #include <sys/modctl.h>
46 #include <sys/sdt.h>
47 
48 uint64_t	cpc_level15_inum = 0;	/* used in interrupt.s */
49 int		cpc_has_overflow_intr;	/* set in cheetah.c */
50 
51 extern kcpc_ctx_t *kcpc_overflow_intr(caddr_t arg, uint64_t bitmap);
52 extern int kcpc_counts_include_idle;
53 
54 /*
55  * Called on the boot CPU during startup.
56  */
57 void
58 kcpc_hw_init(void)
59 {
60 	if ((cpc_has_overflow_intr) && (cpc_level15_inum == 0)) {
61 		cpc_level15_inum = add_softintr(PIL_15,
62 		    kcpc_hw_overflow_intr, NULL, SOFTINT_MT);
63 	}
64 
65 	/*
66 	 * Make sure the boot CPU gets set up.
67 	 */
68 	kcpc_hw_startup_cpu(CPU->cpu_flags);
69 }
70 
71 /*
72  * Prepare for CPC interrupts and install an idle thread CPC context.
73  */
74 void
75 kcpc_hw_startup_cpu(ushort_t cpflags)
76 {
77 	cpu_t		*cp = CPU;
78 	kthread_t	*t = cp->cpu_idle_thread;
79 
80 	ASSERT(t->t_bound_cpu == cp);
81 
82 	if (cpc_has_overflow_intr && (cpflags & CPU_FROZEN) == 0) {
83 		int pstate_save = disable_vec_intr();
84 
85 		ASSERT(cpc_level15_inum != 0);
86 
87 		intr_enqueue_req(PIL_15, cpc_level15_inum);
88 		enable_vec_intr(pstate_save);
89 	}
90 
91 	mutex_init(&cp->cpu_cpc_ctxlock, "cpu_cpc_ctxlock", MUTEX_DEFAULT, 0);
92 
93 	if (kcpc_counts_include_idle)
94 		return;
95 
96 	installctx(t, cp, kcpc_idle_save, kcpc_idle_restore, NULL, NULL,
97 	    NULL, NULL);
98 }
99 
100 /*
101  * Examine the processor and load an appropriate PCBE.
102  */
103 int
104 kcpc_hw_load_pcbe(void)
105 {
106 	char		modname[MODMAXNAMELEN+1];
107 	char		*p, *q;
108 	int		len, stat;
109 	extern char	*boot_cpu_compatible_list;
110 
111 	for (stat = -1, p = boot_cpu_compatible_list; p != NULL; p = q) {
112 		/*
113 		 * Get next CPU module name from boot_cpu_compatible_list
114 		 */
115 		q = strchr(p, ':');
116 		len = (q) ? (q - p) : strlen(p);
117 		if (len < sizeof (modname)) {
118 			(void) strncpy(modname, p, len);
119 			modname[len] = '\0';
120 			stat = kcpc_pcbe_tryload(modname, 0, 0, 0);
121 			if (stat == 0)
122 				break;
123 		}
124 		if (q)
125 			q++;			/* skip over ':' */
126 	}
127 	return (stat);
128 
129 }
130 
131 /*ARGSUSED*/
132 int
133 kcpc_hw_cpu_hook(processorid_t cpuid, ulong_t *kcpc_cpumap)
134 {
135 	return (0);
136 }
137 
138 int
139 kcpc_hw_lwp_hook(void)
140 {
141 	return (0);
142 }
143