xref: /titanic_52/usr/src/uts/sun4v/ml/mach_offsets.in (revision 3ed4a803a4d4b35e2773c194c9a6f4977687b542)
1\
2\ CDDL HEADER START
3\
4\ The contents of this file are subject to the terms of the
5\ Common Development and Distribution License (the "License").
6\ You may not use this file except in compliance with the License.
7\
8\ You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9\ or http://www.opensolaris.org/os/licensing.
10\ See the License for the specific language governing permissions
11\ and limitations under the License.
12\
13\ When distributing Covered Code, include this CDDL HEADER in each
14\ file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15\ If applicable, add the following below this CDDL HEADER, with the
16\ fields enclosed by brackets "[]" replaced with your own identifying
17\ information: Portions Copyright [yyyy] [name of copyright owner]
18\
19\ CDDL HEADER END
20\
21\ Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
22\ Use is subject to license terms.
23\
24\ offsets.in: input file to produce assym.h using the stabs program
25\
26\
27\ Guidelines:
28\
29\ A blank line is required between structure/union/intrinsic names.
30\
31\ The general form is:
32\
33\	name size_define [shift_define]
34\		[member_name [offset_define]]
35\	{blank line}
36\
37\ If no individual member_name's are specified then all members are processed.
38\ If offset_define is not specified then the member_name is
39\ converted to all caps and used instead.  If the size of an item is
40\ a power of two then an optional shift count may be output using
41\ shift_define as the name but only if shift_define was specified.
42\
43\ Arrays cause stabs to automatically output the per-array-item increment
44\ in addition to the base address:
45\
46\	 foo FOO_SIZE
47\		array	FOO_ARRAY
48\
49\ results in:
50\
51\	#define	FOO_ARRAY	0x0
52\	#define	FOO_ARRAY_INCR	0x4
53\
54\ which allows \#define's to be used to specify array items:
55\
56\	#define	FOO_0	(FOO_ARRAY + (0 * FOO_ARRAY_INCR))
57\	#define	FOO_1	(FOO_ARRAY + (1 * FOO_ARRAY_INCR))
58\	...
59\	#define	FOO_n	(FOO_ARRAY + (n * FOO_ARRAY_INCR))
60\
61\ There are several examples below (search for _INCR).
62\
63\ There is currently no manner in which to identify "anonymous"
64\ structures or unions so if they are to be used in assembly code
65\ they must be given names.
66\
67\ When specifying the offsets of nested structures/unions each nested
68\ structure or union must be listed separately then use the
69\ "\#define" escapes to add the offsets from the base structure/union
70\ and all of the nested structures/unions together.  See the many
71\ examples already in this file.
72
73#ifndef	_GENASSYM
74#define	_GENASSYM
75#endif
76
77#include <vm/hat_sfmmu.h>
78#include <sys/traptrace.h>
79#include <sys/lpad.h>
80
81machcpu
82	intrstat	MCPU_INTRSTAT
83	pil_high_start	MCPU_PIL_HIGH_START
84	mpcb_pa	MCPU_MPCB_PA
85	kwbuf_full	MCPU_KWBUF_FULL
86	kwbuf_sp	MCPU_KWBUF_SP
87	kwbuf	MCPU_KWBUF
88	cpu_q_base_pa	MCPU_CPU_Q_BASE
89	cpu_q_size	MCPU_CPU_Q_SIZE
90	dev_q_base_pa	MCPU_DEV_Q_BASE
91	dev_q_size	MCPU_DEV_Q_SIZE
92	mondo_data	MCPU_MONDO_DATA
93	mondo_data_ra	MCPU_MONDO_DATA_RA
94	cpu_rq_va		MCPU_RQ_BASE_VA
95	cpu_rq_base_pa		MCPU_RQ_BASE
96	cpu_rq_size		MCPU_RQ_SIZE
97	cpu_nrq_va		MCPU_NRQ_BASE_VA
98	cpu_nrq_base_pa		MCPU_NRQ_BASE
99	cpu_nrq_size		MCPU_NRQ_SIZE
100	cpu_tstat_flags		MCPU_TSTAT_FLAGS
101	cpu_nre_error		MCPU_NRE_ERROR
102
103\#define	CPU_MPCB_PA	(CPU_MCPU + MCPU_MPCB_PA)
104\#define	CPU_KWBUF_FULL	(CPU_MCPU + MCPU_KWBUF_FULL)
105\#define	CPU_KWBUF_SP	(CPU_MCPU + MCPU_KWBUF_SP)
106\#define	CPU_KWBUF	(CPU_MCPU + MCPU_KWBUF)
107\#define	CPU_Q_BASE	(CPU_MCPU + MCPU_CPU_Q_BASE)
108\#define	CPU_Q_SIZE	(CPU_MCPU + MCPU_CPU_Q_SIZE)
109\#define	DEV_Q_BASE	(CPU_MCPU + MCPU_DEV_Q_BASE)
110\#define	DEV_Q_SIZE	(CPU_MCPU + MCPU_DEV_Q_SIZE)
111\#define	CPU_RQ_BASE_VA_OFF	(CPU_MCPU + MCPU_RQ_BASE_VA)
112\#define	CPU_RQ_BASE_OFF		(CPU_MCPU + MCPU_RQ_BASE)
113\#define	CPU_RQ_SIZE_OFF		(CPU_MCPU + MCPU_RQ_SIZE)
114\#define	CPU_NRQ_BASE_VA_OFF	(CPU_MCPU + MCPU_NRQ_BASE_VA)
115\#define	CPU_NRQ_BASE_OFF	(CPU_MCPU + MCPU_NRQ_BASE)
116\#define	CPU_NRQ_SIZE_OFF	(CPU_MCPU + MCPU_NRQ_SIZE)
117\#define	CPU_TSTAT_FLAGS		(CPU_MCPU + MCPU_TSTAT_FLAGS)
118
119trap_trace_record	TRAP_ENT_SIZE
120	tt_gl		TRAP_ENT_GL
121	tt_tl		TRAP_ENT_TL
122	tt_tt		TRAP_ENT_TT
123	tt_tpc		TRAP_ENT_TPC
124	tt_tstate	TRAP_ENT_TSTATE
125	tt_tick		TRAP_ENT_TICK
126	tt_sp		TRAP_ENT_SP
127	tt_tr		TRAP_ENT_TR
128	tt_f1		TRAP_ENT_F1
129	tt_f2		TRAP_ENT_F2
130	tt_f3		TRAP_ENT_F3
131	tt_f4		TRAP_ENT_F4
132
133htrap_trace_record	HTRAP_ENT_SIZE
134
135hat	HAT_SIZE
136	sfmmu_cpusran
137	sfmmu_tsb
138	sfmmu_ismblkpa
139	sfmmu_tteflags
140	sfmmu_rtteflags
141	sfmmu_srdp
142	sfmmu_region_map.h_rmap_s.hmeregion_map	SFMMU_HMERMAP
143	sfmmu_scdp
144	sfmmu_hvblock
145	sfmmu_cext
146	sfmmu_ctx_lock
147	sfmmu_ctxs
148	sfmmu_pgsz_order
149	sfmmu_pgsz_map
150
151sf_scd SCD_SIZE
152	scd_sfmmup
153	scd_region_map.h_rmap_s.hmeregion_map	SCD_HMERMAP
154
155sfmmu_global_stat HATSTAT_SIZE
156	sf_pagefaults		HATSTAT_PAGEFAULT
157	sf_uhash_searches	HATSTAT_UHASH_SEARCH
158	sf_uhash_links		HATSTAT_UHASH_LINKS
159	sf_khash_searches	HATSTAT_KHASH_SEARCH
160	sf_khash_links		HATSTAT_KHASH_LINKS
161
162sf_hment	SFHME_SIZE	SFHME_SHIFT
163	hme_tte		SFHME_TTE
164
165tsbmiss		TSBMISS_SIZE
166	ksfmmup		TSBMISS_KHATID
167	usfmmup		TSBMISS_UHATID
168	usrdp		TSBMISS_SHARED_UHATID
169	tsbptr		TSBMISS_TSBPTR
170	tsbptr4m	TSBMISS_TSBPTR4M
171	tsbscdptr	TSBMISS_TSBSCDPTR
172	tsbscdptr4m	TSBMISS_TSBSCDPTR4M
173	ismblkpa	TSBMISS_ISMBLKPA
174	khashstart	TSBMISS_KHASHSTART
175	uhashstart	TSBMISS_UHASHSTART
176	khashsz		TSBMISS_KHASHSZ
177	uhashsz		TSBMISS_UHASHSZ
178	uhat_tteflags	TSBMISS_UTTEFLAGS
179	uhat_rtteflags	TSBMISS_URTTEFLAGS
180	utsb_misses	TSBMISS_UTSBMISS
181	ktsb_misses	TSBMISS_KTSBMISS
182	uprot_traps	TSBMISS_UPROTS
183	kprot_traps	TSBMISS_KPROTS
184	scratch		TSBMISS_SCRATCH
185	shmermap	TSBMISS_SHMERMAP
186	scd_shmermap	TSBMISS_SCDSHMERMAP
187	pgsz_bitmap	TSBMISS_PGSZ_BITMAP
188
189\#define	TSB_TAGACC	(0 * TSBMISS_SCRATCH_INCR)
190\#define	TSBMISS_HMEBP	(1 * TSBMISS_SCRATCH_INCR)
191\#define	TSBMISS_HATID	(2 * TSBMISS_SCRATCH_INCR)
192
193kpmtsbm		KPMTSBM_SIZE KPMTSBM_SHIFT
194	vbase		KPMTSBM_VBASE
195	vend		KPMTSBM_VEND
196	flags		KPMTSBM_FLAGS
197	sz_shift	KPMTSBM_SZSHIFT
198	kpmp_shift	KPMTSBM_KPMPSHIFT
199	kpmp2pshft	KPMTSBM_KPMP2PSHFT
200	kpmp_table_sz	KPMTSBM_KPMPTABLESZ
201	kpmp_tablepa	KPMTSBM_KPMPTABLEPA
202	msegphashpa	KPMTSBM_MSEGPHASHPA
203	tsbptr		KPMTSBM_TSBPTR
204	kpm_dtlb_misses	KPMTSBM_DTLBMISS
205	kpm_tsb_misses	KPMTSBM_TSBMISS
206
207kpm_page	KPMPAGE_SIZE KPMPAGE_SHIFT
208	kp_refcnt	KPMPAGE_REFCNT
209	kp_refcnta	KPMPAGE_REFCNTA
210	kp_refcntc	KPMPAGE_REFCNTC
211	kp_refcnts	KPMPAGE_REFCNTS
212
213kpm_hlk		KPMHLK_SIZE KPMHLK_SHIFT
214	khl_mutex	KPMHLK_MUTEX
215	khl_lock	KPMHLK_LOCK
216
217kpm_spage	KPMSPAGE_SIZE KPMSPAGE_SHIFT
218	kp_mapped_flag	KPMSPAGE_MAPPED
219
220kpm_shlk	KPMSHLK_SIZE KPMSHLK_SHIFT
221	kshl_lock	KPMSHLK_LOCK
222
223memseg		MEMSEG_SIZE
224	pages		MEMSEG_PAGES
225	epages		MEMSEG_EPAGES
226	pages_base	MEMSEG_PAGES_BASE
227	pages_end	MEMSEG_PAGES_END
228	next		MEMSEG_NEXT
229	lnext		MEMSEG_LNEXT
230	nextpa		MEMSEG_NEXTPA
231	pagespa		MEMSEG_PAGESPA
232	epagespa	MEMSEG_EPAGESPA
233	kpm_pbase	MEMSEG_KPM_PBASE
234	kpm_nkpmpgs	MEMSEG_KPM_NKPMPGS
235	mseg_un
236	kpm_pagespa	MEMSEG_KPM_PAGESPA
237
238\#define	MEMSEG_KPM_PAGES	(MSEG_UN)
239\#define	MEMSEG_KPM_SPAGES	(MSEG_UN)
240
241page		PAGE_SIZE
242	p_pagenum	PAGE_PAGENUM
243
244tsb_info	TSBINFO_SIZE
245	tsb_tte		TSBINFO_TTE
246	tsb_va		TSBINFO_VADDR
247	tsb_pa		TSBINFO_PADDR
248	tsb_szc		TSBINFO_SZCODE
249	tsb_next	TSBINFO_NEXTPTR
250
251hv_tsb_block
252	hv_tsb_info_pa
253	hv_tsb_info_cnt
254
255hv_pgsz_order
256	hv_pgsz_order_pa
257
258cpu_node	CPU_NODE_SIZE
259	nodeid
260	clock_freq
261	tick_nsec_scale
262	ecache_size	ECACHE_SIZE
263	ecache_linesize	ECACHE_LINESIZE
264	device_id	DEVICE_ID
265
266ptl1_regs
267	ptl1_trap_regs
268	ptl1_gregs
269	ptl1_tick
270	ptl1_dmmu_type
271	ptl1_dmmu_addr
272	ptl1_dmmu_ctx
273	ptl1_immu_type
274	ptl1_immu_addr
275	ptl1_immu_ctx
276	ptl1_rwindow
277	ptl1_softint
278	ptl1_pstate
279	ptl1_pil
280	ptl1_cwp
281	ptl1_wstate
282	ptl1_otherwin
283	ptl1_cleanwin
284	ptl1_cansave
285	ptl1_canrestore
286
287ptl1_gregs
288	ptl1_gl
289	ptl1_g1
290	ptl1_g2
291	ptl1_g3
292	ptl1_g4
293	ptl1_g5
294	ptl1_g6
295	ptl1_g7
296
297lpad_data
298	magic		LPAD_MAGIC
299	inuse		LPAD_INUSE
300	mmfsa_ra	LPAD_MMFSA_RA
301	pc		LPAD_PC
302	arg		LPAD_ARG
303	nmap		LPAD_NMAP
304	map		LPAD_MAP
305
306lpad_map	LPAD_MAP_SIZE
307	flags		LPAD_MAP_FLAGS
308	va		LPAD_MAP_VA
309	tte		LPAD_MAP_TTE
310