1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_PCI_DMA_H 28 #define _SYS_PCI_DMA_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 typedef pfn_t iopfn_t; 37 #define MAKE_DMA_COOKIE(cp, address, size) \ 38 { \ 39 (cp)->dmac_notused = 0; \ 40 (cp)->dmac_type = 0; \ 41 (cp)->dmac_laddress = (address); \ 42 (cp)->dmac_size = (size); \ 43 } 44 45 #define HAS_REDZONE(mp) (((mp)->dmai_rflags & DDI_DMA_REDZONE) ? 1 : 0) 46 47 typedef struct pci_dma_hdl { 48 ddi_dma_impl_t pdh_ddi_hdl; 49 ddi_dma_attr_t pdh_attr_dev; 50 uint64_t pdh_sync_buf_pa; 51 } pci_dma_hdl_t; 52 53 struct pci_dma_impl { /* forthdebug only, keep in sync with ddi_dma_impl_t */ 54 ulong_t dmai_mapping; 55 uint_t dmai_size; 56 off_t dmai_offset; 57 uint_t dmai_minxfer; 58 uint_t dmai_burstsizes; 59 uint_t dmai_ndvmapages; 60 uint_t dmai_roffset; 61 uint_t dmai_rflags; 62 uint_t dmai_flags; 63 uint_t dmai_nwin; 64 uint_t dmai_winsize; 65 caddr_t dmai_tte_fdvma; 66 void *dmai_pfnlst; 67 uint_t *dmai_pfn0; 68 void *dmai_winlst; 69 dev_info_t *dmai_rdip; 70 ddi_dma_obj_t dmai_object; 71 ddi_dma_attr_t dmai_attr_aug; 72 ddi_dma_cookie_t *dmai_cookie; 73 74 int (*dmai_fault_check)(struct ddi_dma_impl *handle); 75 void (*dmai_fault_notify)(struct ddi_dma_impl *handle); 76 int dmai_fault; 77 78 ddi_dma_attr_t pdh_attr_dev; 79 uint64_t pdh_sync_buf_pa; 80 }; 81 82 /* 83 * flags for overloading dmai_inuse field of the dma request 84 * structure: 85 */ 86 #define dmai_flags dmai_inuse 87 #define dmai_tte dmai_nexus_private 88 #define dmai_fdvma dmai_nexus_private 89 #define dmai_pfnlst dmai_iopte 90 #define dmai_winlst dmai_minfo 91 #define dmai_pfn0 dmai_sbi 92 #define dmai_roffset dmai_pool 93 94 #define MP_PFN0(mp) ((iopfn_t)(mp)->dmai_pfn0) 95 #define WINLST(mp) ((pci_dma_win_t *)(mp)->dmai_winlst) 96 #define DEV_ATTR(mp) (&((pci_dma_hdl_t *)(mp))->pdh_attr_dev) 97 #define SYNC_BUF_PA(mp) (((pci_dma_hdl_t *)(mp))->pdh_sync_buf_pa) 98 #define SET_DMAATTR(p, lo, hi, nocross, cntmax) \ 99 (p)->dma_attr_addr_lo = (lo); \ 100 (p)->dma_attr_addr_hi = (hi); \ 101 (p)->dma_attr_seg = (nocross); \ 102 (p)->dma_attr_count_max = (cntmax); 103 104 #define SET_DMAALIGN(p, align) \ 105 (p)->dma_attr_align = (align); 106 107 #define DMAI_FLAGS_INUSE 0x1 108 #define DMAI_FLAGS_BYPASSREQ 0x2 109 #define DMAI_FLAGS_PEER_ONLY 0x4 110 #define DMAI_FLAGS_NOCTX 0x8 111 #define DMAI_FLAGS_DVMA 0x10 112 #define DMAI_FLAGS_BYPASS 0x20 113 #define DMAI_FLAGS_PEER_TO_PEER 0x40 114 #define DMAI_FLAGS_DMA (DMAI_FLAGS_BYPASS | DMAI_FLAGS_PEER_TO_PEER) 115 #define DMAI_FLAGS_DMA_TYPE (DMAI_FLAGS_DMA | DMAI_FLAGS_DVMA) 116 #define DMAI_FLAGS_CONTEXT 0x100 117 #define DMAI_FLAGS_FASTTRACK 0x200 118 #define DMAI_FLAGS_VMEMCACHE 0x400 119 #define DMAI_FLAGS_PGPFN 0x800 120 #define DMAI_FLAGS_NOSYSLIMIT 0x1000 121 #define DMAI_FLAGS_NOFASTLIMIT 0x2000 122 #define DMAI_FLAGS_NOSYNC 0x4000 123 #define DMAI_FLAGS_RELOC 0x8000 124 #define DMAI_FLAGS_MAPPED 0x10000 125 #define DMAI_FLAGS_PRESERVE (DMAI_FLAGS_PEER_ONLY | DMAI_FLAGS_BYPASSREQ | \ 126 DMAI_FLAGS_NOSYSLIMIT | DMAI_FLAGS_NOFASTLIMIT | DMAI_FLAGS_NOCTX) 127 128 #define HAS_NOFASTLIMIT(mp) ((mp)->dmai_flags & DMAI_FLAGS_NOFASTLIMIT) 129 #define HAS_NOSYSLIMIT(mp) ((mp)->dmai_flags & DMAI_FLAGS_NOSYSLIMIT) 130 #define PCI_DMA_ISPEERONLY(mp) ((mp)->dmai_flags & DMAI_FLAGS_PEER_ONLY) 131 #define PCI_DMA_ISPGPFN(mp) ((mp)->dmai_flags & DMAI_FLAGS_PGPFN) 132 #define PCI_DMA_TYPE(mp) ((mp)->dmai_flags & DMAI_FLAGS_DMA_TYPE) 133 #define PCI_DMA_ISDVMA(mp) (PCI_DMA_TYPE(mp) == DMAI_FLAGS_DVMA) 134 #define PCI_DMA_ISBYPASS(mp) (PCI_DMA_TYPE(mp) == DMAI_FLAGS_BYPASS) 135 #define PCI_DMA_ISPTP(mp) (PCI_DMA_TYPE(mp) == DMAI_FLAGS_PEER_TO_PEER) 136 #define PCI_DMA_CANFAST(mp) (((mp)->dmai_ndvmapages + HAS_REDZONE(mp) \ 137 <= pci_dvma_page_cache_clustsz) && HAS_NOFASTLIMIT(mp)) 138 #define PCI_DMA_WINNPGS(mp) IOMMU_BTOP((mp)->dmai_winsize) 139 #define PCI_DMA_CANCACHE(mp) (!HAS_REDZONE(mp) && \ 140 (PCI_DMA_WINNPGS(mp) == 1) && HAS_NOSYSLIMIT(mp)) 141 #define PCI_DMA_CANRELOC(mp) ((mp)->dmai_flags & DMAI_FLAGS_RELOC) 142 #define PCI_DMA_ISMAPPED(mp) ((mp)->dmai_flags & DMAI_FLAGS_MAPPED) 143 144 #define PCI_SYNC_FLAG_SZSHIFT 6 145 #define PCI_SYNC_FLAG_SIZE (1 << PCI_SYNC_FLAG_SZSHIFT) 146 #define PCI_SYNC_FLAG_FAILED 1 147 #define PCI_SYNC_FLAG_LOCKED 2 148 149 #define PCI_DMA_SYNC_DDI_FLAGS ((1 << 16) - 1) /* Look for only DDI flags */ 150 #define PCI_DMA_SYNC_EXT (1 << 30) /* enable/disable extension */ 151 #define PCI_DMA_SYNC_UNBIND (1 << 28) /* internal: part of unbind */ 152 #define PCI_DMA_SYNC_BAR (1 << 26) /* wait for all posted sync */ 153 #define PCI_DMA_SYNC_POST (1 << 25) /* post request and return */ 154 #define PCI_DMA_SYNC_PRIVATE (1 << 24) /* alloc private sync buffer */ 155 #define PCI_DMA_SYNC_DURING (1 << 22) /* sync in-progress dma */ 156 #define PCI_DMA_SYNC_BEFORE (1 << 21) /* before read or write */ 157 #define PCI_DMA_SYNC_AFTER (1 << 20) /* after read or write */ 158 #define PCI_DMA_SYNC_WRITE (1 << 17) /* data from device to mem */ 159 #define PCI_DMA_SYNC_READ (1 << 16) /* data from memory to dev */ 160 161 #define PCI_FLOW_ID_TO_PA(flow_p, flow_id) \ 162 ((flow_p)->flow_buf_pa + ((flow_id) << PCI_SYNC_FLAG_SZSHIFT)) 163 164 #define DEV_NOFASTLIMIT(lo, hi, fastlo, fasthi, align_pg) \ 165 (((lo) <= (fastlo)) && ((hi) >= (fasthi)) && \ 166 ((align_pg) <= pci_dvma_page_cache_clustsz)) 167 168 #define DEV_NOSYSLIMIT(lo, hi, syslo, syshi, align_pg) \ 169 (((lo) <= (syslo)) && ((hi) >= (syshi)) && (align_pg == 1)) 170 171 #define PCI_DMA_NOCTX(rdip) (!pci_use_contexts || (pci_ctx_no_active_flush && \ 172 ddi_prop_exists(DDI_DEV_T_ANY, rdip, \ 173 DDI_PROP_DONTPASS | DDI_PROP_NOTPROM, "active-dma-flush"))) 174 #define PCI_DMA_USECTX(mp) (!(mp->dmai_flags & DMAI_FLAGS_NOCTX)) 175 176 #define PCI_DMA_BYPASS_PREFIX(mp, pfn) \ 177 (PCI_DMA_ISBYPASS(mp) ? COMMON_IOMMU_BYPASS_BASE | \ 178 (pf_is_memory(pfn) ? 0 : COMMON_IOMMU_BYPASS_NONCACHE) : 0) 179 #define PCI_DMA_BADPTP(pfn, attrp) \ 180 ((IOMMU_PTOB(pfn) < attrp->dma_attr_addr_lo) || \ 181 (IOMMU_PTOB(pfn) > attrp->dma_attr_addr_hi)) 182 #define PCI_DMA_CURWIN(mp) \ 183 (((mp)->dmai_offset + (mp)->dmai_roffset) / (mp)->dmai_winsize) 184 185 #ifdef PCI_DMA_PROF 186 187 /* collect fast track failure statistics */ 188 #define PCI_DVMA_FASTTRAK_PROF(mp) { \ 189 if ((mp->dmai_ndvmapages + HAS_REDZONE(mp)) > pci_dvma_page_cache_clustsz) \ 190 pci_dvmaft_npages++; \ 191 else if (!HAS_NOFASTLIMIT(mp)) \ 192 pci_dvmaft_limit++; \ 193 } 194 195 #else /* !PCI_DMA_PROF */ 196 197 #define PCI_DVMA_FASTTRAK_PROF(mp) 198 199 #endif /* PCI_DMA_PROF */ 200 201 typedef struct pci_dma_win { 202 struct pci_dma_win *win_next; 203 uint32_t win_ncookies; 204 uint32_t win_curseg; 205 uint64_t win_size; 206 uint64_t win_offset; 207 /* cookie table: sizeof (ddi_dma_cookie_t) * win_ncookies */ 208 } pci_dma_win_t; 209 210 /* dvma debug records */ 211 struct dvma_rec { 212 char *dvma_addr; 213 uint_t len; 214 ddi_dma_impl_t *mp; 215 struct dvma_rec *next; 216 }; 217 218 typedef struct pbm pbm_t; 219 extern int pci_dma_sync(dev_info_t *dip, dev_info_t *rdip, 220 ddi_dma_handle_t handle, off_t off, size_t len, uint32_t sync_flags); 221 222 extern int pci_dma_win(dev_info_t *dip, dev_info_t *rdip, 223 ddi_dma_handle_t handle, uint_t win, off_t *offp, 224 size_t *lenp, ddi_dma_cookie_t *cookiep, uint_t *ccountp); 225 226 extern ddi_dma_impl_t *pci_dma_allocmp(dev_info_t *dip, dev_info_t *rdip, 227 int (*waitfp)(caddr_t), caddr_t arg); 228 extern void pci_dma_freemp(ddi_dma_impl_t *mp); 229 extern void pci_dma_freepfn(ddi_dma_impl_t *mp); 230 extern ddi_dma_impl_t *pci_dma_lmts2hdl(dev_info_t *dip, dev_info_t *rdip, 231 iommu_t *iommu_p, ddi_dma_req_t *dmareq); 232 extern int pci_dma_attr2hdl(pci_t *pci_p, ddi_dma_impl_t *mp); 233 extern uint32_t pci_dma_consist_check(uint32_t req_flags, pbm_t *pbm_p); 234 extern int pci_dma_type(pci_t *pci_p, ddi_dma_req_t *req, ddi_dma_impl_t *mp); 235 extern int pci_dma_pfn(pci_t *pci_p, ddi_dma_req_t *req, ddi_dma_impl_t *mp); 236 extern int pci_dvma_win(pci_t *pci_p, ddi_dma_req_t *r, ddi_dma_impl_t *mp); 237 extern void pci_dma_freewin(ddi_dma_impl_t *mp); 238 extern int pci_dvma_map_fast(iommu_t *iommu_p, ddi_dma_impl_t *mp); 239 extern int pci_dvma_map(ddi_dma_impl_t *mp, ddi_dma_req_t *dmareq, 240 iommu_t *iommu_p); 241 extern void pci_dvma_unmap(iommu_t *iommu_p, ddi_dma_impl_t *mp); 242 extern void pci_dma_sync_unmap(dev_info_t *dip, dev_info_t *rdip, 243 ddi_dma_impl_t *mp); 244 extern int pci_dma_physwin(pci_t *pci_p, ddi_dma_req_t *dmareq, 245 ddi_dma_impl_t *mp); 246 extern int pci_dvma_ctl(dev_info_t *dip, dev_info_t *rdip, 247 ddi_dma_impl_t *mp, enum ddi_dma_ctlops cmd, off_t *offp, 248 size_t *lenp, caddr_t *objp, uint_t cache_flags); 249 extern int pci_dma_ctl(dev_info_t *dip, dev_info_t *rdip, 250 ddi_dma_impl_t *mp, enum ddi_dma_ctlops cmd, off_t *offp, 251 size_t *lenp, caddr_t *objp, uint_t cache_flags); 252 extern void pci_vmem_do_free(iommu_t *iommu_p, void *base_addr, size_t npages, 253 int vmemcache); 254 255 #define PCI_GET_MP_NCOOKIES(mp) ((mp)->dmai_ncookies) 256 #define PCI_SET_MP_NCOOKIES(mp, nc) ((mp)->dmai_ncookies = (nc)) 257 #define PCI_GET_MP_PFN1_ADDR(mp) (((iopfn_t *)(mp)->dmai_pfnlst) + 1) 258 259 #define PCI_GET_MP_TTE(tte) \ 260 (((uint64_t)(uintptr_t)(tte) >> 5) << (32 + 5) | \ 261 ((uint32_t)(uintptr_t)(tte)) & 0x12) 262 #define PCI_SAVE_MP_TTE(mp, tte) \ 263 (mp)->dmai_tte = (caddr_t)(HI32(tte) | ((tte) & 0x12)) 264 265 #define PCI_GET_MP_PFN1(mp, page_no) (((iopfn_t *)(mp)->dmai_pfnlst)[page_no]) 266 #define PCI_GET_MP_PFN(mp, page_no) ((mp)->dmai_ndvmapages == 1 ? \ 267 (iopfn_t)(mp)->dmai_pfnlst : PCI_GET_MP_PFN1(mp, page_no)) 268 269 #define PCI_SET_MP_PFN(mp, page_no, pfn) { \ 270 if ((mp)->dmai_ndvmapages == 1) { \ 271 ASSERT(!((page_no) || (mp)->dmai_pfnlst)); \ 272 (mp)->dmai_pfnlst = (void *)(pfn); \ 273 } else \ 274 ((iopfn_t *)(mp)->dmai_pfnlst)[page_no] = (iopfn_t)(pfn); \ 275 } 276 #define PCI_SET_MP_PFN1(mp, page_no, pfn) { \ 277 ((iopfn_t *)(mp)->dmai_pfnlst)[page_no] = (pfn); \ 278 } 279 280 #define GET_TTE_TEMPLATE(mp) MAKE_TTE_TEMPLATE(PCI_GET_MP_PFN((mp), 0), (mp)) 281 282 extern int pci_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 283 ddi_dma_handle_t handle); 284 285 int pci_dma_handle_clean(dev_info_t *rdip, ddi_dma_handle_t handle); 286 287 #if defined(DEBUG) 288 extern void dump_dma_handle(uint64_t flag, dev_info_t *dip, ddi_dma_impl_t *hp); 289 #else 290 #define dump_dma_handle(flag, dip, hp) 291 #endif 292 293 #ifdef __cplusplus 294 } 295 #endif 296 297 #endif /* _SYS_PCI_DMA_H */ 298